Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge patch series "mpi3mr: Enhancements for mpi3mr"
Ranjan Kumar <ranjan.kumar@broadcom.com> says:
Enhancements for mpi3mr driver
Link: https://patch.msgid.link/20260116060719.32937-1-ranjan.kumar@broadcom.com
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
+478
-40
+89
-3
drivers/scsi/mpi3mr/mpi/mpi30_cnfg.h
+89
-3
drivers/scsi/mpi3mr/mpi/mpi30_cnfg.h
···
1
1
/* SPDX-License-Identifier: GPL-2.0-or-later */
2
2
/*
3
-
* Copyright 2017-2023 Broadcom Inc. All rights reserved.
3
+
* Copyright 2017-2026 Broadcom Inc. All rights reserved.
4
4
*/
5
5
#ifndef MPI30_CNFG_H
6
6
#define MPI30_CNFG_H 1
···
1037
1037
#define MPI3_IOUNIT5_DEVICE_SHUTDOWN_SATA_SSD_SHIFT (2)
1038
1038
#define MPI3_IOUNIT5_DEVICE_SHUTDOWN_SAS_SSD_MASK (0x0003)
1039
1039
#define MPI3_IOUNIT5_DEVICE_SHUTDOWN_SAS_SSD_SHIFT (0)
1040
+
#define MPI3_IOUNIT5_DEVICE_SHUTDOWN_HDD_SPINDOWN_ENABLE (0x8000)
1040
1041
#define MPI3_IOUNIT5_FLAGS_SATAPUIS_MASK (0x0c)
1041
1042
#define MPI3_IOUNIT5_FLAGS_SATAPUIS_NOT_SUPPORTED (0x00)
1042
1043
#define MPI3_IOUNIT5_FLAGS_SATAPUIS_OS_CONTROLLED (0x04)
···
1075
1074
u8 current_key_encryption_algo;
1076
1075
u8 key_digest_hash_algo;
1077
1076
union mpi3_version_union current_svn;
1078
-
__le32 reserved14;
1077
+
__le16 pending_svn_time;
1078
+
__le16 reserved16;
1079
1079
__le32 current_key[128];
1080
1080
union mpi3_iounit8_digest digest[MPI3_IOUNIT8_DIGEST_MAX];
1081
1081
};
···
1408
1406
};
1409
1407
1410
1408
#define MPI3_DRIVER1_PAGEVERSION (0x00)
1409
+
#define MPI3_DRIVER1_FLAGS_DEVICE_SHUTDOWN_ON_UNLOAD_DISABLE (0x0001)
1411
1410
#ifndef MPI3_DRIVER2_TRIGGER_MAX
1412
1411
#define MPI3_DRIVER2_TRIGGER_MAX (1)
1413
1412
#endif
···
1564
1561
u8 consumer;
1565
1562
__le16 key_data_size;
1566
1563
__le32 additional_key_data;
1567
-
__le32 reserved08[2];
1564
+
u8 library_version;
1565
+
u8 reserved09[3];
1566
+
__le32 reserved0c;
1568
1567
union mpi3_security1_key_data key_data;
1569
1568
};
1570
1569
···
1619
1614
u8 reserved9d[3];
1620
1615
struct mpi3_security2_trusted_root trusted_root[MPI3_SECURITY2_TRUSTED_ROOT_MAX];
1621
1616
};
1617
+
1618
+
struct mpi3_security_page3 {
1619
+
struct mpi3_config_page_header header;
1620
+
__le16 key_data_length;
1621
+
__le16 reserved0a;
1622
+
u8 key_number;
1623
+
u8 reserved0d[3];
1624
+
union mpi3_security_mac mac;
1625
+
union mpi3_security_nonce nonce;
1626
+
__le32 reserved90[12];
1627
+
u8 flags;
1628
+
u8 consumer;
1629
+
__le16 key_data_size;
1630
+
__le32 additional_key_data;
1631
+
u8 library_version;
1632
+
u8 reserved_c9[3];
1633
+
__le32 reserved_cc;
1634
+
u8 key_data[];
1635
+
};
1636
+
1637
+
#define MPI3_SECURITY3_PAGEVERSION (0x00)
1638
+
#define MPI3_SECURITY3_FLAGS_TYPE_MASK (0x0f)
1639
+
#define MPI3_SECURITY3_FLAGS_TYPE_SHIFT (0)
1640
+
#define MPI3_SECURITY3_FLAGS_TYPE_NOT_VALID (0)
1641
+
#define MPI3_SECURITY3_FLAGS_TYPE_MLDSA_PRIVATE (1)
1642
+
#define MPI3_SECURITY3_FLAGS_TYPE_MLDSA_PUBLIC (2)
1643
+
struct mpi3_security_page10 {
1644
+
struct mpi3_config_page_header header;
1645
+
__le32 reserved08[2];
1646
+
union mpi3_security_mac mac;
1647
+
union mpi3_security_nonce nonce;
1648
+
__le64 current_token_nonce;
1649
+
__le64 previous_token_nonce;
1650
+
__le32 reserved_a0[8];
1651
+
u8 diagnostic_auth_id[64];
1652
+
};
1653
+
#define MPI3_SECURITY10_PAGEVERSION (0x00)
1654
+
1655
+
struct mpi3_security_page11 {
1656
+
struct mpi3_config_page_header header;
1657
+
u8 flags;
1658
+
u8 reserved09[3];
1659
+
__le32 reserved0c;
1660
+
__le32 diagnostic_token_length;
1661
+
__le32 reserved14[3];
1662
+
u8 diagnostic_token[];
1663
+
};
1664
+
#define MPI3_SECURITY11_PAGEVERSION (0x00)
1665
+
#define MPI3_SECURITY11_FLAGS_TOKEN_ENABLED (0x01)
1666
+
1667
+
struct mpi3_security12_diag_feature {
1668
+
__le32 feature_identifier;
1669
+
u8 feature_size;
1670
+
u8 feature_type;
1671
+
__le16 reserved06;
1672
+
u8 status;
1673
+
u8 section;
1674
+
__le16 reserved0a;
1675
+
__le32 reserved0c;
1676
+
u8 feature_data[64];
1677
+
};
1678
+
#define MPI3_SECURITY12_DIAG_FEATURE_STATUS_MASK (0x03)
1679
+
#define MPI3_SECURITY12_DIAG_FEATURE_STATUS_SHIFT (0)
1680
+
#define MPI3_SECURITY12_DIAG_FEATURE_STATUS_UNKNOWN (0x00)
1681
+
#define MPI3_SECURITY12_DIAG_FEATURE_STATUS_DISABLED (0x01)
1682
+
#define MPI3_SECURITY12_DIAG_FEATURE_STATUS_ENABLED (0x02)
1683
+
#define MPI3_SECURITY12_DIAG_FEATURE_SECTION_PROTECTED (0x00)
1684
+
#define MPI3_SECURITY12_DIAG_FEATURE_SECTION_UNPROTECTED (0x01)
1685
+
#define MPI3_SECURITY12_DIAG_FEATURE_SECTION_PAYLOAD (0x02)
1686
+
#define MPI3_SECURITY12_DIAG_FEATURE_SECTION_SIGNATURE (0x03)
1687
+
struct mpi3_security_page12 {
1688
+
struct mpi3_config_page_header header;
1689
+
__le32 reserved08[2];
1690
+
u8 num_diag_features;
1691
+
u8 reserved11[3];
1692
+
__le32 reserved14[3];
1693
+
struct mpi3_security12_diag_feature diag_feature[];
1694
+
};
1695
+
1622
1696
#define MPI3_SECURITY2_PAGEVERSION (0x00)
1623
1697
struct mpi3_sas_io_unit0_phy_data {
1624
1698
u8 io_unit_port;
···
2398
2314
u8 attached_phy_identifier;
2399
2315
u8 max_port_connections;
2400
2316
u8 zone_group;
2317
+
u8 reserved10[3];
2318
+
u8 negotiated_link_rate;
2401
2319
};
2402
2320
2403
2321
#define MPI3_DEVICE0_SASSATA_FLAGS_WRITE_SAME_UNMAP_NCQ (0x0400)
+99
-3
drivers/scsi/mpi3mr/mpi/mpi30_image.h
+99
-3
drivers/scsi/mpi3mr/mpi/mpi30_image.h
···
1
1
/* SPDX-License-Identifier: GPL-2.0-or-later */
2
2
/*
3
-
* Copyright 2018-2023 Broadcom Inc. All rights reserved.
3
+
* Copyright 2018-2026 Broadcom Inc. All rights reserved.
4
4
*/
5
5
#ifndef MPI30_IMAGE_H
6
6
#define MPI30_IMAGE_H 1
···
135
135
__le32 package_version_string_offset;
136
136
__le32 package_build_date_string_offset;
137
137
__le32 package_build_time_string_offset;
138
-
__le32 reserved4c;
138
+
__le32 diag_authorization_key_offset;
139
139
__le32 diag_authorization_identifier[16];
140
140
struct mpi3_ci_manifest_mpi_comp_image_ref component_image_ref[MPI3_CI_MANIFEST_MPI_MAX];
141
141
};
···
148
148
#define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_GCA (0x50)
149
149
#define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_POINT (0x60)
150
150
#define MPI3_CI_MANIFEST_MPI_FLAGS_DIAG_AUTHORIZATION (0x01)
151
+
#define MPI3_CI_MANIFEST_MPI_FLAGS_DIAG_AUTH_ANCHOR_MASK (0x06)
152
+
#define MPI3_CI_MANIFEST_MPI_FLAGS_DIAG_AUTH_ANCHOR_SHIFT (1)
153
+
#define MPI3_CI_MANIFEST_MPI_FLAGS_DIAG_AUTH_ANCHOR_IDENTIFIER (0x00)
154
+
#define MPI3_CI_MANIFEST_MPI_FLAGS_DIAG_AUTH_ANCHOR_KEY_OFFSET (0x02)
151
155
#define MPI3_CI_MANIFEST_MPI_SUBSYSTEMID_IGNORED (0xffff)
152
156
#define MPI3_CI_MANIFEST_MPI_PKG_VER_STR_OFF_UNSPECIFIED (0x00000000)
153
157
#define MPI3_CI_MANIFEST_MPI_PKG_BUILD_DATE_STR_OFF_UNSPECIFIED (0x00000000)
154
158
#define MPI3_CI_MANIFEST_MPI_PKG_BUILD_TIME_STR_OFF_UNSPECIFIED (0x00000000)
159
+
160
+
struct mpi3_sb_manifest_ci_digest {
161
+
__le32 signature1;
162
+
__le32 reserved04[2];
163
+
u8 hash_algorithm;
164
+
u8 reserved09[3];
165
+
struct mpi3_comp_image_version component_image_version;
166
+
__le32 component_image_version_string_offset;
167
+
__le32 digest[16];
168
+
};
169
+
170
+
struct mpi3_sb_manifest_ci_ref_element {
171
+
u8 num_ci_digests;
172
+
u8 reserved01[3];
173
+
struct mpi3_sb_manifest_ci_digest ci_digest[];
174
+
};
175
+
176
+
struct mpi3_sb_manifest_embedded_key_element {
177
+
__le32 reserved00[3];
178
+
u8 key_algorithm;
179
+
u8 flags;
180
+
__le16 public_key_size;
181
+
__le32 start_tag;
182
+
__le32 public_key[];
183
+
};
184
+
185
+
#define MPI3_SB_MANIFEST_EMBEDDED_KEY_FLAGS_KEYINDEX_MASK (0x03)
186
+
#define MPI3_SB_MANIFEST_EMBEDDED_KEY_FLAGS_KEYINDEX_STRT (0x00)
187
+
#define MPI3_SB_MANIFEST_EMBEDDED_KEY_FLAGS_KEYINDEX_K2GO (0x01)
188
+
#define MPI3_SB_MANIFEST_EMBEDDED_KEY_STARTTAG_STRT (0x54525453)
189
+
#define MPI3_SB_MANIFEST_EMBEDDED_KEY_STARTTAG_K2GO (0x4f47324b)
190
+
#define MPI3_SB_MANIFEST_EMBEDDED_KEY_ENDTAG_STOP (0x504f5453)
191
+
#define MPI3_SB_MANIFEST_EMBEDDED_KEY_ENDTAG_K2ST (0x5453324b)
192
+
193
+
struct mpi3_sb_manifest_diag_key_element {
194
+
__le32 reserved00[3];
195
+
u8 key_algorithm;
196
+
u8 flags;
197
+
__le16 public_key_size;
198
+
__le32 public_key[];
199
+
};
200
+
201
+
#define MPI3_SB_MANIFEST_DIAG_KEY_FLAGS_KEYINDEX_MASK (0x03)
202
+
#define MPI3_SB_MANIFEST_DIAG_KEY_FLAGS_KEYSELECT_FW_KEY (0x04)
203
+
union mpi3_sb_manifest_element_data {
204
+
struct mpi3_sb_manifest_ci_ref_element ci_ref;
205
+
struct mpi3_sb_manifest_embedded_key_element embed_key;
206
+
struct mpi3_sb_manifest_diag_key_element diag_key;
207
+
__le32 dword;
208
+
};
209
+
struct mpi3_sb_manifest_element {
210
+
u8 manifest_element_form;
211
+
u8 reserved01[3];
212
+
union mpi3_sb_manifest_element_data form_specific[];
213
+
};
214
+
#define MPI3_SB_MANIFEST_ELEMENT_FORM_CI_REFS (0x01)
215
+
#define MPI3_SB_MANIFEST_ELEMENT_FORM_EMBED_KEY (0x02)
216
+
#define MPI3_SB_MANIFEST_ELEMENT_FORM_DIAG_KEY (0x03)
217
+
struct mpi3_sb_manifest_mpi {
218
+
u8 manifest_type;
219
+
u8 reserved01[3];
220
+
__le32 reserved04[3];
221
+
u8 reserved10;
222
+
u8 release_level;
223
+
__le16 reserved12;
224
+
__le16 reserved14;
225
+
__le16 flags;
226
+
__le32 reserved18[2];
227
+
__le16 vendor_id;
228
+
__le16 device_id;
229
+
__le16 subsystem_vendor_id;
230
+
__le16 subsystem_id;
231
+
__le32 reserved28[2];
232
+
union mpi3_version_union package_security_version;
233
+
__le32 reserved34;
234
+
struct mpi3_comp_image_version package_version;
235
+
__le32 package_version_string_offset;
236
+
__le32 package_build_date_string_offset;
237
+
__le32 package_build_time_string_offset;
238
+
__le32 component_image_references_offset;
239
+
__le32 embedded_key0offset;
240
+
__le32 embedded_key1offset;
241
+
__le32 diag_authorization_key_offset;
242
+
__le32 reserved5c[9];
243
+
struct mpi3_sb_manifest_element manifest_elements[];
244
+
};
245
+
155
246
union mpi3_ci_manifest {
156
247
struct mpi3_ci_manifest_mpi mpi;
248
+
struct mpi3_sb_manifest_mpi sb_mpi;
157
249
__le32 dword[1];
158
250
};
159
251
160
-
#define MPI3_CI_MANIFEST_TYPE_MPI (0x00)
252
+
#define MPI3_SB_MANIFEST_APU_IMMEDIATE_DEFER_APU_ENABLE (0x01)
253
+
254
+
#define MPI3_CI_MANIFEST_TYPE_MPI (0x00)
255
+
#define MPI3_CI_MANIFEST_TYPE_SB (0x01)
256
+
161
257
struct mpi3_extended_image_header {
162
258
u8 image_type;
163
259
u8 reserved01[3];
+1
-1
drivers/scsi/mpi3mr/mpi/mpi30_init.h
+1
-1
drivers/scsi/mpi3mr/mpi/mpi30_init.h
+1
drivers/scsi/mpi3mr/mpi/mpi30_ioc.h
+1
drivers/scsi/mpi3mr/mpi/mpi30_ioc.h
···
661
661
#define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RELEASED (0x01)
662
662
#define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_PAUSED (0x02)
663
663
#define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RESUMED (0x03)
664
+
#define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_CLEARED (0x04)
664
665
#define MPI3_PEL_LOCALE_FLAGS_NON_BLOCKING_BOOT_EVENT (0x0200)
665
666
#define MPI3_PEL_LOCALE_FLAGS_BLOCKING_BOOT_EVENT (0x0100)
666
667
#define MPI3_PEL_LOCALE_FLAGS_PCIE (0x0080)
+1
-1
drivers/scsi/mpi3mr/mpi/mpi30_pci.h
+1
-1
drivers/scsi/mpi3mr/mpi/mpi30_pci.h
+1
-1
drivers/scsi/mpi3mr/mpi/mpi30_sas.h
+1
-1
drivers/scsi/mpi3mr/mpi/mpi30_sas.h
+5
-1
drivers/scsi/mpi3mr/mpi/mpi30_tool.h
+5
-1
drivers/scsi/mpi3mr/mpi/mpi30_tool.h
···
1
1
/* SPDX-License-Identifier: GPL-2.0-or-later */
2
2
/*
3
-
* Copyright 2016-2024 Broadcom Inc. All rights reserved.
3
+
* Copyright 2016-2026 Broadcom Inc. All rights reserved.
4
4
*/
5
5
#ifndef MPI30_TOOL_H
6
6
#define MPI30_TOOL_H 1
···
8
8
#define MPI3_DIAG_BUFFER_TYPE_TRACE (0x01)
9
9
#define MPI3_DIAG_BUFFER_TYPE_FW (0x02)
10
10
#define MPI3_DIAG_BUFFER_ACTION_RELEASE (0x01)
11
+
#define MPI3_DIAG_BUFFER_ACTION_PAUSE (0x02)
12
+
#define MPI3_DIAG_BUFFER_ACTION_RESUME (0x03)
13
+
#define MPI3_DIAG_BUFFER_ACTION_CLEAR (0x04)
14
+
11
15
12
16
#define MPI3_DIAG_BUFFER_POST_MSGFLAGS_SEGMENTED (0x01)
13
17
struct mpi3_diag_buffer_post_request {
+2
-2
drivers/scsi/mpi3mr/mpi/mpi30_transport.h
+2
-2
drivers/scsi/mpi3mr/mpi/mpi30_transport.h
···
1
1
/* SPDX-License-Identifier: GPL-2.0-or-later */
2
2
/*
3
-
* Copyright 2016-2023 Broadcom Inc. All rights reserved.
3
+
* Copyright 2016-2026 Broadcom Inc. All rights reserved.
4
4
*/
5
5
#ifndef MPI30_TRANSPORT_H
6
6
#define MPI30_TRANSPORT_H 1
···
18
18
19
19
#define MPI3_VERSION_MAJOR (3)
20
20
#define MPI3_VERSION_MINOR (0)
21
-
#define MPI3_VERSION_UNIT (37)
21
+
#define MPI3_VERSION_UNIT (39)
22
22
#define MPI3_VERSION_DEV (0)
23
23
#define MPI3_DEVHANDLE_INVALID (0xffff)
24
24
struct mpi3_sysif_oper_queue_indexes {
+13
-3
drivers/scsi/mpi3mr/mpi3mr.h
+13
-3
drivers/scsi/mpi3mr/mpi3mr.h
···
56
56
extern int prot_mask;
57
57
extern atomic64_t event_counter;
58
58
59
-
#define MPI3MR_DRIVER_VERSION "8.15.0.5.51"
60
-
#define MPI3MR_DRIVER_RELDATE "18-November-2025"
59
+
#define MPI3MR_DRIVER_VERSION "8.17.0.3.50"
60
+
#define MPI3MR_DRIVER_RELDATE "09-January-2026"
61
61
62
62
#define MPI3MR_DRIVER_NAME "mpi3mr"
63
63
#define MPI3MR_DRIVER_LICENSE "GPL"
···
643
643
* @dev_info: Device information bits
644
644
* @phy_id: Phy identifier provided in device page 0
645
645
* @attached_phy_id: Attached phy identifier provided in device page 0
646
+
* @negotiated_link_rate: Negotiated link rate from device page 0
646
647
* @sas_transport_attached: Is this device exposed to transport
647
648
* @pend_sas_rphy_add: Flag to check device is in process of add
648
649
* @hba_port: HBA port entry
···
655
654
u16 dev_info;
656
655
u8 phy_id;
657
656
u8 attached_phy_id;
657
+
u8 negotiated_link_rate;
658
658
u8 sas_transport_attached;
659
659
u8 pend_sas_rphy_add;
660
660
struct mpi3mr_hba_port *hba_port;
···
1136
1134
* @default_qcount: Total Default queues
1137
1135
* @active_poll_qcount: Currently active poll queue count
1138
1136
* @requested_poll_qcount: User requested poll queue count
1137
+
* @fault_during_init: Indicates a firmware fault occurred during initialization
1138
+
* @saved_fault_code: Firmware fault code captured at the time of failure
1139
+
* @saved_fault_info: Additional firmware-provided fault information
1140
+
* @fwfault_counter: Count of firmware faults detected by the driver
1139
1141
* @bsg_dev: BSG device structure
1140
1142
* @bsg_queue: Request queue for BSG device
1141
1143
* @stop_bsgs: Stop BSG request flag
···
1342
1336
u16 default_qcount;
1343
1337
u16 active_poll_qcount;
1344
1338
u16 requested_poll_qcount;
1339
+
u8 fault_during_init;
1340
+
u32 saved_fault_code;
1341
+
u32 saved_fault_info[3];
1342
+
u64 fwfault_counter;
1345
1343
1346
1344
struct device bsg_dev;
1347
1345
struct request_queue *bsg_queue;
···
1516
1506
struct mpi3mr_drv_cmd *drv_cmd);
1517
1507
int mpi3mr_pel_get_seqnum_post(struct mpi3mr_ioc *mrioc,
1518
1508
struct mpi3mr_drv_cmd *drv_cmd);
1519
-
void mpi3mr_app_save_logdata(struct mpi3mr_ioc *mrioc, char *event_data,
1509
+
void mpi3mr_app_save_logdata_th(struct mpi3mr_ioc *mrioc, char *event_data,
1520
1510
u16 event_data_size);
1521
1511
struct mpi3mr_enclosure_node *mpi3mr_enclosure_find_by_handle(
1522
1512
struct mpi3mr_ioc *mrioc, u16 handle);
+26
-2
drivers/scsi/mpi3mr/mpi3mr_app.c
+26
-2
drivers/scsi/mpi3mr/mpi3mr_app.c
···
2920
2920
}
2921
2921
2922
2922
/**
2923
-
* mpi3mr_app_save_logdata - Save Log Data events
2923
+
* mpi3mr_app_save_logdata_th - Save Log Data events
2924
2924
* @mrioc: Adapter instance reference
2925
2925
* @event_data: event data associated with log data event
2926
2926
* @event_data_size: event data size to copy
···
2932
2932
*
2933
2933
* Return:Nothing
2934
2934
*/
2935
-
void mpi3mr_app_save_logdata(struct mpi3mr_ioc *mrioc, char *event_data,
2935
+
void mpi3mr_app_save_logdata_th(struct mpi3mr_ioc *mrioc, char *event_data,
2936
2936
u16 event_data_size)
2937
2937
{
2938
2938
u32 index = mrioc->logdata_buf_idx, sz;
···
3255
3255
3256
3256
static DEVICE_ATTR_RO(adp_state);
3257
3257
3258
+
/**
3259
+
* fwfault_count_show() - SysFS callback to show firmware fault count
3260
+
* @dev: class device
3261
+
* @attr: Device attribute
3262
+
* @buf: Buffer to copy data into
3263
+
*
3264
+
* Displays the total number of firmware faults detected by the driver
3265
+
* since the controller was initialized.
3266
+
*
3267
+
* Return: Number of bytes written to @buf
3268
+
*/
3269
+
3270
+
static ssize_t
3271
+
fwfault_count_show(struct device *dev, struct device_attribute *attr,
3272
+
char *buf)
3273
+
{
3274
+
struct Scsi_Host *shost = class_to_shost(dev);
3275
+
struct mpi3mr_ioc *mrioc = shost_priv(shost);
3276
+
3277
+
return snprintf(buf, PAGE_SIZE, "%llu\n", mrioc->fwfault_counter);
3278
+
}
3279
+
static DEVICE_ATTR_RO(fwfault_count);
3280
+
3258
3281
static struct attribute *mpi3mr_host_attrs[] = {
3259
3282
&dev_attr_version_fw.attr,
3260
3283
&dev_attr_fw_queue_depth.attr,
···
3286
3263
&dev_attr_reply_qfull_count.attr,
3287
3264
&dev_attr_logging_level.attr,
3288
3265
&dev_attr_adp_state.attr,
3266
+
&dev_attr_fwfault_count.attr,
3289
3267
NULL,
3290
3268
};
3291
3269
+123
-8
drivers/scsi/mpi3mr/mpi3mr_fw.c
+123
-8
drivers/scsi/mpi3mr/mpi3mr_fw.c
···
21
21
static int poll_queues;
22
22
module_param(poll_queues, int, 0444);
23
23
MODULE_PARM_DESC(poll_queues, "Number of queues for io_uring poll mode. (Range 1 - 126)");
24
+
static bool threaded_isr_poll = true;
25
+
module_param(threaded_isr_poll, bool, 0444);
26
+
MODULE_PARM_DESC(threaded_isr_poll,
27
+
"Enablement of IRQ polling thread (default=true)");
24
28
25
29
#if defined(writeq) && defined(CONFIG_64BIT)
26
30
static inline void mpi3mr_writeq(__u64 b, void __iomem *addr,
···
599
595
* Exit completion loop to avoid CPU lockup
600
596
* Ensure remaining completion happens from threaded ISR.
601
597
*/
602
-
if (num_op_reply > mrioc->max_host_ios) {
598
+
if ((num_op_reply > mrioc->max_host_ios) &&
599
+
(threaded_isr_poll == true)) {
603
600
op_reply_q->enable_irq_poll = true;
604
601
break;
605
602
}
···
697
692
* If more IOs are expected, schedule IRQ polling thread.
698
693
* Otherwise exit from ISR.
699
694
*/
700
-
if (!intr_info->op_reply_q)
695
+
if ((threaded_isr_poll == false) || !intr_info->op_reply_q)
701
696
return ret;
702
697
703
698
if (!intr_info->op_reply_q->enable_irq_poll ||
···
776
771
intr_info->msix_index = index;
777
772
intr_info->op_reply_q = NULL;
778
773
779
-
snprintf(intr_info->name, MPI3MR_NAME_LENGTH, "%s%d-msix%d",
780
-
mrioc->driver_name, mrioc->id, index);
774
+
scnprintf(intr_info->name, MPI3MR_NAME_LENGTH,
775
+
"%.32s%d-msix%u", mrioc->driver_name, mrioc->id, index);
781
776
782
777
#ifndef CONFIG_PREEMPT_RT
783
778
retval = request_threaded_irq(pci_irq_vector(pdev, index), mpi3mr_isr,
···
1109
1104
}
1110
1105
1111
1106
/**
1107
+
* mpi3mr_save_fault_info - Save fault information
1108
+
* @mrioc: Adapter instance reference
1109
+
*
1110
+
* Save the controller fault information if there is a
1111
+
* controller fault.
1112
+
*
1113
+
* Return: Nothing.
1114
+
*/
1115
+
static void mpi3mr_save_fault_info(struct mpi3mr_ioc *mrioc)
1116
+
{
1117
+
u32 ioc_status, i;
1118
+
1119
+
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
1120
+
1121
+
if (ioc_status & MPI3_SYSIF_IOC_STATUS_FAULT) {
1122
+
mrioc->saved_fault_code = readl(&mrioc->sysif_regs->fault) &
1123
+
MPI3_SYSIF_FAULT_CODE_MASK;
1124
+
for (i = 0; i < 3; i++) {
1125
+
mrioc->saved_fault_info[i] =
1126
+
readl(&mrioc->sysif_regs->fault_info[i]);
1127
+
}
1128
+
}
1129
+
}
1130
+
1131
+
/**
1112
1132
* mpi3mr_get_iocstate - Get IOC State
1113
1133
* @mrioc: Adapter instance reference
1114
1134
*
···
1272
1242
ioc_warn(mrioc, "cannot allocate DMA memory for the mpt commands\n"
1273
1243
"from the applications, application interface for MPT command is disabled\n");
1274
1244
mpi3mr_free_ioctl_dma_memory(mrioc);
1245
+
}
1246
+
1247
+
/**
1248
+
* mpi3mr_fault_uevent_emit - Emit uevent for any controller
1249
+
* fault
1250
+
* @mrioc: Pointer to the mpi3mr_ioc structure for the controller instance
1251
+
*
1252
+
* This function is invoked when the controller undergoes any
1253
+
* type of fault.
1254
+
*/
1255
+
1256
+
static void mpi3mr_fault_uevent_emit(struct mpi3mr_ioc *mrioc)
1257
+
{
1258
+
struct kobj_uevent_env *env;
1259
+
int ret;
1260
+
1261
+
env = kzalloc(sizeof(*env), GFP_KERNEL);
1262
+
if (!env)
1263
+
return;
1264
+
1265
+
ret = add_uevent_var(env, "DRIVER=%s", mrioc->driver_name);
1266
+
if (ret)
1267
+
goto out_free;
1268
+
1269
+
ret = add_uevent_var(env, "IOC_ID=%u", mrioc->id);
1270
+
if (ret)
1271
+
goto out_free;
1272
+
1273
+
ret = add_uevent_var(env, "FAULT_CODE=0x%08x",
1274
+
mrioc->saved_fault_code);
1275
+
if (ret)
1276
+
goto out_free;
1277
+
1278
+
ret = add_uevent_var(env, "FAULT_INFO0=0x%08x",
1279
+
mrioc->saved_fault_info[0]);
1280
+
if (ret)
1281
+
goto out_free;
1282
+
1283
+
ret = add_uevent_var(env, "FAULT_INFO1=0x%08x",
1284
+
mrioc->saved_fault_info[1]);
1285
+
if (ret)
1286
+
goto out_free;
1287
+
1288
+
ret = add_uevent_var(env, "FAULT_INFO2=0x%08x",
1289
+
mrioc->saved_fault_info[2]);
1290
+
if (ret)
1291
+
goto out_free;
1292
+
1293
+
kobject_uevent_env(&mrioc->shost->shost_gendev.kobj,
1294
+
KOBJ_CHANGE, env->envp);
1295
+
1296
+
out_free:
1297
+
kfree(env);
1298
+
1275
1299
}
1276
1300
1277
1301
/**
···
1559
1475
if (ioc_state == MRIOC_STATE_FAULT) {
1560
1476
timeout = MPI3_SYSIF_DIAG_SAVE_TIMEOUT * 10;
1561
1477
mpi3mr_print_fault_info(mrioc);
1478
+
mpi3mr_save_fault_info(mrioc);
1479
+
mrioc->fault_during_init = 1;
1480
+
mrioc->fwfault_counter++;
1481
+
1562
1482
do {
1563
1483
host_diagnostic =
1564
1484
readl(&mrioc->sysif_regs->host_diagnostic);
···
1789
1701
scratch_pad0 = ((MPI3MR_RESET_REASON_OSTYPE_LINUX <<
1790
1702
MPI3MR_RESET_REASON_OSTYPE_SHIFT) | (mrioc->facts.ioc_num <<
1791
1703
MPI3MR_RESET_REASON_IOCNUM_SHIFT) | reset_reason);
1792
-
writel(reset_reason, &mrioc->sysif_regs->scratchpad[0]);
1704
+
writel(scratch_pad0, &mrioc->sysif_regs->scratchpad[0]);
1705
+
if (reset_type == MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT)
1706
+
mpi3mr_set_diagsave(mrioc);
1793
1707
writel(host_diagnostic | reset_type,
1794
1708
&mrioc->sysif_regs->host_diagnostic);
1795
1709
switch (reset_type) {
···
2660
2570
mpi3mr_set_trigger_data_in_all_hdb(mrioc,
2661
2571
MPI3MR_HDB_TRIGGER_TYPE_FAULT, &trigger_data, 0);
2662
2572
mpi3mr_print_fault_info(mrioc);
2573
+
mpi3mr_save_fault_info(mrioc);
2574
+
mrioc->fault_during_init = 1;
2575
+
mrioc->fwfault_counter++;
2663
2576
return;
2664
2577
}
2665
2578
···
2680
2587
break;
2681
2588
msleep(100);
2682
2589
} while (--timeout);
2590
+
2591
+
mpi3mr_save_fault_info(mrioc);
2592
+
mrioc->fault_during_init = 1;
2593
+
mrioc->fwfault_counter++;
2683
2594
}
2684
2595
2685
2596
/**
···
2860
2763
union mpi3mr_trigger_data trigger_data;
2861
2764
u16 reset_reason = MPI3MR_RESET_FROM_FAULT_WATCH;
2862
2765
2766
+
if (mrioc->fault_during_init) {
2767
+
mpi3mr_fault_uevent_emit(mrioc);
2768
+
mrioc->fault_during_init = 0;
2769
+
}
2770
+
2863
2771
if (mrioc->reset_in_progress || mrioc->pci_err_recovery)
2864
2772
return;
2865
2773
···
2936
2834
mrioc->unrecoverable = 1;
2937
2835
goto schedule_work;
2938
2836
}
2837
+
2838
+
mpi3mr_save_fault_info(mrioc);
2839
+
mpi3mr_fault_uevent_emit(mrioc);
2840
+
mrioc->fwfault_counter++;
2939
2841
2940
2842
switch (trigger_data.fault) {
2941
2843
case MPI3_SYSIF_FAULT_CODE_COMPLETE_RESET_NEEDED:
···
5502
5396
{
5503
5397
int retval = 0, i;
5504
5398
unsigned long flags;
5399
+
enum mpi3mr_iocstate ioc_state;
5505
5400
u32 host_diagnostic, timeout = MPI3_SYSIF_DIAG_SAVE_TIMEOUT * 10;
5506
5401
union mpi3mr_trigger_data trigger_data;
5507
5402
···
5561
5454
mrioc->io_admin_reset_sync = 1;
5562
5455
5563
5456
if (snapdump) {
5564
-
mpi3mr_set_diagsave(mrioc);
5565
5457
retval = mpi3mr_issue_reset(mrioc,
5566
5458
MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, reset_reason);
5567
5459
if (!retval) {
···
5574
5468
break;
5575
5469
msleep(100);
5576
5470
} while (--timeout);
5471
+
5472
+
mpi3mr_save_fault_info(mrioc);
5473
+
mpi3mr_fault_uevent_emit(mrioc);
5474
+
mrioc->fwfault_counter++;
5577
5475
mpi3mr_set_trigger_data_in_all_hdb(mrioc,
5578
5476
MPI3MR_HDB_TRIGGER_TYPE_FAULT, &trigger_data, 0);
5579
5477
}
···
5666
5556
if (mrioc->pel_enabled)
5667
5557
atomic64_inc(&event_counter);
5668
5558
} else {
5669
-
mpi3mr_issue_reset(mrioc,
5670
-
MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, reset_reason);
5559
+
dprint_reset(mrioc,
5560
+
"soft_reset_handler failed, marking controller as unrecoverable\n");
5561
+
ioc_state = mpi3mr_get_iocstate(mrioc);
5562
+
5563
+
if (ioc_state != MRIOC_STATE_FAULT)
5564
+
mpi3mr_issue_reset(mrioc,
5565
+
MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, reset_reason);
5671
5566
mrioc->device_refresh_on = 0;
5672
5567
mrioc->unrecoverable = 1;
5673
5568
mrioc->reset_in_progress = 0;
+99
-3
drivers/scsi/mpi3mr/mpi3mr_os.c
+99
-3
drivers/scsi/mpi3mr/mpi3mr_os.c
···
1139
1139
}
1140
1140
1141
1141
/**
1142
+
* mpi3mr_debug_dump_devpg0 - Dump device page0
1143
+
* @mrioc: Adapter instance reference
1144
+
* @dev_pg0: Device page 0.
1145
+
*
1146
+
* Prints pertinent details of the device page 0.
1147
+
*
1148
+
* Return: Nothing.
1149
+
*/
1150
+
static void
1151
+
mpi3mr_debug_dump_devpg0(struct mpi3mr_ioc *mrioc, struct mpi3_device_page0 *dev_pg0)
1152
+
{
1153
+
ioc_info(mrioc,
1154
+
"device_pg0: handle(0x%04x), perst_id(%d), wwid(0x%016llx), encl_handle(0x%04x), slot(%d)\n",
1155
+
le16_to_cpu(dev_pg0->dev_handle),
1156
+
le16_to_cpu(dev_pg0->persistent_id),
1157
+
le64_to_cpu(dev_pg0->wwid), le16_to_cpu(dev_pg0->enclosure_handle),
1158
+
le16_to_cpu(dev_pg0->slot));
1159
+
ioc_info(mrioc, "device_pg0: access_status(0x%02x), flags(0x%04x), device_form(0x%02x), queue_depth(%d)\n",
1160
+
dev_pg0->access_status, le16_to_cpu(dev_pg0->flags),
1161
+
dev_pg0->device_form, le16_to_cpu(dev_pg0->queue_depth));
1162
+
ioc_info(mrioc, "device_pg0: parent_handle(0x%04x), iounit_port(%d)\n",
1163
+
le16_to_cpu(dev_pg0->parent_dev_handle), dev_pg0->io_unit_port);
1164
+
1165
+
switch (dev_pg0->device_form) {
1166
+
case MPI3_DEVICE_DEVFORM_SAS_SATA:
1167
+
{
1168
+
1169
+
struct mpi3_device0_sas_sata_format *sasinf =
1170
+
&dev_pg0->device_specific.sas_sata_format;
1171
+
ioc_info(mrioc,
1172
+
"device_pg0: sas_sata: sas_address(0x%016llx),flags(0x%04x),\n"
1173
+
"device_info(0x%04x), phy_num(%d), attached_phy_id(%d),negotiated_link_rate(0x%02x)\n",
1174
+
le64_to_cpu(sasinf->sas_address),
1175
+
le16_to_cpu(sasinf->flags),
1176
+
le16_to_cpu(sasinf->device_info), sasinf->phy_num,
1177
+
sasinf->attached_phy_identifier, sasinf->negotiated_link_rate);
1178
+
break;
1179
+
}
1180
+
case MPI3_DEVICE_DEVFORM_PCIE:
1181
+
{
1182
+
1183
+
struct mpi3_device0_pcie_format *pcieinf =
1184
+
&dev_pg0->device_specific.pcie_format;
1185
+
ioc_info(mrioc,
1186
+
"device_pg0: pcie: port_num(%d), device_info(0x%04x), mdts(%d), page_sz(0x%02x)\n",
1187
+
pcieinf->port_num, le16_to_cpu(pcieinf->device_info),
1188
+
le32_to_cpu(pcieinf->maximum_data_transfer_size),
1189
+
pcieinf->page_size);
1190
+
ioc_info(mrioc,
1191
+
"device_pg0: pcie: abort_timeout(%d), reset_timeout(%d) capabilities (0x%08x)\n",
1192
+
pcieinf->nvme_abort_to, pcieinf->controller_reset_to,
1193
+
le32_to_cpu(pcieinf->capabilities));
1194
+
break;
1195
+
}
1196
+
case MPI3_DEVICE_DEVFORM_VD:
1197
+
{
1198
+
1199
+
struct mpi3_device0_vd_format *vdinf =
1200
+
&dev_pg0->device_specific.vd_format;
1201
+
1202
+
ioc_info(mrioc,
1203
+
"device_pg0: vd: state(0x%02x), raid_level(%d), flags(0x%04x),\n"
1204
+
"device_info(0x%04x) abort_timeout(%d), reset_timeout(%d)\n",
1205
+
vdinf->vd_state, vdinf->raid_level,
1206
+
le16_to_cpu(vdinf->flags),
1207
+
le16_to_cpu(vdinf->device_info),
1208
+
vdinf->vd_abort_to, vdinf->vd_reset_to);
1209
+
ioc_info(mrioc,
1210
+
"device_pg0: vd: tg_id(%d), high(%dMiB), low(%dMiB), qd_reduction_factor(%d)\n",
1211
+
vdinf->io_throttle_group,
1212
+
le16_to_cpu(vdinf->io_throttle_group_high),
1213
+
le16_to_cpu(vdinf->io_throttle_group_low),
1214
+
((le16_to_cpu(vdinf->flags) &
1215
+
MPI3_DEVICE0_VD_FLAGS_IO_THROTTLE_GROUP_QD_MASK) >> 12));
1216
+
break;
1217
+
1218
+
}
1219
+
default:
1220
+
break;
1221
+
}
1222
+
}
1223
+
1224
+
/**
1142
1225
* mpi3mr_update_tgtdev - DevStatusChange evt bottomhalf
1143
1226
* @mrioc: Adapter instance reference
1144
1227
* @tgtdev: Target device internal structure
···
1241
1158
struct mpi3mr_stgt_priv_data *scsi_tgt_priv_data = NULL;
1242
1159
struct mpi3mr_enclosure_node *enclosure_dev = NULL;
1243
1160
u8 prot_mask = 0;
1161
+
1162
+
if (mrioc->logging_level &
1163
+
(MPI3_DEBUG_EVENT | MPI3_DEBUG_EVENT_WORK_TASK))
1164
+
mpi3mr_debug_dump_devpg0(mrioc, dev_pg0);
1244
1165
1245
1166
tgtdev->perst_id = le16_to_cpu(dev_pg0->persistent_id);
1246
1167
tgtdev->dev_handle = le16_to_cpu(dev_pg0->dev_handle);
···
1324
1237
tgtdev->dev_spec.sas_sata_inf.phy_id = sasinf->phy_num;
1325
1238
tgtdev->dev_spec.sas_sata_inf.attached_phy_id =
1326
1239
sasinf->attached_phy_identifier;
1240
+
tgtdev->dev_spec.sas_sata_inf.negotiated_link_rate =
1241
+
sasinf->negotiated_link_rate;
1327
1242
if ((dev_info & MPI3_SAS_DEVICE_INFO_DEVICE_TYPE_MASK) !=
1328
1243
MPI3_SAS_DEVICE_INFO_DEVICE_TYPE_END_DEVICE)
1329
1244
tgtdev->is_hidden = 1;
···
2051
1962
static void mpi3mr_logdata_evt_bh(struct mpi3mr_ioc *mrioc,
2052
1963
struct mpi3mr_fwevt *fwevt)
2053
1964
{
2054
-
mpi3mr_app_save_logdata(mrioc, fwevt->event_data,
1965
+
mpi3mr_app_save_logdata_th(mrioc, fwevt->event_data,
2055
1966
fwevt->event_data_size);
2056
1967
}
2057
1968
···
3147
3058
}
3148
3059
case MPI3_EVENT_DEVICE_INFO_CHANGED:
3149
3060
case MPI3_EVENT_LOG_DATA:
3061
+
3062
+
sz = event_reply->event_data_length * 4;
3063
+
mpi3mr_app_save_logdata_th(mrioc,
3064
+
(char *)event_reply->event_data, sz);
3065
+
break;
3150
3066
case MPI3_EVENT_ENCL_DEVICE_STATUS_CHANGE:
3151
3067
case MPI3_EVENT_ENCL_DEVICE_ADDED:
3152
3068
{
···
5475
5381
if (retval < 0)
5476
5382
goto id_alloc_failed;
5477
5383
mrioc->id = (u8)retval;
5478
-
sprintf(mrioc->driver_name, "%s", MPI3MR_DRIVER_NAME);
5479
-
sprintf(mrioc->name, "%s%d", mrioc->driver_name, mrioc->id);
5384
+
strscpy(mrioc->driver_name, MPI3MR_DRIVER_NAME,
5385
+
sizeof(mrioc->driver_name));
5386
+
scnprintf(mrioc->name, sizeof(mrioc->name),
5387
+
"%s%u", mrioc->driver_name, mrioc->id);
5480
5388
INIT_LIST_HEAD(&mrioc->list);
5481
5389
spin_lock(&mrioc_list_lock);
5482
5390
list_add_tail(&mrioc->list, &mrioc_list);
+18
-12
drivers/scsi/mpi3mr/mpi3mr_transport.c
+18
-12
drivers/scsi/mpi3mr/mpi3mr_transport.c
···
2284
2284
* @mrioc: Adapter instance reference
2285
2285
* @tgtdev: Target device
2286
2286
*
2287
-
* This function identifies whether the target device is
2288
-
* attached directly or through expander and issues sas phy
2289
-
* page0 or expander phy page1 and gets the link rate, if there
2290
-
* is any failure in reading the pages then this returns link
2291
-
* rate of 1.5.
2287
+
* This function first tries to use the link rate from DevicePage0
2288
+
* (populated by firmware during device discovery). If the cached
2289
+
* value is not available or invalid, it falls back to reading from
2290
+
* sas phy page0 or expander phy page1.
2291
+
*
2292
2292
*
2293
2293
* Return: logical link rate.
2294
2294
*/
···
2301
2301
u32 phynum_handle;
2302
2302
u16 ioc_status;
2303
2303
2304
+
/* First, try to use link rate from DevicePage0 (populated by firmware) */
2305
+
if (tgtdev->dev_spec.sas_sata_inf.negotiated_link_rate >=
2306
+
MPI3_SAS_NEG_LINK_RATE_1_5) {
2307
+
link_rate = tgtdev->dev_spec.sas_sata_inf.negotiated_link_rate;
2308
+
goto out;
2309
+
}
2310
+
2311
+
/* Fallback to reading from phy pages if DevicePage0 value not available */
2304
2312
phy_number = tgtdev->dev_spec.sas_sata_inf.phy_id;
2305
2313
if (!(tgtdev->devpg0_flag & MPI3_DEVICE0_FLAGS_ATT_METHOD_DIR_ATTACHED)) {
2306
2314
phynum_handle = ((phy_number<<MPI3_SAS_EXPAND_PGAD_PHYNUM_SHIFT)
···
2326
2318
__FILE__, __LINE__, __func__);
2327
2319
goto out;
2328
2320
}
2329
-
link_rate = (expander_pg1.negotiated_link_rate &
2330
-
MPI3_SAS_NEG_LINK_RATE_LOGICAL_MASK) >>
2331
-
MPI3_SAS_NEG_LINK_RATE_LOGICAL_SHIFT;
2321
+
link_rate = expander_pg1.negotiated_link_rate;
2332
2322
goto out;
2333
2323
}
2334
2324
if (mpi3mr_cfg_get_sas_phy_pg0(mrioc, &ioc_status, &phy_pg0,
···
2341
2335
__FILE__, __LINE__, __func__);
2342
2336
goto out;
2343
2337
}
2344
-
link_rate = (phy_pg0.negotiated_link_rate &
2345
-
MPI3_SAS_NEG_LINK_RATE_LOGICAL_MASK) >>
2346
-
MPI3_SAS_NEG_LINK_RATE_LOGICAL_SHIFT;
2338
+
link_rate = phy_pg0.negotiated_link_rate;
2339
+
2347
2340
out:
2348
-
return link_rate;
2341
+
return ((link_rate & MPI3_SAS_NEG_LINK_RATE_LOGICAL_MASK) >>
2342
+
MPI3_SAS_NEG_LINK_RATE_LOGICAL_SHIFT);
2349
2343
}
2350
2344
2351
2345
/**