Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'mmc-v4.20-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC fixes from Ulf Hansson:
"MMC core:
- Restore code to allow BKOPS and CACHE ctrl even if no HPI support
- Reset HPI enabled state during re-init
- Use a default minimum timeout when enabling CACHE ctrl

MMC host:
- omap_hsmmc: Fix DMA API warning
- sdhci-tegra: Fix dt parsing of SDMMC pads autocal values
- Correct register accesses when enabling v4 mode"

* tag 'mmc-v4.20-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
mmc: core: Use a minimum 1600ms timeout when enabling CACHE ctrl
mmc: core: Allow BKOPS and CACHE ctrl even if no HPI support
mmc: core: Reset HPI enabled state during re-init and in case of errors
mmc: omap_hsmmc: fix DMA API warning
mmc: tegra: Fix for SDMMC pads autocal parsing from dt
mmc: sdhci: Fix sdhci_do_enable_v4_mode

+32 -16
+15 -9
drivers/mmc/core/mmc.c
··· 30 30 #include "pwrseq.h" 31 31 32 32 #define DEFAULT_CMD6_TIMEOUT_MS 500 33 + #define MIN_CACHE_EN_TIMEOUT_MS 1600 33 34 34 35 static const unsigned int tran_exp[] = { 35 36 10000, 100000, 1000000, 10000000, ··· 527 526 card->cid.year += 16; 528 527 529 528 /* check whether the eMMC card supports BKOPS */ 530 - if (!mmc_card_broken_hpi(card) && 531 - ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1) { 529 + if (ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1) { 532 530 card->ext_csd.bkops = 1; 533 531 card->ext_csd.man_bkops_en = 534 532 (ext_csd[EXT_CSD_BKOPS_EN] & ··· 1782 1782 if (err) { 1783 1783 pr_warn("%s: Enabling HPI failed\n", 1784 1784 mmc_hostname(card->host)); 1785 + card->ext_csd.hpi_en = 0; 1785 1786 err = 0; 1786 - } else 1787 + } else { 1787 1788 card->ext_csd.hpi_en = 1; 1789 + } 1788 1790 } 1789 1791 1790 1792 /* 1791 - * If cache size is higher than 0, this indicates 1792 - * the existence of cache and it can be turned on. 1793 + * If cache size is higher than 0, this indicates the existence of cache 1794 + * and it can be turned on. Note that some eMMCs from Micron has been 1795 + * reported to need ~800 ms timeout, while enabling the cache after 1796 + * sudden power failure tests. Let's extend the timeout to a minimum of 1797 + * DEFAULT_CACHE_EN_TIMEOUT_MS and do it for all cards. 1793 1798 */ 1794 - if (!mmc_card_broken_hpi(card) && 1795 - card->ext_csd.cache_size > 0) { 1799 + if (card->ext_csd.cache_size > 0) { 1800 + unsigned int timeout_ms = MIN_CACHE_EN_TIMEOUT_MS; 1801 + 1802 + timeout_ms = max(card->ext_csd.generic_cmd6_time, timeout_ms); 1796 1803 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, 1797 - EXT_CSD_CACHE_CTRL, 1, 1798 - card->ext_csd.generic_cmd6_time); 1804 + EXT_CSD_CACHE_CTRL, 1, timeout_ms); 1799 1805 if (err && err != -EBADMSG) 1800 1806 goto free_card; 1801 1807
+11 -1
drivers/mmc/host/omap_hsmmc.c
··· 1909 1909 mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 1910 1910 mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 1911 1911 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1912 - mmc->max_seg_size = mmc->max_req_size; 1913 1912 1914 1913 mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 1915 1914 MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE | MMC_CAP_CMD23; ··· 1937 1938 ret = PTR_ERR(host->tx_chan); 1938 1939 goto err_irq; 1939 1940 } 1941 + 1942 + /* 1943 + * Limit the maximum segment size to the lower of the request size 1944 + * and the DMA engine device segment size limits. In reality, with 1945 + * 32-bit transfers, the DMA engine can do longer segments than this 1946 + * but there is no way to represent that in the DMA model - if we 1947 + * increase this figure here, we get warnings from the DMA API debug. 1948 + */ 1949 + mmc->max_seg_size = min3(mmc->max_req_size, 1950 + dma_get_max_seg_size(host->rx_chan->device->dev), 1951 + dma_get_max_seg_size(host->tx_chan->device->dev)); 1940 1952 1941 1953 /* Request IRQ for MMC operations */ 1942 1954 ret = devm_request_irq(&pdev->dev, host->irq, omap_hsmmc_irq, 0,
+4 -4
drivers/mmc/host/sdhci-tegra.c
··· 510 510 511 511 err = device_property_read_u32(host->mmc->parent, 512 512 "nvidia,pad-autocal-pull-up-offset-3v3-timeout", 513 - &autocal->pull_up_3v3); 513 + &autocal->pull_up_3v3_timeout); 514 514 if (err) 515 515 autocal->pull_up_3v3_timeout = 0; 516 516 517 517 err = device_property_read_u32(host->mmc->parent, 518 518 "nvidia,pad-autocal-pull-down-offset-3v3-timeout", 519 - &autocal->pull_down_3v3); 519 + &autocal->pull_down_3v3_timeout); 520 520 if (err) 521 521 autocal->pull_down_3v3_timeout = 0; 522 522 523 523 err = device_property_read_u32(host->mmc->parent, 524 524 "nvidia,pad-autocal-pull-up-offset-1v8-timeout", 525 - &autocal->pull_up_1v8); 525 + &autocal->pull_up_1v8_timeout); 526 526 if (err) 527 527 autocal->pull_up_1v8_timeout = 0; 528 528 529 529 err = device_property_read_u32(host->mmc->parent, 530 530 "nvidia,pad-autocal-pull-down-offset-1v8-timeout", 531 - &autocal->pull_down_1v8); 531 + &autocal->pull_down_1v8_timeout); 532 532 if (err) 533 533 autocal->pull_down_1v8_timeout = 0; 534 534
+2 -2
drivers/mmc/host/sdhci.c
··· 127 127 { 128 128 u16 ctrl2; 129 129 130 - ctrl2 = sdhci_readb(host, SDHCI_HOST_CONTROL2); 130 + ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); 131 131 if (ctrl2 & SDHCI_CTRL_V4_MODE) 132 132 return; 133 133 134 134 ctrl2 |= SDHCI_CTRL_V4_MODE; 135 - sdhci_writeb(host, ctrl2, SDHCI_HOST_CONTROL); 135 + sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); 136 136 } 137 137 138 138 /*