Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Ingo Molnar:
"A regression fix for a crash, and a Intel HSW uncore PMU driver fix"
* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
Revert "perf/x86/intel/uncore: Move uncore_box_init() out of driver initialization"
perf/x86/intel/uncore: Fix CBOX bit wide and UBOX reg on Haswell-EP
+18
-15
+7
-2
arch/x86/kernel/cpu/perf_event_intel_uncore.c
+7
-2
arch/x86/kernel/cpu/perf_event_intel_uncore.c
···
839
839
box->phys_id = phys_id;
840
840
box->pci_dev = pdev;
841
841
box->pmu = pmu;
842
+
uncore_box_init(box);
842
843
pci_set_drvdata(pdev, box);
843
844
844
845
raw_spin_lock(&uncore_box_lock);
···
1003
1002
pmu = &type->pmus[j];
1004
1003
box = *per_cpu_ptr(pmu->box, cpu);
1005
1004
/* called by uncore_cpu_init? */
1006
-
if (box && box->phys_id >= 0)
1005
+
if (box && box->phys_id >= 0) {
1006
+
uncore_box_init(box);
1007
1007
continue;
1008
+
}
1008
1009
1009
1010
for_each_online_cpu(k) {
1010
1011
exist = *per_cpu_ptr(pmu->box, k);
···
1022
1019
}
1023
1020
}
1024
1021
1025
-
if (box)
1022
+
if (box) {
1026
1023
box->phys_id = phys_id;
1024
+
uncore_box_init(box);
1025
+
}
1027
1026
}
1028
1027
}
1029
1028
return 0;
+8
-10
arch/x86/kernel/cpu/perf_event_intel_uncore.h
+8
-10
arch/x86/kernel/cpu/perf_event_intel_uncore.h
···
258
258
return box->pmu->type->num_counters;
259
259
}
260
260
261
-
static inline void uncore_box_init(struct intel_uncore_box *box)
262
-
{
263
-
if (!test_and_set_bit(UNCORE_BOX_FLAG_INITIATED, &box->flags)) {
264
-
if (box->pmu->type->ops->init_box)
265
-
box->pmu->type->ops->init_box(box);
266
-
}
267
-
}
268
-
269
261
static inline void uncore_disable_box(struct intel_uncore_box *box)
270
262
{
271
263
if (box->pmu->type->ops->disable_box)
···
266
274
267
275
static inline void uncore_enable_box(struct intel_uncore_box *box)
268
276
{
269
-
uncore_box_init(box);
270
-
271
277
if (box->pmu->type->ops->enable_box)
272
278
box->pmu->type->ops->enable_box(box);
273
279
}
···
286
296
struct perf_event *event)
287
297
{
288
298
return box->pmu->type->ops->read_counter(box, event);
299
+
}
300
+
301
+
static inline void uncore_box_init(struct intel_uncore_box *box)
302
+
{
303
+
if (!test_and_set_bit(UNCORE_BOX_FLAG_INITIATED, &box->flags)) {
304
+
if (box->pmu->type->ops->init_box)
305
+
box->pmu->type->ops->init_box(box);
306
+
}
289
307
}
290
308
291
309
static inline bool uncore_box_is_fake(struct intel_uncore_box *box)
+3
-3
arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c
+3
-3
arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c
···
164
164
((1ULL << (n)) - 1)))
165
165
166
166
/* Haswell-EP Ubox */
167
-
#define HSWEP_U_MSR_PMON_CTR0 0x705
168
-
#define HSWEP_U_MSR_PMON_CTL0 0x709
167
+
#define HSWEP_U_MSR_PMON_CTR0 0x709
168
+
#define HSWEP_U_MSR_PMON_CTL0 0x705
169
169
#define HSWEP_U_MSR_PMON_FILTER 0x707
170
170
171
171
#define HSWEP_U_MSR_PMON_UCLK_FIXED_CTL 0x703
···
1914
1914
.name = "cbox",
1915
1915
.num_counters = 4,
1916
1916
.num_boxes = 18,
1917
-
.perf_ctr_bits = 44,
1917
+
.perf_ctr_bits = 48,
1918
1918
.event_ctl = HSWEP_C0_MSR_PMON_CTL0,
1919
1919
.perf_ctr = HSWEP_C0_MSR_PMON_CTR0,
1920
1920
.event_mask = SNBEP_CBO_MSR_PMON_RAW_EVENT_MASK,