drm/omap: Add ability to check if requested plane modes can be supported

We currently assume that an overlay has the same maximum width and
maximum height as the overlay manager. This assumption is incorrect. On
some variants the overlay manager maximum width is twice the maximum
width that the overlay can handle. We need to add the appropriate data
per variant as well as export a helper function to retrieve the data so
check can be made dynamically in omap_plane_atomic_check().

Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211117141928.771082-3-narmstrong@baylibre.com

authored by

Benoit Parrot and committed by

Tomi Valkeinen 4 years ago d484c20d c21134b0

+38

3 changed files

expand all

drivers

gpu

drm

omapdrm

dss

dispc.c

dss.h

omap_plane.c

+22

drivers/gpu/drm/omapdrm/dss/dispc.c

··· 92 92 u8 mgr_height_start; 93 93 u16 mgr_width_max; 94 94 u16 mgr_height_max; 95 + u16 ovl_width_max; 96 + u16 ovl_height_max; 95 97 unsigned long max_lcd_pclk; 96 98 unsigned long max_tv_pclk; 97 99 unsigned int max_downscale; ··· 2601 2599 return 0; 2602 2600 } 2603 2601 2602 + void dispc_ovl_get_max_size(struct dispc_device *dispc, u16 *width, u16 *height) 2603 + { 2604 + *width = dispc->feat->ovl_width_max; 2605 + *height = dispc->feat->ovl_height_max; 2606 + } 2607 + 2604 2608 static int dispc_ovl_setup_common(struct dispc_device *dispc, 2605 2609 enum omap_plane_id plane, 2606 2610 enum omap_overlay_caps caps, ··· 4248 4240 .mgr_height_start = 26, 4249 4241 .mgr_width_max = 2048, 4250 4242 .mgr_height_max = 2048, 4243 + .ovl_width_max = 2048, 4244 + .ovl_height_max = 2048, 4251 4245 .max_lcd_pclk = 66500000, 4252 4246 .max_downscale = 2, 4253 4247 /* ··· 4288 4278 .mgr_height_start = 26, 4289 4279 .mgr_width_max = 2048, 4290 4280 .mgr_height_max = 2048, 4281 + .ovl_width_max = 2048, 4282 + .ovl_height_max = 2048, 4291 4283 .max_lcd_pclk = 173000000, 4292 4284 .max_tv_pclk = 59000000, 4293 4285 .max_downscale = 4, ··· 4325 4313 .mgr_height_start = 26, 4326 4314 .mgr_width_max = 2048, 4327 4315 .mgr_height_max = 2048, 4316 + .ovl_width_max = 2048, 4317 + .ovl_height_max = 2048, 4328 4318 .max_lcd_pclk = 173000000, 4329 4319 .max_tv_pclk = 59000000, 4330 4320 .max_downscale = 4, ··· 4362 4348 .mgr_height_start = 26, 4363 4349 .mgr_width_max = 2048, 4364 4350 .mgr_height_max = 2048, 4351 + .ovl_width_max = 2048, 4352 + .ovl_height_max = 2048, 4365 4353 .max_lcd_pclk = 173000000, 4366 4354 .max_tv_pclk = 59000000, 4367 4355 .max_downscale = 4, ··· 4399 4383 .mgr_height_start = 26, 4400 4384 .mgr_width_max = 2048, 4401 4385 .mgr_height_max = 2048, 4386 + .ovl_width_max = 2048, 4387 + .ovl_height_max = 2048, 4402 4388 .max_lcd_pclk = 173000000, 4403 4389 .max_tv_pclk = 59000000, 4404 4390 .max_downscale = 4, ··· 4436 4418 .mgr_height_start = 26, 4437 4419 .mgr_width_max = 2048, 4438 4420 .mgr_height_max = 2048, 4421 + .ovl_width_max = 2048, 4422 + .ovl_height_max = 2048, 4439 4423 .max_lcd_pclk = 170000000, 4440 4424 .max_tv_pclk = 185625000, 4441 4425 .max_downscale = 4, ··· 4477 4457 .mgr_height_start = 27, 4478 4458 .mgr_width_max = 4096, 4479 4459 .mgr_height_max = 4096, 4460 + .ovl_width_max = 2048, 4461 + .ovl_height_max = 4096, 4480 4462 .max_lcd_pclk = 170000000, 4481 4463 .max_tv_pclk = 192000000, 4482 4464 .max_downscale = 4,

drivers/gpu/drm/omapdrm/dss/dss.h

··· 397 397 const u32 *dispc_ovl_get_color_modes(struct dispc_device *dispc, 398 398 enum omap_plane_id plane); 399 399 400 + void dispc_ovl_get_max_size(struct dispc_device *dispc, u16 *width, u16 *height); 401 + 400 402 u32 dispc_read_irqstatus(struct dispc_device *dispc); 401 403 void dispc_clear_irqstatus(struct dispc_device *dispc, u32 mask); 402 404 void dispc_write_irqenable(struct dispc_device *dispc, u32 mask);

+14

drivers/gpu/drm/omapdrm/omap_plane.c

··· 111 111 { 112 112 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, 113 113 plane); 114 + struct omap_drm_private *priv = plane->dev->dev_private; 114 115 struct drm_crtc_state *crtc_state; 116 + u32 max_width, max_height; 117 + u16 width, height; 115 118 int ret; 116 119 117 120 if (!new_plane_state->fb) 118 121 return 0; 122 + 123 + dispc_ovl_get_max_size(priv->dispc, &width, &height); 124 + max_width = width << 16; 125 + max_height = height << 16; 119 126 120 127 /* crtc should only be NULL when disabling (i.e., !new_plane_state->fb) */ 121 128 if (WARN_ON(!new_plane_state->crtc)) ··· 156 149 return -EINVAL; 157 150 158 151 if (new_plane_state->crtc_y + new_plane_state->crtc_h > crtc_state->adjusted_mode.vdisplay) 152 + return -EINVAL; 153 + 154 + /* Make sure dimensions are within bounds. */ 155 + if (new_plane_state->src_h > max_height || new_plane_state->crtc_h > height) 156 + return -EINVAL; 157 + 158 + if (new_plane_state->src_w > max_width || new_plane_state->crtc_w > width) 159 159 return -EINVAL; 160 160 161 161 if (new_plane_state->rotation != DRM_MODE_ROTATE_0 &&

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