tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
"Here's the latest pile of clk driver and clk framework fixes for this
release:

- Two clk framework fixes for a long standing issue in
clk_notifier_{register,unregister}() where we used a pointer that
was for a struct containing a list head when there was no container
struct

- A compile warning fix for socfpga that's good to have

- A double free problem with devm registered fixed factor clks

- One last fix to the Qualcomm camera clk driver to use the right clk
ops so clks don't get stuck and stop working because the firmware
takes them for a ride"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: fixed: fix double free in resource managed fixed-factor clock
clk: fix invalid usage of list cursor in unregister
clk: fix invalid usage of list cursor in register
clk: qcom: camcc: Update the clock ops for the SC7180
clk: socfpga: fix iomem pointer cast on 64-bit

Linus Torvalds d4961772 9288e1f7

+56 -54
+8 -1
drivers/clk/clk-fixed-factor.c
··· 66 66 67 67 static void devm_clk_hw_register_fixed_factor_release(struct device *dev, void *res) 68 68 { 69 - clk_hw_unregister_fixed_factor(&((struct clk_fixed_factor *)res)->hw); 69 + struct clk_fixed_factor *fix = res; 70 + 71 + /* 72 + * We can not use clk_hw_unregister_fixed_factor, since it will kfree() 73 + * the hw, resulting in double free. Just unregister the hw and let 74 + * devres code kfree() it. 75 + */ 76 + clk_hw_unregister(&fix->hw); 70 77 } 71 78 72 79 static struct clk_hw *
+22 -27
drivers/clk/clk.c
··· 4357 4357 /* search the list of notifiers for this clk */ 4358 4358 list_for_each_entry(cn, &clk_notifier_list, node) 4359 4359 if (cn->clk == clk) 4360 - break; 4360 + goto found; 4361 4361 4362 4362 /* if clk wasn't in the notifier list, allocate new clk_notifier */ 4363 - if (cn->clk != clk) { 4364 - cn = kzalloc(sizeof(*cn), GFP_KERNEL); 4365 - if (!cn) 4366 - goto out; 4363 + cn = kzalloc(sizeof(*cn), GFP_KERNEL); 4364 + if (!cn) 4365 + goto out; 4367 4366 4368 - cn->clk = clk; 4369 - srcu_init_notifier_head(&cn->notifier_head); 4367 + cn->clk = clk; 4368 + srcu_init_notifier_head(&cn->notifier_head); 4370 4369 4371 - list_add(&cn->node, &clk_notifier_list); 4372 - } 4370 + list_add(&cn->node, &clk_notifier_list); 4373 4371 4372 + found: 4374 4373 ret = srcu_notifier_chain_register(&cn->notifier_head, nb); 4375 4374 4376 4375 clk->core->notifier_count++; ··· 4394 4395 */ 4395 4396 int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) 4396 4397 { 4397 - struct clk_notifier *cn = NULL; 4398 - int ret = -EINVAL; 4398 + struct clk_notifier *cn; 4399 + int ret = -ENOENT; 4399 4400 4400 4401 if (!clk || !nb) 4401 4402 return -EINVAL; 4402 4403 4403 4404 clk_prepare_lock(); 4404 4405 4405 - list_for_each_entry(cn, &clk_notifier_list, node) 4406 - if (cn->clk == clk) 4406 + list_for_each_entry(cn, &clk_notifier_list, node) { 4407 + if (cn->clk == clk) { 4408 + ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); 4409 + 4410 + clk->core->notifier_count--; 4411 + 4412 + /* XXX the notifier code should handle this better */ 4413 + if (!cn->notifier_head.head) { 4414 + srcu_cleanup_notifier_head(&cn->notifier_head); 4415 + list_del(&cn->node); 4416 + kfree(cn); 4417 + } 4407 4418 break; 4408 - 4409 - if (cn->clk == clk) { 4410 - ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); 4411 - 4412 - clk->core->notifier_count--; 4413 - 4414 - /* XXX the notifier code should handle this better */ 4415 - if (!cn->notifier_head.head) { 4416 - srcu_cleanup_notifier_head(&cn->notifier_head); 4417 - list_del(&cn->node); 4418 - kfree(cn); 4419 4419 } 4420 - 4421 - } else { 4422 - ret = -ENOENT; 4423 4420 } 4424 4421 4425 4422 clk_prepare_unlock();
+25 -25
drivers/clk/qcom/camcc-sc7180.c
··· 304 304 .name = "cam_cc_bps_clk_src", 305 305 .parent_data = cam_cc_parent_data_2, 306 306 .num_parents = 5, 307 - .ops = &clk_rcg2_ops, 307 + .ops = &clk_rcg2_shared_ops, 308 308 }, 309 309 }; 310 310 ··· 325 325 .name = "cam_cc_cci_0_clk_src", 326 326 .parent_data = cam_cc_parent_data_5, 327 327 .num_parents = 3, 328 - .ops = &clk_rcg2_ops, 328 + .ops = &clk_rcg2_shared_ops, 329 329 }, 330 330 }; 331 331 ··· 339 339 .name = "cam_cc_cci_1_clk_src", 340 340 .parent_data = cam_cc_parent_data_5, 341 341 .num_parents = 3, 342 - .ops = &clk_rcg2_ops, 342 + .ops = &clk_rcg2_shared_ops, 343 343 }, 344 344 }; 345 345 ··· 360 360 .name = "cam_cc_cphy_rx_clk_src", 361 361 .parent_data = cam_cc_parent_data_3, 362 362 .num_parents = 6, 363 - .ops = &clk_rcg2_ops, 363 + .ops = &clk_rcg2_shared_ops, 364 364 }, 365 365 }; 366 366 ··· 379 379 .name = "cam_cc_csi0phytimer_clk_src", 380 380 .parent_data = cam_cc_parent_data_0, 381 381 .num_parents = 4, 382 - .ops = &clk_rcg2_ops, 382 + .ops = &clk_rcg2_shared_ops, 383 383 }, 384 384 }; 385 385 ··· 393 393 .name = "cam_cc_csi1phytimer_clk_src", 394 394 .parent_data = cam_cc_parent_data_0, 395 395 .num_parents = 4, 396 - .ops = &clk_rcg2_ops, 396 + .ops = &clk_rcg2_shared_ops, 397 397 }, 398 398 }; 399 399 ··· 407 407 .name = "cam_cc_csi2phytimer_clk_src", 408 408 .parent_data = cam_cc_parent_data_0, 409 409 .num_parents = 4, 410 - .ops = &clk_rcg2_ops, 410 + .ops = &clk_rcg2_shared_ops, 411 411 }, 412 412 }; 413 413 ··· 421 421 .name = "cam_cc_csi3phytimer_clk_src", 422 422 .parent_data = cam_cc_parent_data_0, 423 423 .num_parents = 4, 424 - .ops = &clk_rcg2_ops, 424 + .ops = &clk_rcg2_shared_ops, 425 425 }, 426 426 }; 427 427 ··· 443 443 .name = "cam_cc_fast_ahb_clk_src", 444 444 .parent_data = cam_cc_parent_data_0, 445 445 .num_parents = 4, 446 - .ops = &clk_rcg2_ops, 446 + .ops = &clk_rcg2_shared_ops, 447 447 }, 448 448 }; 449 449 ··· 466 466 .name = "cam_cc_icp_clk_src", 467 467 .parent_data = cam_cc_parent_data_2, 468 468 .num_parents = 5, 469 - .ops = &clk_rcg2_ops, 469 + .ops = &clk_rcg2_shared_ops, 470 470 }, 471 471 }; 472 472 ··· 488 488 .name = "cam_cc_ife_0_clk_src", 489 489 .parent_data = cam_cc_parent_data_4, 490 490 .num_parents = 4, 491 - .ops = &clk_rcg2_ops, 491 + .ops = &clk_rcg2_shared_ops, 492 492 }, 493 493 }; 494 494 ··· 510 510 .name = "cam_cc_ife_0_csid_clk_src", 511 511 .parent_data = cam_cc_parent_data_3, 512 512 .num_parents = 6, 513 - .ops = &clk_rcg2_ops, 513 + .ops = &clk_rcg2_shared_ops, 514 514 }, 515 515 }; 516 516 ··· 524 524 .name = "cam_cc_ife_1_clk_src", 525 525 .parent_data = cam_cc_parent_data_4, 526 526 .num_parents = 4, 527 - .ops = &clk_rcg2_ops, 527 + .ops = &clk_rcg2_shared_ops, 528 528 }, 529 529 }; 530 530 ··· 538 538 .name = "cam_cc_ife_1_csid_clk_src", 539 539 .parent_data = cam_cc_parent_data_3, 540 540 .num_parents = 6, 541 - .ops = &clk_rcg2_ops, 541 + .ops = &clk_rcg2_shared_ops, 542 542 }, 543 543 }; 544 544 ··· 553 553 .parent_data = cam_cc_parent_data_4, 554 554 .num_parents = 4, 555 555 .flags = CLK_SET_RATE_PARENT, 556 - .ops = &clk_rcg2_ops, 556 + .ops = &clk_rcg2_shared_ops, 557 557 }, 558 558 }; 559 559 ··· 567 567 .name = "cam_cc_ife_lite_csid_clk_src", 568 568 .parent_data = cam_cc_parent_data_3, 569 569 .num_parents = 6, 570 - .ops = &clk_rcg2_ops, 570 + .ops = &clk_rcg2_shared_ops, 571 571 }, 572 572 }; 573 573 ··· 590 590 .name = "cam_cc_ipe_0_clk_src", 591 591 .parent_data = cam_cc_parent_data_2, 592 592 .num_parents = 5, 593 - .ops = &clk_rcg2_ops, 593 + .ops = &clk_rcg2_shared_ops, 594 594 }, 595 595 }; 596 596 ··· 613 613 .name = "cam_cc_jpeg_clk_src", 614 614 .parent_data = cam_cc_parent_data_2, 615 615 .num_parents = 5, 616 - .ops = &clk_rcg2_ops, 616 + .ops = &clk_rcg2_shared_ops, 617 617 }, 618 618 }; 619 619 ··· 635 635 .name = "cam_cc_lrme_clk_src", 636 636 .parent_data = cam_cc_parent_data_6, 637 637 .num_parents = 5, 638 - .ops = &clk_rcg2_ops, 638 + .ops = &clk_rcg2_shared_ops, 639 639 }, 640 640 }; 641 641 ··· 656 656 .name = "cam_cc_mclk0_clk_src", 657 657 .parent_data = cam_cc_parent_data_1, 658 658 .num_parents = 3, 659 - .ops = &clk_rcg2_ops, 659 + .ops = &clk_rcg2_shared_ops, 660 660 }, 661 661 }; 662 662 ··· 670 670 .name = "cam_cc_mclk1_clk_src", 671 671 .parent_data = cam_cc_parent_data_1, 672 672 .num_parents = 3, 673 - .ops = &clk_rcg2_ops, 673 + .ops = &clk_rcg2_shared_ops, 674 674 }, 675 675 }; 676 676 ··· 684 684 .name = "cam_cc_mclk2_clk_src", 685 685 .parent_data = cam_cc_parent_data_1, 686 686 .num_parents = 3, 687 - .ops = &clk_rcg2_ops, 687 + .ops = &clk_rcg2_shared_ops, 688 688 }, 689 689 }; 690 690 ··· 698 698 .name = "cam_cc_mclk3_clk_src", 699 699 .parent_data = cam_cc_parent_data_1, 700 700 .num_parents = 3, 701 - .ops = &clk_rcg2_ops, 701 + .ops = &clk_rcg2_shared_ops, 702 702 }, 703 703 }; 704 704 ··· 712 712 .name = "cam_cc_mclk4_clk_src", 713 713 .parent_data = cam_cc_parent_data_1, 714 714 .num_parents = 3, 715 - .ops = &clk_rcg2_ops, 715 + .ops = &clk_rcg2_shared_ops, 716 716 }, 717 717 }; 718 718 ··· 732 732 .parent_data = cam_cc_parent_data_0, 733 733 .num_parents = 4, 734 734 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, 735 - .ops = &clk_rcg2_ops, 735 + .ops = &clk_rcg2_shared_ops, 736 736 }, 737 737 }; 738 738
+1 -1
drivers/clk/socfpga/clk-gate.c
··· 99 99 val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; 100 100 val &= GENMASK(socfpgaclk->width - 1, 0); 101 101 /* Check for GPIO_DB_CLK by its offset */ 102 - if ((int) socfpgaclk->div_reg & SOCFPGA_GPIO_DB_CLK_OFFSET) 102 + if ((uintptr_t) socfpgaclk->div_reg & SOCFPGA_GPIO_DB_CLK_OFFSET) 103 103 div = val + 1; 104 104 else 105 105 div = (1 << val);