Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas:
"Two more SME fixes related to ptrace(): ensure that the SME is
properly set up for the target thread and that the thread sees
the ZT registers set via ptrace"
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64/ptrace: Ensure that the task sees ZT writes on first use
arm64/ptrace: Ensure that SME is set up for target when writing SSVE state
+23
-9
+2
-2
arch/arm64/include/asm/fpsimd.h
+2
-2
arch/arm64/include/asm/fpsimd.h
···
356
356
return vec_max_virtualisable_vl(ARM64_VEC_SME);
357
357
}
358
358
359
-
extern void sme_alloc(struct task_struct *task);
359
+
extern void sme_alloc(struct task_struct *task, bool flush);
360
360
extern unsigned int sme_get_vl(void);
361
361
extern int sme_set_current_vl(unsigned long arg);
362
362
extern int sme_get_current_vl(void);
···
388
388
static inline void sme_smstop_sm(void) { }
389
389
static inline void sme_smstop(void) { }
390
390
391
-
static inline void sme_alloc(struct task_struct *task) { }
391
+
static inline void sme_alloc(struct task_struct *task, bool flush) { }
392
392
static inline void sme_setup(void) { }
393
393
static inline unsigned int sme_get_vl(void) { return 0; }
394
394
static inline int sme_max_vl(void) { return 0; }
+3
-3
arch/arm64/kernel/fpsimd.c
+3
-3
arch/arm64/kernel/fpsimd.c
···
1285
1285
* the interest of testability and predictability, the architecture
1286
1286
* guarantees that when ZA is enabled it will be zeroed.
1287
1287
*/
1288
-
void sme_alloc(struct task_struct *task)
1288
+
void sme_alloc(struct task_struct *task, bool flush)
1289
1289
{
1290
-
if (task->thread.sme_state) {
1290
+
if (task->thread.sme_state && flush) {
1291
1291
memset(task->thread.sme_state, 0, sme_state_size(task));
1292
1292
return;
1293
1293
}
···
1515
1515
}
1516
1516
1517
1517
sve_alloc(current, false);
1518
-
sme_alloc(current);
1518
+
sme_alloc(current, true);
1519
1519
if (!current->thread.sve_state || !current->thread.sme_state) {
1520
1520
force_sig(SIGKILL);
1521
1521
return;
+17
-3
arch/arm64/kernel/ptrace.c
+17
-3
arch/arm64/kernel/ptrace.c
···
881
881
break;
882
882
case ARM64_VEC_SME:
883
883
target->thread.svcr |= SVCR_SM_MASK;
884
+
885
+
/*
886
+
* Disable traps and ensure there is SME storage but
887
+
* preserve any currently set values in ZA/ZT.
888
+
*/
889
+
sme_alloc(target, false);
890
+
set_tsk_thread_flag(target, TIF_SME);
884
891
break;
885
892
default:
886
893
WARN_ON_ONCE(1);
···
1107
1100
}
1108
1101
1109
1102
/* Allocate/reinit ZA storage */
1110
-
sme_alloc(target);
1103
+
sme_alloc(target, true);
1111
1104
if (!target->thread.sme_state) {
1112
1105
ret = -ENOMEM;
1113
1106
goto out;
···
1177
1170
if (!system_supports_sme2())
1178
1171
return -EINVAL;
1179
1172
1173
+
/* Ensure SVE storage in case this is first use of SME */
1174
+
sve_alloc(target, false);
1175
+
if (!target->thread.sve_state)
1176
+
return -ENOMEM;
1177
+
1180
1178
if (!thread_za_enabled(&target->thread)) {
1181
-
sme_alloc(target);
1179
+
sme_alloc(target, true);
1182
1180
if (!target->thread.sme_state)
1183
1181
return -ENOMEM;
1184
1182
}
···
1191
1179
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1192
1180
thread_zt_state(&target->thread),
1193
1181
0, ZT_SIG_REG_BYTES);
1194
-
if (ret == 0)
1182
+
if (ret == 0) {
1195
1183
target->thread.svcr |= SVCR_ZA_MASK;
1184
+
set_tsk_thread_flag(target, TIF_SME);
1185
+
}
1196
1186
1197
1187
fpsimd_flush_task_state(target);
1198
1188
+1
-1
arch/arm64/kernel/signal.c
+1
-1
arch/arm64/kernel/signal.c
···
475
475
fpsimd_flush_task_state(current);
476
476
/* From now, fpsimd_thread_switch() won't touch thread.sve_state */
477
477
478
-
sme_alloc(current);
478
+
sme_alloc(current, true);
479
479
if (!current->thread.sme_state) {
480
480
current->thread.svcr &= ~SVCR_ZA_MASK;
481
481
clear_thread_flag(TIF_SME);