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phy/rockchip: inno-hdmi: round fractal pixclock in rk3328 recalc_rate

inno_hdmi_phy_rk3328_clk_recalc_rate() is returning a rate not found
in the pre pll config table when the fractal divider is used.
This can prevent proper power_on because a tmdsclock for the new rate
is not found in the pre pll config table.

Fix this by saving and returning a rounded pixel rate that exist
in the pre pll config table.

Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy")
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20230615171005.2251032-3-jonas@kwiboo.se
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Zheng Yang and committed by
Vinod Koul d5ef343c 644c06df

+5 -3
+5 -3
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
··· 745 745 do_div(vco, (nd * (no_a == 1 ? no_b : no_a) * no_d * 2)); 746 746 } 747 747 748 - inno->pixclock = vco; 749 - dev_dbg(inno->dev, "%s rate %lu\n", __func__, inno->pixclock); 748 + inno->pixclock = DIV_ROUND_CLOSEST((unsigned long)vco, 1000) * 1000; 750 749 751 - return vco; 750 + dev_dbg(inno->dev, "%s rate %lu vco %llu\n", 751 + __func__, inno->pixclock, vco); 752 + 753 + return inno->pixclock; 752 754 } 753 755 754 756 static long inno_hdmi_phy_rk3328_clk_round_rate(struct clk_hw *hw,