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Merge tag 'devicetree-fixes-for-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree fixes from Rob Herring:
"Another set of DT fixes:

- restore range parsing error check

- workaround PCI range parsing with missing 'device_type' now
required

- correct description of 'phy-connection-type'

- fix erroneous matching on 'snps,dw-pcie' by 'intel,lgm-pcie' schema

- a couple of grammar and whitespace fixes

- update Shawn Guo's email"

* tag 'devicetree-fixes-for-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
dt-bindings: vendor-prefixes: Remove trailing whitespace
dt-bindings: net: correct description of phy-connection-type
dt-bindings: PCI: intel,lgm-pcie: Fix matching on all snps,dw-pcie instances
of: address: Work around missing device_type property in pcie nodes
dt: writing-schema: Miscellaneous grammar fixes
dt-bindings: Use Shawn Guo's preferred e-mail for i.MX bindings
of/address: check for invalid range.cpu_addr

+42 -14
+1 -1
Documentation/devicetree/bindings/clock/imx23-clock.yaml
··· 7 7 title: Clock bindings for Freescale i.MX23 8 8 9 9 maintainers: 10 - - Shawn Guo <shawn.guo@linaro.org> 10 + - Shawn Guo <shawnguo@kernel.org> 11 11 12 12 description: | 13 13 The clock consumer should specify the desired clock by having the clock
+1 -1
Documentation/devicetree/bindings/clock/imx28-clock.yaml
··· 7 7 title: Clock bindings for Freescale i.MX28 8 8 9 9 maintainers: 10 - - Shawn Guo <shawn.guo@linaro.org> 10 + - Shawn Guo <shawnguo@kernel.org> 11 11 12 12 description: | 13 13 The clock consumer should specify the desired clock by having the clock
+1 -1
Documentation/devicetree/bindings/gpio/gpio-mxs.yaml
··· 7 7 title: Freescale MXS GPIO controller 8 8 9 9 maintainers: 10 - - Shawn Guo <shawn.guo@linaro.org> 10 + - Shawn Guo <shawnguo@kernel.org> 11 11 - Anson Huang <Anson.Huang@nxp.com> 12 12 13 13 description: |
+1 -1
Documentation/devicetree/bindings/i2c/i2c-mxs.yaml
··· 7 7 title: Freescale MXS Inter IC (I2C) Controller 8 8 9 9 maintainers: 10 - - Shawn Guo <shawn.guo@linaro.org> 10 + - Shawn Guo <shawnguo@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
··· 7 7 title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX 8 8 9 9 maintainers: 10 - - Shawn Guo <shawn.guo@linaro.org> 10 + - Shawn Guo <shawnguo@kernel.org> 11 11 12 12 allOf: 13 13 - $ref: "mmc-controller.yaml"
+1 -1
Documentation/devicetree/bindings/mmc/mxs-mmc.yaml
··· 7 7 title: Freescale MXS MMC controller 8 8 9 9 maintainers: 10 - - Shawn Guo <shawn.guo@linaro.org> 10 + - Shawn Guo <shawnguo@kernel.org> 11 11 12 12 description: | 13 13 The Freescale MXS Synchronous Serial Ports (SSP) can act as a MMC controller
+2 -1
Documentation/devicetree/bindings/net/ethernet-controller.yaml
··· 54 54 55 55 phy-connection-type: 56 56 description: 57 - Operation mode of the PHY interface 57 + Specifies interface type between the Ethernet device and a physical 58 + layer (PHY) device. 58 59 enum: 59 60 # There is not a standard bus between the MAC and the PHY, 60 61 # something proprietary is being used to embed the PHY in the
+8
Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
··· 9 9 maintainers: 10 10 - Dilip Kota <eswara.kota@linux.intel.com> 11 11 12 + select: 13 + properties: 14 + compatible: 15 + contains: 16 + const: intel,lgm-pcie 17 + required: 18 + - compatible 19 + 12 20 properties: 13 21 compatible: 14 22 items:
+1 -1
Documentation/devicetree/bindings/pwm/mxs-pwm.yaml
··· 7 7 title: Freescale MXS PWM controller 8 8 9 9 maintainers: 10 - - Shawn Guo <shawn.guo@linaro.org> 10 + - Shawn Guo <shawnguo@kernel.org> 11 11 - Anson Huang <anson.huang@nxp.com> 12 12 13 13 properties:
+1 -1
Documentation/devicetree/bindings/spi/fsl-imx-cspi.yaml
··· 7 7 title: Freescale (Enhanced) Configurable Serial Peripheral Interface (CSPI/eCSPI) for i.MX 8 8 9 9 maintainers: 10 - - Shawn Guo <shawn.guo@linaro.org> 10 + - Shawn Guo <shawnguo@kernel.org> 11 11 12 12 allOf: 13 13 - $ref: "/schemas/spi/spi-controller.yaml#"
+1 -1
Documentation/devicetree/bindings/thermal/imx-thermal.yaml
··· 7 7 title: NXP i.MX Thermal Binding 8 8 9 9 maintainers: 10 - - Shawn Guo <shawn.guo@linaro.org> 10 + - Shawn Guo <shawnguo@kernel.org> 11 11 - Anson Huang <Anson.Huang@nxp.com> 12 12 13 13 properties:
+1 -1
Documentation/devicetree/bindings/vendor-prefixes.yaml
··· 993 993 "^sst,.*": 994 994 description: Silicon Storage Technology, Inc. 995 995 "^sstar,.*": 996 - description: Xiamen Xingchen(SigmaStar) Technology Co., Ltd. 996 + description: Xiamen Xingchen(SigmaStar) Technology Co., Ltd. 997 997 (formerly part of MStar Semiconductor, Inc.) 998 998 "^st,.*": 999 999 description: STMicroelectronics
+2 -2
Documentation/devicetree/writing-schema.rst
··· 5 5 6 6 Devicetree bindings are written using json-schema vocabulary. Schema files are 7 7 written in a JSON compatible subset of YAML. YAML is used instead of JSON as it 8 - considered more human readable and has some advantages such as allowing 8 + is considered more human readable and has some advantages such as allowing 9 9 comments (Prefixed with '#'). 10 10 11 11 Schema Contents ··· 19 19 A json-schema unique identifier string. The string must be a valid 20 20 URI typically containing the binding's filename and path. For DT schema, it must 21 21 begin with "http://devicetree.org/schemas/". The URL is used in constructing 22 - references to other files specified in schema "$ref" properties. A $ref values 22 + references to other files specified in schema "$ref" properties. A $ref value 23 23 with a leading '/' will have the hostname prepended. A $ref value a relative 24 24 path or filename only will be prepended with the hostname and path components 25 25 of the current schema file's '$id' value. A URL is used even for local files,
+20 -1
drivers/of/address.c
··· 128 128 * PCI bus specific translator 129 129 */ 130 130 131 + static bool of_node_is_pcie(struct device_node *np) 132 + { 133 + bool is_pcie = of_node_name_eq(np, "pcie"); 134 + 135 + if (is_pcie) 136 + pr_warn_once("%pOF: Missing device_type\n", np); 137 + 138 + return is_pcie; 139 + } 140 + 131 141 static int of_bus_pci_match(struct device_node *np) 132 142 { 133 143 /* 134 144 * "pciex" is PCI Express 135 145 * "vci" is for the /chaos bridge on 1st-gen PCI powermacs 136 146 * "ht" is hypertransport 147 + * 148 + * If none of the device_type match, and that the node name is 149 + * "pcie", accept the device as PCI (with a warning). 137 150 */ 138 151 return of_node_is_type(np, "pci") || of_node_is_type(np, "pciex") || 139 - of_node_is_type(np, "vci") || of_node_is_type(np, "ht"); 152 + of_node_is_type(np, "vci") || of_node_is_type(np, "ht") || 153 + of_node_is_pcie(np); 140 154 } 141 155 142 156 static void of_bus_pci_count_cells(struct device_node *np, ··· 997 983 if (dma_offset && range.cpu_addr - range.bus_addr != dma_offset) { 998 984 pr_warn("Can't handle multiple dma-ranges with different offsets on node(%pOF)\n", node); 999 985 /* Don't error out as we'd break some existing DTs */ 986 + continue; 987 + } 988 + if (range.cpu_addr == OF_BAD_ADDR) { 989 + pr_err("translation of DMA address(%llx) to CPU address failed node(%pOF)\n", 990 + range.bus_addr, node); 1000 991 continue; 1001 992 } 1002 993 dma_offset = range.cpu_addr - range.bus_addr;