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ocxl: Update the Process Element Entry

To complete the MMIO based mechanism, the fields: PASID, bus, device and
function of the Process Element Entry have to be filled. (See
OpenCAPI Power Platform Architecture document)

Hypervisor Process Element Entry
Word
0 1 .... 7 8 ...... 12 13 ..15 16.... 19 20 ........... 31
0 OSL Configuration State (0:31)
1 OSL Configuration State (32:63)
2 PASID | Reserved
3 Bus | Device |Function | Reserved
4 Reserved
5 Reserved
6 ....

Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Acked-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20201125155013.39955-4-clombard@linux.vnet.ibm.com

authored by

Christophe Lombard and committed by
Michael Ellerman d731feea 19b311ca

+17 -8
+3 -1
drivers/misc/ocxl/context.c
··· 70 70 { 71 71 int rc; 72 72 unsigned long pidr = 0; 73 + struct pci_dev *dev; 73 74 74 75 // Locks both status & tidr 75 76 mutex_lock(&ctx->status_mutex); ··· 82 81 if (mm) 83 82 pidr = mm->context.id; 84 83 84 + dev = to_pci_dev(ctx->afu->fn->dev.parent); 85 85 rc = ocxl_link_add_pe(ctx->afu->fn->link, ctx->pasid, pidr, ctx->tidr, 86 - amr, mm, xsl_fault_error, ctx); 86 + amr, pci_dev_id(dev), mm, xsl_fault_error, ctx); 87 87 if (rc) 88 88 goto out; 89 89
+3 -1
drivers/misc/ocxl/link.c
··· 494 494 } 495 495 496 496 int ocxl_link_add_pe(void *link_handle, int pasid, u32 pidr, u32 tidr, 497 - u64 amr, struct mm_struct *mm, 497 + u64 amr, u16 bdf, struct mm_struct *mm, 498 498 void (*xsl_err_cb)(void *data, u64 addr, u64 dsisr), 499 499 void *xsl_err_data) 500 500 { ··· 529 529 530 530 memset(pe, 0, sizeof(struct ocxl_process_element)); 531 531 pe->config_state = cpu_to_be64(calculate_cfg_state(pidr == 0)); 532 + pe->pasid = cpu_to_be32(pasid << (31 - 19)); 533 + pe->bdf = cpu_to_be16(bdf); 532 534 pe->lpid = cpu_to_be32(mfspr(SPRN_LPID)); 533 535 pe->pid = cpu_to_be32(pidr); 534 536 pe->tid = cpu_to_be32(tidr);
+6 -3
drivers/misc/ocxl/ocxl_internal.h
··· 84 84 85 85 struct ocxl_process_element { 86 86 __be64 config_state; 87 - __be32 reserved1[11]; 87 + __be32 pasid; 88 + __be16 bdf; 89 + __be16 reserved1; 90 + __be32 reserved2[9]; 88 91 __be32 lpid; 89 92 __be32 tid; 90 93 __be32 pid; 91 - __be32 reserved2[10]; 94 + __be32 reserved3[10]; 92 95 __be64 amr; 93 - __be32 reserved3[3]; 96 + __be32 reserved4[3]; 94 97 __be32 software_state; 95 98 }; 96 99
+4 -2
drivers/scsi/cxlflash/ocxl_hw.c
··· 329 329 struct ocxl_hw_afu *afu = ctx->hw_afu; 330 330 struct ocxl_afu_config *acfg = &afu->acfg; 331 331 void *link_token = afu->link_token; 332 + struct pci_dev *pdev = afu->pdev; 332 333 struct device *dev = afu->dev; 333 334 bool master = ctx->master; 334 335 struct mm_struct *mm; ··· 361 360 mm = current->mm; 362 361 } 363 362 364 - rc = ocxl_link_add_pe(link_token, ctx->pe, pid, 0, 0, mm, 365 - ocxlflash_xsl_fault, ctx); 363 + rc = ocxl_link_add_pe(link_token, ctx->pe, pid, 0, 0, 364 + pci_dev_id(pdev), mm, ocxlflash_xsl_fault, 365 + ctx); 366 366 if (unlikely(rc)) { 367 367 dev_err(dev, "%s: ocxl_link_add_pe failed rc=%d\n", 368 368 __func__, rc);
+1 -1
include/misc/ocxl.h
··· 447 447 * defined 448 448 */ 449 449 int ocxl_link_add_pe(void *link_handle, int pasid, u32 pidr, u32 tidr, 450 - u64 amr, struct mm_struct *mm, 450 + u64 amr, u16 bdf, struct mm_struct *mm, 451 451 void (*xsl_err_cb)(void *data, u64 addr, u64 dsisr), 452 452 void *xsl_err_data); 453 453