Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/msm/mdss: use register definitions instead of hand-coding them
Move existing register definitions to mdss.xml and use generated defines
for registers access instead of hand-coding everything in the source
file.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/615312/
Link: https://lore.kernel.org/r/20240921-msm-mdss-ubwc-v1-2-411dcf309d05@linaro.org
+21
-20
+15
-20
drivers/gpu/drm/msm/msm_mdss.c
+15
-20
drivers/gpu/drm/msm/msm_mdss.c
···
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#include "msm_mdss.h"
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#include "msm_kms.h"
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-
#define HW_REV 0x0
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-
#define HW_INTR_STATUS 0x0010
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-
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-
#define UBWC_DEC_HW_VERSION 0x58
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-
#define UBWC_STATIC 0x144
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-
#define UBWC_CTRL_2 0x150
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-
#define UBWC_PREDICTION_MODE 0x154
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+
#include <generated/mdss.xml.h>
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#define MIN_IB_BW 400000000UL /* Min ib vote 400MB */
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···
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chained_irq_enter(chip, desc);
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-
interrupts = readl_relaxed(msm_mdss->mmio + HW_INTR_STATUS);
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+
interrupts = readl_relaxed(msm_mdss->mmio + REG_MDSS_HW_INTR_STATUS);
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while (interrupts) {
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irq_hw_number_t hwirq = fls(interrupts) - 1;
···
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{
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const struct msm_mdss_data *data = msm_mdss->mdss_data;
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-
writel_relaxed(data->ubwc_static, msm_mdss->mmio + UBWC_STATIC);
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+
writel_relaxed(data->ubwc_static, msm_mdss->mmio + REG_MDSS_UBWC_STATIC);
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}
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static void msm_mdss_setup_ubwc_dec_30(struct msm_mdss *msm_mdss)
···
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if (data->ubwc_enc_version == UBWC_1_0)
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value |= BIT(8);
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-
writel_relaxed(value, msm_mdss->mmio + UBWC_STATIC);
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+
writel_relaxed(value, msm_mdss->mmio + REG_MDSS_UBWC_STATIC);
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}
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static void msm_mdss_setup_ubwc_dec_40(struct msm_mdss *msm_mdss)
···
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(data->highest_bank_bit & 0x7) << 4 |
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(data->macrotile_mode & 0x1) << 12;
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-
writel_relaxed(value, msm_mdss->mmio + UBWC_STATIC);
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+
writel_relaxed(value, msm_mdss->mmio + REG_MDSS_UBWC_STATIC);
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if (data->ubwc_enc_version == UBWC_3_0) {
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-
writel_relaxed(1, msm_mdss->mmio + UBWC_CTRL_2);
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-
writel_relaxed(0, msm_mdss->mmio + UBWC_PREDICTION_MODE);
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+
writel_relaxed(1, msm_mdss->mmio + REG_MDSS_UBWC_CTRL_2);
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+
writel_relaxed(0, msm_mdss->mmio + REG_MDSS_UBWC_PREDICTION_MODE);
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} else {
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if (data->ubwc_dec_version == UBWC_4_3)
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writel_relaxed(3, msm_mdss->mmio + UBWC_CTRL_2);
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+
writel_relaxed(3, msm_mdss->mmio + REG_MDSS_UBWC_CTRL_2);
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else
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-
writel_relaxed(2, msm_mdss->mmio + UBWC_CTRL_2);
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-
writel_relaxed(1, msm_mdss->mmio + UBWC_PREDICTION_MODE);
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+
writel_relaxed(2, msm_mdss->mmio + REG_MDSS_UBWC_CTRL_2);
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writel_relaxed(1, msm_mdss->mmio + REG_MDSS_UBWC_PREDICTION_MODE);
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}
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}
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-
#define MDSS_HW_MAJ_MIN GENMASK(31, 16)
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#define MDSS_HW_MAJ_MIN \
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(MDSS_HW_VERSION_MAJOR__MASK | MDSS_HW_VERSION_MINOR__MASK)
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#define MDSS_HW_MSM8996 0x1007
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#define MDSS_HW_MSM8937 0x100e
···
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if (!data)
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return NULL;
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-
hw_rev = readl_relaxed(mdss->mmio + HW_REV);
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+
hw_rev = readl_relaxed(mdss->mmio + REG_MDSS_HW_VERSION);
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hw_rev = FIELD_GET(MDSS_HW_MAJ_MIN, hw_rev);
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if (hw_rev == MDSS_HW_MSM8996 ||
···
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dev_err(msm_mdss->dev, "Unsupported UBWC decoder version %x\n",
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msm_mdss->mdss_data->ubwc_dec_version);
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dev_err(msm_mdss->dev, "HW_REV: 0x%x\n",
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-
readl_relaxed(msm_mdss->mmio + HW_REV));
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+
readl_relaxed(msm_mdss->mmio + REG_MDSS_HW_VERSION));
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dev_err(msm_mdss->dev, "UBWC_DEC_HW_VERSION: 0x%x\n",
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-
readl_relaxed(msm_mdss->mmio + UBWC_DEC_HW_VERSION));
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+
readl_relaxed(msm_mdss->mmio + REG_MDSS_UBWC_DEC_HW_VERSION));
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break;
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}
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+6
drivers/gpu/drm/msm/registers/display/mdss.xml
+6
drivers/gpu/drm/msm/registers/display/mdss.xml
···
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<bitfield name="INTR_HDMI" pos="8" type="boolean"/>
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<bitfield name="INTR_EDP" pos="12" type="boolean"/>
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</reg32>
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+
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+
<reg32 offset="0x00058" name="UBWC_DEC_HW_VERSION"/>
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+
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+
<reg32 offset="0x00144" name="UBWC_STATIC"/>
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+
<reg32 offset="0x00150" name="UBWC_CTRL_2"/>
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+
<reg32 offset="0x00154" name="UBWC_PREDICTION_MODE"/>
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</domain>
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</database>