Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6:
USB: unbind all interfaces before rebinding them
USB: serial: digi_acceleport: Eliminate a NULL pointer dereference
usb: fix ehci_hcd build failure when both generic-OF and xilinx is selected
USB: cdc-acm: fix resource reclaim in error path of acm_probe
USB: ftdi_sio: fix DTR/RTS line modes
USB: s3c-hsotg: Ensure FIFOs are fully flushed after layout
USB: s3c-hsotg: SoftDisconnect minimum 3ms
USB: s3c-hsotg: Ensure TX FIFO addresses setup when initialising FIFOs
USB: s3c_hsotg: define USB_GADGET_DUALSPEED in Kconfig
USB: s3c: Enable soft disconnect during initialization
USB: xhci: Print NEC firmware version.
USB: xhci: Wait for host to start running.
USB: xhci: Wait for controller to be ready after reset.
USB: isp1362: fix inw warning on Blackfin systems
USB: mos7840: fix null-pointer dereference
+180
-18
+4
-2
drivers/usb/class/cdc-acm.c
+4
-2
drivers/usb/class/cdc-acm.c
···
1201
1201
if (rcv->urb == NULL) {
1202
1202
dev_dbg(&intf->dev,
1203
1203
"out of memory (read urbs usb_alloc_urb)\n");
1204
-
goto alloc_fail7;
1204
+
goto alloc_fail6;
1205
1205
}
1206
1206
1207
1207
rcv->urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
···
1225
1225
if (snd->urb == NULL) {
1226
1226
dev_dbg(&intf->dev,
1227
1227
"out of memory (write urbs usb_alloc_urb)");
1228
-
goto alloc_fail7;
1228
+
goto alloc_fail8;
1229
1229
}
1230
1230
1231
1231
if (usb_endpoint_xfer_int(epwrite))
···
1264
1264
i = device_create_file(&intf->dev,
1265
1265
&dev_attr_iCountryCodeRelDate);
1266
1266
if (i < 0) {
1267
+
device_remove_file(&intf->dev, &dev_attr_wCountryCodes);
1267
1268
kfree(acm->country_codes);
1268
1269
goto skip_countries;
1269
1270
}
···
1301
1300
usb_free_urb(acm->wb[i].urb);
1302
1301
alloc_fail7:
1303
1302
acm_read_buffers_free(acm);
1303
+
alloc_fail6:
1304
1304
for (i = 0; i < num_rx_buf; i++)
1305
1305
usb_free_urb(acm->ru[i].urb);
1306
1306
usb_free_urb(acm->ctrlurb);
+2
drivers/usb/core/driver.c
+2
drivers/usb/core/driver.c
···
1328
1328
1329
1329
/* For all other calls, take the device back to full power and
1330
1330
* tell the PM core in case it was autosuspended previously.
1331
+
* Unbind the interfaces that will need rebinding later.
1331
1332
*/
1332
1333
} else {
1333
1334
status = usb_resume_both(udev, msg);
···
1337
1336
pm_runtime_set_active(dev);
1338
1337
pm_runtime_enable(dev);
1339
1338
udev->last_busy = jiffies;
1339
+
do_unbind_rebind(udev, DO_REBIND);
1340
1340
}
1341
1341
}
1342
1342
+1
drivers/usb/gadget/Kconfig
+1
drivers/usb/gadget/Kconfig
+57
drivers/usb/gadget/s3c-hsotg.c
+57
drivers/usb/gadget/s3c-hsotg.c
···
297
297
*/
298
298
static void s3c_hsotg_init_fifo(struct s3c_hsotg *hsotg)
299
299
{
300
+
unsigned int ep;
301
+
unsigned int addr;
302
+
unsigned int size;
303
+
int timeout;
304
+
u32 val;
305
+
300
306
/* the ryu 2.6.24 release ahs
301
307
writel(0x1C0, hsotg->regs + S3C_GRXFSIZ);
302
308
writel(S3C_GNPTXFSIZ_NPTxFStAddr(0x200) |
···
316
310
writel(S3C_GNPTXFSIZ_NPTxFStAddr(2048) |
317
311
S3C_GNPTXFSIZ_NPTxFDep(0x1C0),
318
312
hsotg->regs + S3C_GNPTXFSIZ);
313
+
314
+
/* arange all the rest of the TX FIFOs, as some versions of this
315
+
* block have overlapping default addresses. This also ensures
316
+
* that if the settings have been changed, then they are set to
317
+
* known values. */
318
+
319
+
/* start at the end of the GNPTXFSIZ, rounded up */
320
+
addr = 2048 + 1024;
321
+
size = 768;
322
+
323
+
/* currently we allocate TX FIFOs for all possible endpoints,
324
+
* and assume that they are all the same size. */
325
+
326
+
for (ep = 0; ep <= 15; ep++) {
327
+
val = addr;
328
+
val |= size << S3C_DPTXFSIZn_DPTxFSize_SHIFT;
329
+
addr += size;
330
+
331
+
writel(val, hsotg->regs + S3C_DPTXFSIZn(ep));
332
+
}
333
+
334
+
/* according to p428 of the design guide, we need to ensure that
335
+
* all fifos are flushed before continuing */
336
+
337
+
writel(S3C_GRSTCTL_TxFNum(0x10) | S3C_GRSTCTL_TxFFlsh |
338
+
S3C_GRSTCTL_RxFFlsh, hsotg->regs + S3C_GRSTCTL);
339
+
340
+
/* wait until the fifos are both flushed */
341
+
timeout = 100;
342
+
while (1) {
343
+
val = readl(hsotg->regs + S3C_GRSTCTL);
344
+
345
+
if ((val & (S3C_GRSTCTL_TxFFlsh | S3C_GRSTCTL_RxFFlsh)) == 0)
346
+
break;
347
+
348
+
if (--timeout == 0) {
349
+
dev_err(hsotg->dev,
350
+
"%s: timeout flushing fifos (GRSTCTL=%08x)\n",
351
+
__func__, val);
352
+
}
353
+
354
+
udelay(1);
355
+
}
356
+
357
+
dev_dbg(hsotg->dev, "FIFOs reset, timeout at %d\n", timeout);
319
358
}
320
359
321
360
/**
···
2625
2574
writel(S3C_DCTL_CGOUTNak | S3C_DCTL_CGNPInNAK,
2626
2575
hsotg->regs + S3C_DCTL);
2627
2576
2577
+
/* must be at-least 3ms to allow bus to see disconnect */
2578
+
msleep(3);
2579
+
2628
2580
/* remove the soft-disconnect and let's go */
2629
2581
__bic32(hsotg->regs + S3C_DCTL, S3C_DCTL_SftDiscon);
2630
2582
···
2783
2729
hsotg->regs + S3C_DOEPMSK);
2784
2730
2785
2731
writel(0, hsotg->regs + S3C_DAINTMSK);
2732
+
2733
+
/* Be in disconnected state until gadget is registered */
2734
+
__orr32(hsotg->regs + S3C_DCTL, S3C_DCTL_SftDiscon);
2786
2735
2787
2736
if (0) {
2788
2737
/* post global nak until we're ready */
+17
-3
drivers/usb/host/ehci-hcd.c
+17
-3
drivers/usb/host/ehci-hcd.c
···
1135
1135
1136
1136
#ifdef CONFIG_XPS_USB_HCD_XILINX
1137
1137
#include "ehci-xilinx-of.c"
1138
-
#define OF_PLATFORM_DRIVER ehci_hcd_xilinx_of_driver
1138
+
#define XILINX_OF_PLATFORM_DRIVER ehci_hcd_xilinx_of_driver
1139
1139
#endif
1140
1140
1141
1141
#ifdef CONFIG_PLAT_ORION
···
1159
1159
#endif
1160
1160
1161
1161
#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1162
-
!defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
1162
+
!defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
1163
+
!defined(XILINX_OF_PLATFORM_DRIVER)
1163
1164
#error "missing bus glue for ehci-hcd"
1164
1165
#endif
1165
1166
···
1214
1213
if (retval < 0)
1215
1214
goto clean3;
1216
1215
#endif
1216
+
1217
+
#ifdef XILINX_OF_PLATFORM_DRIVER
1218
+
retval = of_register_platform_driver(&XILINX_OF_PLATFORM_DRIVER);
1219
+
if (retval < 0)
1220
+
goto clean4;
1221
+
#endif
1217
1222
return retval;
1218
1223
1224
+
#ifdef XILINX_OF_PLATFORM_DRIVER
1225
+
/* of_unregister_platform_driver(&XILINX_OF_PLATFORM_DRIVER); */
1226
+
clean4:
1227
+
#endif
1219
1228
#ifdef OF_PLATFORM_DRIVER
1220
-
/* of_unregister_platform_driver(&OF_PLATFORM_DRIVER); */
1229
+
of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1221
1230
clean3:
1222
1231
#endif
1223
1232
#ifdef PS3_SYSTEM_BUS_DRIVER
···
1254
1243
1255
1244
static void __exit ehci_hcd_cleanup(void)
1256
1245
{
1246
+
#ifdef XILINX_OF_PLATFORM_DRIVER
1247
+
of_unregister_platform_driver(&XILINX_OF_PLATFORM_DRIVER);
1248
+
#endif
1257
1249
#ifdef OF_PLATFORM_DRIVER
1258
1250
of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1259
1251
#endif
+1
-1
drivers/usb/host/isp1362.h
+1
-1
drivers/usb/host/isp1362.h
+2
drivers/usb/host/xhci-pci.c
+2
drivers/usb/host/xhci-pci.c
+30
-1
drivers/usb/host/xhci-ring.c
+30
-1
drivers/usb/host/xhci-ring.c
···
1071
1071
xhci_warn(xhci, "Reset device command completion "
1072
1072
"for disabled slot %u\n", slot_id);
1073
1073
break;
1074
+
case TRB_TYPE(TRB_NEC_GET_FW):
1075
+
if (!(xhci->quirks & XHCI_NEC_HOST)) {
1076
+
xhci->error_bitmask |= 1 << 6;
1077
+
break;
1078
+
}
1079
+
xhci_dbg(xhci, "NEC firmware version %2x.%02x\n",
1080
+
NEC_FW_MAJOR(event->status),
1081
+
NEC_FW_MINOR(event->status));
1082
+
break;
1074
1083
default:
1075
1084
/* Skip over unknown commands on the event ring */
1076
1085
xhci->error_bitmask |= 1 << 6;
1077
1086
break;
1078
1087
}
1079
1088
inc_deq(xhci, xhci->cmd_ring, false);
1089
+
}
1090
+
1091
+
static void handle_vendor_event(struct xhci_hcd *xhci,
1092
+
union xhci_trb *event)
1093
+
{
1094
+
u32 trb_type;
1095
+
1096
+
trb_type = TRB_FIELD_TO_TYPE(event->generic.field[3]);
1097
+
xhci_dbg(xhci, "Vendor specific event TRB type = %u\n", trb_type);
1098
+
if (trb_type == TRB_NEC_CMD_COMP && (xhci->quirks & XHCI_NEC_HOST))
1099
+
handle_cmd_completion(xhci, &event->event_cmd);
1080
1100
}
1081
1101
1082
1102
static void handle_port_status(struct xhci_hcd *xhci,
···
1679
1659
update_ptrs = 0;
1680
1660
break;
1681
1661
default:
1682
-
xhci->error_bitmask |= 1 << 3;
1662
+
if ((event->event_cmd.flags & TRB_TYPE_BITMASK) >= TRB_TYPE(48))
1663
+
handle_vendor_event(xhci, event);
1664
+
else
1665
+
xhci->error_bitmask |= 1 << 3;
1683
1666
}
1684
1667
/* Any of the above functions may drop and re-acquire the lock, so check
1685
1668
* to make sure a watchdog timer didn't mark the host as non-responsive.
···
2399
2376
upper_32_bits(in_ctx_ptr), 0,
2400
2377
TRB_TYPE(TRB_ADDR_DEV) | SLOT_ID_FOR_TRB(slot_id),
2401
2378
false);
2379
+
}
2380
+
2381
+
int xhci_queue_vendor_command(struct xhci_hcd *xhci,
2382
+
u32 field1, u32 field2, u32 field3, u32 field4)
2383
+
{
2384
+
return queue_command(xhci, field1, field2, field3, field4, false);
2402
2385
}
2403
2386
2404
2387
/* Queue a reset device command TRB */
+49
-8
drivers/usb/host/xhci.c
+49
-8
drivers/usb/host/xhci.c
···
106
106
}
107
107
108
108
/*
109
+
* Set the run bit and wait for the host to be running.
110
+
*/
111
+
int xhci_start(struct xhci_hcd *xhci)
112
+
{
113
+
u32 temp;
114
+
int ret;
115
+
116
+
temp = xhci_readl(xhci, &xhci->op_regs->command);
117
+
temp |= (CMD_RUN);
118
+
xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
119
+
temp);
120
+
xhci_writel(xhci, temp, &xhci->op_regs->command);
121
+
122
+
/*
123
+
* Wait for the HCHalted Status bit to be 0 to indicate the host is
124
+
* running.
125
+
*/
126
+
ret = handshake(xhci, &xhci->op_regs->status,
127
+
STS_HALT, 0, XHCI_MAX_HALT_USEC);
128
+
if (ret == -ETIMEDOUT)
129
+
xhci_err(xhci, "Host took too long to start, "
130
+
"waited %u microseconds.\n",
131
+
XHCI_MAX_HALT_USEC);
132
+
return ret;
133
+
}
134
+
135
+
/*
109
136
* Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
110
137
*
111
138
* This resets pipelines, timers, counters, state machines, etc.
···
143
116
{
144
117
u32 command;
145
118
u32 state;
119
+
int ret;
146
120
147
121
state = xhci_readl(xhci, &xhci->op_regs->status);
148
122
if ((state & STS_HALT) == 0) {
···
158
130
/* XXX: Why does EHCI set this here? Shouldn't other code do this? */
159
131
xhci_to_hcd(xhci)->state = HC_STATE_HALT;
160
132
161
-
return handshake(xhci, &xhci->op_regs->command, CMD_RESET, 0, 250 * 1000);
133
+
ret = handshake(xhci, &xhci->op_regs->command,
134
+
CMD_RESET, 0, 250 * 1000);
135
+
if (ret)
136
+
return ret;
137
+
138
+
xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
139
+
/*
140
+
* xHCI cannot write to any doorbells or operational registers other
141
+
* than status until the "Controller Not Ready" flag is cleared.
142
+
*/
143
+
return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
162
144
}
163
145
164
146
···
486
448
487
449
if (NUM_TEST_NOOPS > 0)
488
450
doorbell = xhci_setup_one_noop(xhci);
451
+
if (xhci->quirks & XHCI_NEC_HOST)
452
+
xhci_queue_vendor_command(xhci, 0, 0, 0,
453
+
TRB_TYPE(TRB_NEC_GET_FW));
489
454
490
-
temp = xhci_readl(xhci, &xhci->op_regs->command);
491
-
temp |= (CMD_RUN);
492
-
xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
493
-
temp);
494
-
xhci_writel(xhci, temp, &xhci->op_regs->command);
495
-
/* Flush PCI posted writes */
496
-
temp = xhci_readl(xhci, &xhci->op_regs->command);
455
+
if (xhci_start(xhci)) {
456
+
xhci_halt(xhci);
457
+
return -ENODEV;
458
+
}
459
+
497
460
xhci_dbg(xhci, "// @%p = 0x%x\n", &xhci->op_regs->command, temp);
498
461
if (doorbell)
499
462
(*doorbell)(xhci);
463
+
if (xhci->quirks & XHCI_NEC_HOST)
464
+
xhci_ring_cmd_db(xhci);
500
465
501
466
xhci_dbg(xhci, "Finished xhci_run\n");
502
467
return 0;
+12
drivers/usb/host/xhci.h
+12
drivers/usb/host/xhci.h
···
925
925
/* TRB bit mask */
926
926
#define TRB_TYPE_BITMASK (0xfc00)
927
927
#define TRB_TYPE(p) ((p) << 10)
928
+
#define TRB_FIELD_TO_TYPE(p) (((p) & TRB_TYPE_BITMASK) >> 10)
928
929
/* TRB type IDs */
929
930
/* bulk, interrupt, isoc scatter/gather, and control data stage */
930
931
#define TRB_NORMAL 1
···
992
991
/* MFINDEX Wrap Event - microframe counter wrapped */
993
992
#define TRB_MFINDEX_WRAP 39
994
993
/* TRB IDs 40-47 reserved, 48-63 is vendor-defined */
994
+
995
+
/* Nec vendor-specific command completion event. */
996
+
#define TRB_NEC_CMD_COMP 48
997
+
/* Get NEC firmware revision. */
998
+
#define TRB_NEC_GET_FW 49
999
+
1000
+
#define NEC_FW_MINOR(p) (((p) >> 0) & 0xff)
1001
+
#define NEC_FW_MAJOR(p) (((p) >> 8) & 0xff)
995
1002
996
1003
/*
997
1004
* TRBS_PER_SEGMENT must be a multiple of 4,
···
1181
1172
unsigned int quirks;
1182
1173
#define XHCI_LINK_TRB_QUIRK (1 << 0)
1183
1174
#define XHCI_RESET_EP_QUIRK (1 << 1)
1175
+
#define XHCI_NEC_HOST (1 << 2)
1184
1176
};
1185
1177
1186
1178
/* For testing purposes */
···
1389
1379
int xhci_queue_slot_control(struct xhci_hcd *xhci, u32 trb_type, u32 slot_id);
1390
1380
int xhci_queue_address_device(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr,
1391
1381
u32 slot_id);
1382
+
int xhci_queue_vendor_command(struct xhci_hcd *xhci,
1383
+
u32 field1, u32 field2, u32 field3, u32 field4);
1392
1384
int xhci_queue_stop_endpoint(struct xhci_hcd *xhci, int slot_id,
1393
1385
unsigned int ep_index);
1394
1386
int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags, struct urb *urb,
+1
-2
drivers/usb/serial/digi_acceleport.c
+1
-2
drivers/usb/serial/digi_acceleport.c
···
1239
1239
1240
1240
/* port and serial sanity check */
1241
1241
if (port == NULL || (priv = usb_get_serial_port_data(port)) == NULL) {
1242
-
dev_err(&port->dev,
1243
-
"%s: port or port->private is NULL, status=%d\n",
1242
+
pr_err("%s: port or port->private is NULL, status=%d\n",
1244
1243
__func__, status);
1245
1244
return;
1246
1245
}
+4
drivers/usb/serial/ftdi_sio.c
+4
drivers/usb/serial/ftdi_sio.c
···
2005
2005
"urb failed to set to rts/cts flow control\n");
2006
2006
}
2007
2007
2008
+
/* raise DTR/RTS */
2009
+
set_mctrl(port, TIOCM_DTR | TIOCM_RTS);
2008
2010
} else {
2009
2011
/*
2010
2012
* Xon/Xoff code
···
2054
2052
}
2055
2053
}
2056
2054
2055
+
/* lower DTR/RTS */
2056
+
clear_mctrl(port, TIOCM_DTR | TIOCM_RTS);
2057
2057
}
2058
2058
return;
2059
2059
}