tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue

Tony Nguyen says:

====================
Intel Wired LAN Driver Updates 2026-03-02 (ice, i40e, ixgbe)

For ice:
Simon Horman adds const modifier to read only member of a struct.

For i40e:
Yury Norov removes an unneeded check of bitmap_weight().

Andy Shevchenko adds a missing include.

For ixgbe:
Aleksandr changes declaration of a bitmap to utilize DECLARE_BITMAP()
macro.

* '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue:
ixgbe: refactor: use DECLARE_BITMAP for ring state field
i40e: Add missing wordpart.h header
i40e: drop useless bitmap_weight() call in i40e_set_rxfh_fields()
ice: Make name member of struct ice_cgu_pin_desc const
====================

Link: https://patch.msgid.link/20260304000800.3536872-1-anthony.l.nguyen@intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

Jakub Kicinski d824c64a c66e0f45

+56 -58
+8 -13
drivers/net/ethernet/intel/i40e/i40e_ethtool.c
··· 3624 3624 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 3625 3625 DECLARE_BITMAP(flow_pctypes, FLOW_PCTYPES_SIZE); 3626 3626 u64 i_set, i_setc; 3627 + u8 flow_id; 3627 3628 3628 3629 bitmap_zero(flow_pctypes, FLOW_PCTYPES_SIZE); 3629 3630 ··· 3708 3707 return -EINVAL; 3709 3708 } 3710 3709 3711 - if (bitmap_weight(flow_pctypes, FLOW_PCTYPES_SIZE)) { 3712 - u8 flow_id; 3710 + for_each_set_bit(flow_id, flow_pctypes, FLOW_PCTYPES_SIZE) { 3711 + i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id)) | 3712 + ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id)) << 32); 3713 + i_set = i40e_get_rss_hash_bits(&pf->hw, nfc, i_setc); 3713 3714 3714 - for_each_set_bit(flow_id, flow_pctypes, FLOW_PCTYPES_SIZE) { 3715 - i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id)) | 3716 - ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id)) << 32); 3717 - i_set = i40e_get_rss_hash_bits(&pf->hw, nfc, i_setc); 3718 - 3719 - i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id), 3720 - (u32)i_set); 3721 - i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id), 3722 - (u32)(i_set >> 32)); 3723 - hena |= BIT_ULL(flow_id); 3724 - } 3715 + i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id), (u32)i_set); 3716 + i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id), (u32)(i_set >> 32)); 3717 + hena |= BIT_ULL(flow_id); 3725 3718 } 3726 3719 3727 3720 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
+2
drivers/net/ethernet/intel/i40e/i40e_hmc.h
··· 4 4 #ifndef _I40E_HMC_H_ 5 5 #define _I40E_HMC_H_ 6 6 7 + #include <linux/wordpart.h> 8 + 7 9 #include "i40e_alloc.h" 8 10 #include "i40e_io.h" 9 11 #include "i40e_register.h"
+1 -1
drivers/net/ethernet/intel/ice/ice_ptp_hw.h
··· 258 258 }; 259 259 260 260 struct ice_cgu_pin_desc { 261 - char *name; 261 + const char *name; 262 262 u8 index; 263 263 enum dpll_pin_type type; 264 264 u32 freq_supp_num;
+14 -13
drivers/net/ethernet/intel/ixgbe/ixgbe.h
··· 322 322 __IXGBE_HANG_CHECK_ARMED, 323 323 __IXGBE_TX_XDP_RING, 324 324 __IXGBE_TX_DISABLED, 325 + __IXGBE_RING_STATE_NBITS, /* must be last */ 325 326 }; 326 327 327 328 #define ring_uses_build_skb(ring) \ 328 - test_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &(ring)->state) 329 + test_bit(__IXGBE_RX_BUILD_SKB_ENABLED, (ring)->state) 329 330 330 331 struct ixgbe_fwd_adapter { 331 332 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; ··· 337 336 }; 338 337 339 338 #define check_for_tx_hang(ring) \ 340 - test_bit(__IXGBE_TX_DETECT_HANG, &(ring)->state) 339 + test_bit(__IXGBE_TX_DETECT_HANG, (ring)->state) 341 340 #define set_check_for_tx_hang(ring) \ 342 - set_bit(__IXGBE_TX_DETECT_HANG, &(ring)->state) 341 + set_bit(__IXGBE_TX_DETECT_HANG, (ring)->state) 343 342 #define clear_check_for_tx_hang(ring) \ 344 - clear_bit(__IXGBE_TX_DETECT_HANG, &(ring)->state) 343 + clear_bit(__IXGBE_TX_DETECT_HANG, (ring)->state) 345 344 #define ring_is_rsc_enabled(ring) \ 346 - test_bit(__IXGBE_RX_RSC_ENABLED, &(ring)->state) 345 + test_bit(__IXGBE_RX_RSC_ENABLED, (ring)->state) 347 346 #define set_ring_rsc_enabled(ring) \ 348 - set_bit(__IXGBE_RX_RSC_ENABLED, &(ring)->state) 347 + set_bit(__IXGBE_RX_RSC_ENABLED, (ring)->state) 349 348 #define clear_ring_rsc_enabled(ring) \ 350 - clear_bit(__IXGBE_RX_RSC_ENABLED, &(ring)->state) 349 + clear_bit(__IXGBE_RX_RSC_ENABLED, (ring)->state) 351 350 #define ring_is_xdp(ring) \ 352 - test_bit(__IXGBE_TX_XDP_RING, &(ring)->state) 351 + test_bit(__IXGBE_TX_XDP_RING, (ring)->state) 353 352 #define set_ring_xdp(ring) \ 354 - set_bit(__IXGBE_TX_XDP_RING, &(ring)->state) 353 + set_bit(__IXGBE_TX_XDP_RING, (ring)->state) 355 354 #define clear_ring_xdp(ring) \ 356 - clear_bit(__IXGBE_TX_XDP_RING, &(ring)->state) 355 + clear_bit(__IXGBE_TX_XDP_RING, (ring)->state) 357 356 struct ixgbe_ring { 358 357 struct ixgbe_ring *next; /* pointer to next ring in q_vector */ 359 358 struct ixgbe_q_vector *q_vector; /* backpointer to host q_vector */ ··· 365 364 struct ixgbe_tx_buffer *tx_buffer_info; 366 365 struct ixgbe_rx_buffer *rx_buffer_info; 367 366 }; 368 - unsigned long state; 367 + DECLARE_BITMAP(state, __IXGBE_RING_STATE_NBITS); 369 368 u8 __iomem *tail; 370 369 dma_addr_t dma; /* phys. address of descriptor ring */ 371 370 unsigned int size; /* length in bytes */ ··· 454 453 */ 455 454 static inline unsigned int ixgbe_rx_bufsz(struct ixgbe_ring *ring) 456 455 { 457 - if (test_bit(__IXGBE_RX_3K_BUFFER, &ring->state)) 456 + if (test_bit(__IXGBE_RX_3K_BUFFER, ring->state)) 458 457 return IXGBE_RXBUFFER_3K; 459 458 #if (PAGE_SIZE < 8192) 460 459 if (ring_uses_build_skb(ring)) ··· 466 465 static inline unsigned int ixgbe_rx_pg_order(struct ixgbe_ring *ring) 467 466 { 468 467 #if (PAGE_SIZE < 8192) 469 - if (test_bit(__IXGBE_RX_3K_BUFFER, &ring->state)) 468 + if (test_bit(__IXGBE_RX_3K_BUFFER, ring->state)) 470 469 return 1; 471 470 #endif 472 471 return 0;
+2 -2
drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c
··· 976 976 * can be marked as checksum errors. 977 977 */ 978 978 if (adapter->hw.mac.type == ixgbe_mac_82599EB) 979 - set_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state); 979 + set_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, ring->state); 980 980 981 981 #ifdef IXGBE_FCOE 982 982 if (adapter->netdev->fcoe_mtu) { ··· 984 984 f = &adapter->ring_feature[RING_F_FCOE]; 985 985 if ((rxr_idx >= f->offset) && 986 986 (rxr_idx < f->offset + f->indices)) 987 - set_bit(__IXGBE_RX_FCOE, &ring->state); 987 + set_bit(__IXGBE_RX_FCOE, ring->state); 988 988 } 989 989 990 990 #endif /* IXGBE_FCOE */
+28 -28
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
··· 968 968 969 969 for (i = 0; i < adapter->num_tx_queues; i++) 970 970 clear_bit(__IXGBE_HANG_CHECK_ARMED, 971 - &adapter->tx_ring[i]->state); 971 + adapter->tx_ring[i]->state); 972 972 } 973 973 974 974 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter) ··· 1011 1011 1012 1012 tc = tx_ring->dcb_tc; 1013 1013 if (xoff[tc]) 1014 - clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state); 1014 + clear_bit(__IXGBE_HANG_CHECK_ARMED, tx_ring->state); 1015 1015 } 1016 1016 1017 1017 for (i = 0; i < adapter->num_xdp_queues; i++) { ··· 1019 1019 1020 1020 tc = xdp_ring->dcb_tc; 1021 1021 if (xoff[tc]) 1022 - clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state); 1022 + clear_bit(__IXGBE_HANG_CHECK_ARMED, xdp_ring->state); 1023 1023 } 1024 1024 } 1025 1025 ··· 1103 1103 if (tx_done_old == tx_done && tx_pending) 1104 1104 /* make sure it is true for two checks in a row */ 1105 1105 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED, 1106 - &tx_ring->state); 1106 + tx_ring->state); 1107 1107 /* update completed stats and continue */ 1108 1108 tx_ring->tx_stats.tx_done_old = tx_done; 1109 1109 /* reset the countdown */ 1110 - clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state); 1110 + clear_bit(__IXGBE_HANG_CHECK_ARMED, tx_ring->state); 1111 1111 1112 1112 return false; 1113 1113 } ··· 1660 1660 { 1661 1661 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info; 1662 1662 1663 - return test_bit(__IXGBE_RX_FCOE, &ring->state) && 1663 + return test_bit(__IXGBE_RX_FCOE, ring->state) && 1664 1664 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) == 1665 1665 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE << 1666 1666 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT))); ··· 1708 1708 * checksum errors. 1709 1709 */ 1710 1710 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) && 1711 - test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state)) 1711 + test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, ring->state)) 1712 1712 return; 1713 1713 1714 1714 ring->rx_stats.csum_err++; ··· 3526 3526 for (i = 0; i < adapter->num_tx_queues; i++) { 3527 3527 struct ixgbe_ring *ring = adapter->tx_ring[i]; 3528 3528 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE, 3529 - &ring->state)) 3529 + ring->state)) 3530 3530 reinit_count++; 3531 3531 } 3532 3532 if (reinit_count) { ··· 3952 3952 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) { 3953 3953 ring->atr_sample_rate = adapter->atr_sample_rate; 3954 3954 ring->atr_count = 0; 3955 - set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state); 3955 + set_bit(__IXGBE_TX_FDIR_INIT_DONE, ring->state); 3956 3956 } else { 3957 3957 ring->atr_sample_rate = 0; 3958 3958 } 3959 3959 3960 3960 /* initialize XPS */ 3961 - if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) { 3961 + if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, ring->state)) { 3962 3962 struct ixgbe_q_vector *q_vector = ring->q_vector; 3963 3963 3964 3964 if (q_vector) ··· 3967 3967 ring->queue_index); 3968 3968 } 3969 3969 3970 - clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state); 3970 + clear_bit(__IXGBE_HANG_CHECK_ARMED, ring->state); 3971 3971 3972 3972 /* reinitialize tx_buffer_info */ 3973 3973 memset(ring->tx_buffer_info, 0, ··· 4173 4173 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 4174 4174 else 4175 4175 srrctl |= xsk_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 4176 - } else if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state)) { 4176 + } else if (test_bit(__IXGBE_RX_3K_BUFFER, rx_ring->state)) { 4177 4177 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 4178 4178 } else { 4179 4179 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; ··· 4558 4558 * higher than the MTU of the PF. 4559 4559 */ 4560 4560 if (ring_uses_build_skb(ring) && 4561 - !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state)) 4561 + !test_bit(__IXGBE_RX_3K_BUFFER, ring->state)) 4562 4562 rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB | 4563 4563 IXGBE_RXDCTL_RLPML_EN; 4564 4564 #endif ··· 4733 4733 rx_ring = adapter->rx_ring[i]; 4734 4734 4735 4735 clear_ring_rsc_enabled(rx_ring); 4736 - clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); 4737 - clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state); 4736 + clear_bit(__IXGBE_RX_3K_BUFFER, rx_ring->state); 4737 + clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, rx_ring->state); 4738 4738 4739 4739 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) 4740 4740 set_ring_rsc_enabled(rx_ring); 4741 4741 4742 - if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state)) 4743 - set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); 4742 + if (test_bit(__IXGBE_RX_FCOE, rx_ring->state)) 4743 + set_bit(__IXGBE_RX_3K_BUFFER, rx_ring->state); 4744 4744 4745 4745 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY) 4746 4746 continue; 4747 4747 4748 - set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state); 4748 + set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, rx_ring->state); 4749 4749 4750 4750 #if (PAGE_SIZE < 8192) 4751 4751 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) 4752 - set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); 4752 + set_bit(__IXGBE_RX_3K_BUFFER, rx_ring->state); 4753 4753 4754 4754 if (IXGBE_2K_TOO_SMALL_WITH_PADDING || 4755 4755 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN))) 4756 - set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); 4756 + set_bit(__IXGBE_RX_3K_BUFFER, rx_ring->state); 4757 4757 #endif 4758 4758 } 4759 4759 } ··· 7944 7944 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) { 7945 7945 for (i = 0; i < adapter->num_tx_queues; i++) 7946 7946 set_bit(__IXGBE_TX_FDIR_INIT_DONE, 7947 - &(adapter->tx_ring[i]->state)); 7947 + adapter->tx_ring[i]->state); 7948 7948 for (i = 0; i < adapter->num_xdp_queues; i++) 7949 7949 set_bit(__IXGBE_TX_FDIR_INIT_DONE, 7950 - &adapter->xdp_ring[i]->state); 7950 + adapter->xdp_ring[i]->state); 7951 7951 /* re-enable flow director interrupts */ 7952 7952 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR); 7953 7953 } else { ··· 9488 9488 ixgbe_tx_csum(tx_ring, first, &ipsec_tx); 9489 9489 9490 9490 /* add the ATR filter if ATR is on */ 9491 - if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state)) 9491 + if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, tx_ring->state)) 9492 9492 ixgbe_atr(tx_ring, first); 9493 9493 9494 9494 #ifdef IXGBE_FCOE ··· 9528 9528 return NETDEV_TX_OK; 9529 9529 9530 9530 tx_ring = ring ? ring : adapter->tx_ring[skb_get_queue_mapping(skb)]; 9531 - if (unlikely(test_bit(__IXGBE_TX_DISABLED, &tx_ring->state))) 9531 + if (unlikely(test_bit(__IXGBE_TX_DISABLED, tx_ring->state))) 9532 9532 return NETDEV_TX_BUSY; 9533 9533 9534 9534 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring); ··· 11013 11013 if (unlikely(!ring)) 11014 11014 return -ENXIO; 11015 11015 11016 - if (unlikely(test_bit(__IXGBE_TX_DISABLED, &ring->state))) 11016 + if (unlikely(test_bit(__IXGBE_TX_DISABLED, ring->state))) 11017 11017 return -ENXIO; 11018 11018 11019 11019 if (static_branch_unlikely(&ixgbe_xdp_locking_key)) ··· 11119 11119 static void ixgbe_disable_txr(struct ixgbe_adapter *adapter, 11120 11120 struct ixgbe_ring *tx_ring) 11121 11121 { 11122 - set_bit(__IXGBE_TX_DISABLED, &tx_ring->state); 11122 + set_bit(__IXGBE_TX_DISABLED, tx_ring->state); 11123 11123 ixgbe_disable_txr_hw(adapter, tx_ring); 11124 11124 } 11125 11125 ··· 11273 11273 ixgbe_configure_tx_ring(adapter, xdp_ring); 11274 11274 ixgbe_configure_rx_ring(adapter, rx_ring); 11275 11275 11276 - clear_bit(__IXGBE_TX_DISABLED, &tx_ring->state); 11276 + clear_bit(__IXGBE_TX_DISABLED, tx_ring->state); 11277 11277 if (xdp_ring) 11278 - clear_bit(__IXGBE_TX_DISABLED, &xdp_ring->state); 11278 + clear_bit(__IXGBE_TX_DISABLED, xdp_ring->state); 11279 11279 11280 11280 /* Rx/Tx/XDP Tx share the same napi context. */ 11281 11281 napi_enable(&rx_ring->q_vector->napi);
+1 -1
drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c
··· 524 524 525 525 ring = adapter->xdp_ring[qid]; 526 526 527 - if (test_bit(__IXGBE_TX_DISABLED, &ring->state)) 527 + if (test_bit(__IXGBE_TX_DISABLED, ring->state)) 528 528 return -ENETDOWN; 529 529 530 530 if (!ring->xsk_pool)