tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'iommu-fixes-v4.20-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull IOMMU fixes from Joerg Roedel:

- Two fixes for the Intel VT-d driver to fix a NULL-ptr dereference and
an unbalance in an allocate/free path (allocated with memremap, freed
with iounmap)

- Fix for a crash in the Renesas IOMMU driver

- Fix for the Advanced Virtual Interrupt Controler (AVIC) code in the
AMD IOMMU driver

* tag 'iommu-fixes-v4.20-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
iommu/vt-d: Use memunmap to free memremap
amd/iommu: Fix Guest Virtual APIC Log Tail Address Register
iommu/ipmmu-vmsa: Fix crash on early domain free
iommu/vt-d: Fix NULL pointer dereference in prq_event_thread()

Linus Torvalds d88783b9 a03bac58

+7 -3
+2 -1
drivers/iommu/amd_iommu_init.c
··· 797 797 entry = iommu_virt_to_phys(iommu->ga_log) | GA_LOG_SIZE_512; 798 798 memcpy_toio(iommu->mmio_base + MMIO_GA_LOG_BASE_OFFSET, 799 799 &entry, sizeof(entry)); 800 - entry = (iommu_virt_to_phys(iommu->ga_log) & 0xFFFFFFFFFFFFFULL) & ~7ULL; 800 + entry = (iommu_virt_to_phys(iommu->ga_log_tail) & 801 + (BIT_ULL(52)-1)) & ~7ULL; 801 802 memcpy_toio(iommu->mmio_base + MMIO_GA_LOG_TAIL_OFFSET, 802 803 &entry, sizeof(entry)); 803 804 writel(0x00, iommu->mmio_base + MMIO_GA_HEAD_OFFSET);
+1 -1
drivers/iommu/intel-iommu.c
··· 3075 3075 } 3076 3076 3077 3077 if (old_ce) 3078 - iounmap(old_ce); 3078 + memunmap(old_ce); 3079 3079 3080 3080 ret = 0; 3081 3081 if (devfn < 0x80)
+1 -1
drivers/iommu/intel-svm.c
··· 595 595 pr_err("%s: Page request without PASID: %08llx %08llx\n", 596 596 iommu->name, ((unsigned long long *)req)[0], 597 597 ((unsigned long long *)req)[1]); 598 - goto bad_req; 598 + goto no_pasid; 599 599 } 600 600 601 601 if (!svm || svm->pasid != req->pasid) {
+3
drivers/iommu/ipmmu-vmsa.c
··· 498 498 499 499 static void ipmmu_domain_destroy_context(struct ipmmu_vmsa_domain *domain) 500 500 { 501 + if (!domain->mmu) 502 + return; 503 + 501 504 /* 502 505 * Disable the context. Flush the TLB as required when modifying the 503 506 * context registers.