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arm64: dts: qcom: sm8250: Pad addresses to 8 hex digits

Some addresses were 7-hex-digits long. Fix that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221230135044.287874-1-konrad.dybcio@linaro.org

authored by

Konrad Dybcio and committed by
Bjorn Andersson d8b4ee93 e09327d7

+4 -4
+4 -4
arch/arm64/boot/dts/qcom/sm8250.dtsi
··· 2272 2272 pinctrl-names = "default"; 2273 2273 pinctrl-0 = <&rx_swr_active>; 2274 2274 compatible = "qcom,sm8250-lpass-rx-macro"; 2275 - reg = <0 0x3200000 0 0x1000>; 2275 + reg = <0 0x03200000 0 0x1000>; 2276 2276 status = "disabled"; 2277 2277 2278 2278 clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, ··· 2290 2290 }; 2291 2291 2292 2292 swr1: soundwire-controller@3210000 { 2293 - reg = <0 0x3210000 0 0x2000>; 2293 + reg = <0 0x03210000 0 0x2000>; 2294 2294 compatible = "qcom,soundwire-v1.5.1"; 2295 2295 status = "disabled"; 2296 2296 interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; ··· 2319 2319 pinctrl-names = "default"; 2320 2320 pinctrl-0 = <&tx_swr_active>; 2321 2321 compatible = "qcom,sm8250-lpass-tx-macro"; 2322 - reg = <0 0x3220000 0 0x1000>; 2322 + reg = <0 0x03220000 0 0x1000>; 2323 2323 status = "disabled"; 2324 2324 2325 2325 clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, ··· 2340 2340 2341 2341 /* tx macro */ 2342 2342 swr2: soundwire-controller@3230000 { 2343 - reg = <0 0x3230000 0 0x2000>; 2343 + reg = <0 0x03230000 0 0x2000>; 2344 2344 compatible = "qcom,soundwire-v1.5.1"; 2345 2345 interrupts-extended = <&intc GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>; 2346 2346 interrupt-names = "core";