Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

drm/amd/display: [FW Promotion] Release 0.1.40.0

Summary for changes in firmware:
* Update DCHVM restore sequence for dcn35
* Add 2 new debug polling methods for dchvm "busy" during IPS entry for DCN35

Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Acked-by: Wayne Lin <Wayne.Lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Taimur Hassan and committed by
Alex Deucher
d8e4e708 d38ec099

+49 -23
+49 -23
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
··· 636 636 637 637 /** 638 638 * 0x10 (bit 4) 639 - * @skip_crtc_disabled: CRTC disable skipped 640 - */ 641 - uint32_t skip_crtc_disabled : 1; 642 - 643 - /* 644 - * 0x20 (bit 5) 645 639 * @visual_confirm_rate_control: Enable Visual Confirm rate control detection 646 640 */ 647 641 uint32_t visual_confirm_rate_control : 1; 648 642 649 - uint32_t reserved : 26; 643 + /** 644 + * 0x20 (bit 5) 645 + * @force_full_frame_update: Force all selective updates to be full frame updates 646 + */ 647 + uint32_t force_full_frame_update : 1; 648 + 649 + /** 650 + * 0x40 (bit 6) 651 + * @force_dpg_on: Force DPG on 652 + */ 653 + uint32_t force_dpg_on : 1; 654 + 655 + /** 656 + * 0x80 (bit 7) 657 + * @force_hubp_on: Force Hubp on 658 + */ 659 + uint32_t force_hubp_on : 1; 660 + 661 + uint32_t reserved : 24; 650 662 } bitfields; 651 663 652 664 uint32_t u32All; ··· 681 669 * @fec_enable_status: receive fec enable/disable status from driver 682 670 */ 683 671 uint32_t fec_enable_status : 1; 684 - 685 672 /* 686 673 * @smu_optimizations_en: SMU power optimization. 687 674 * Only when active display is Replay capable and display enters Replay. 688 675 * Trigger interrupt to SMU to powerup/down. 689 676 */ 690 677 uint32_t smu_optimizations_en : 1; 691 - 692 - /** 693 - * @phy_power_state: Indicates current phy power state 694 - */ 695 - uint32_t phy_power_state : 1; 696 - 697 678 /** 698 679 * @link_power_state: Indicates current link power state 699 680 */ ··· 703 698 * @alpm_mode: Indicates ALPM mode selected 704 699 */ 705 700 uint32_t alpm_mode : 2; 701 + uint32_t reserved : 23; 706 702 } bitfields; 707 703 708 704 uint32_t u32All; ··· 4285 4279 // Active and Pending Power Up 4286 4280 PR_STATE_2_PENDING_POWER_UP = 0x33, 4287 4281 // Active and Powered Up, Pending DPG latch 4288 - PR_STATE_2_PENDING_LOCK_FOR_DPG_POWER_ON = 0x34, 4282 + PR_STATE_2_PENDING_LOCK = 0x34, 4289 4283 // Active and Powered Up, Pending SDP and Unlock 4290 4284 PR_STATE_2_PENDING_SDP_AND_UNLOCK = 0x35, 4291 4285 // Pending transmission of AS SDP for timing sync, but no rfb update ··· 6612 6606 */ 6613 6607 uint8_t panel_inst; 6614 6608 /** 6615 - * Length of each horizontal line in ns. 6616 - */ 6617 - uint32_t line_time_in_ns; 6618 - /** 6619 6609 * PHY instance. 6620 6610 */ 6621 6611 uint8_t dpphy_inst; ··· 6619 6617 * Determines if SMU optimzations are enabled/disabled. 6620 6618 */ 6621 6619 uint8_t smu_optimizations_en; 6622 - /* 6623 - * Use FSM state for Replay power up/down 6620 + /** 6621 + * Length of each horizontal line in ns. 6624 6622 */ 6625 - uint8_t use_phy_fsm; 6623 + uint32_t line_time_in_ns; 6626 6624 /* 6627 6625 * Use FSFT afftet pixel clk 6628 6626 */ ··· 6636 6634 */ 6637 6635 struct dmub_alpm_auxless_data auxless_alpm_data; 6638 6636 /** 6637 + * DSC Slice height. 6638 + */ 6639 + uint16_t dsc_slice_height; 6640 + /* 6641 + * Use FSM state for Replay power up/down 6642 + */ 6643 + uint8_t use_phy_fsm; 6644 + /** 6639 6645 * @hpo_stream_enc_inst: HPO stream encoder instance 6640 6646 */ 6641 6647 uint8_t hpo_stream_enc_inst; ··· 6651 6641 * @hpo_link_enc_inst: HPO link encoder instance 6652 6642 */ 6653 6643 uint8_t hpo_link_enc_inst; 6644 + /* 6645 + * Selective Update granularity needed. 6646 + */ 6647 + uint8_t su_granularity_needed; 6648 + /* 6649 + * Horizontal granularity for Selective Update. 6650 + */ 6651 + uint16_t su_x_granularity; 6652 + /* 6653 + * Extended caps of vertical granularity for Selective Update. 6654 + */ 6655 + uint16_t su_y_granularity_extended_caps; 6656 + /* 6657 + * Vertical granularity for Selective Update. 6658 + */ 6659 + uint8_t su_y_granularity; 6654 6660 /** 6655 6661 * @pad: Align structure to 4 byte boundary. 6656 6662 */ 6657 - uint8_t pad[2]; 6663 + uint8_t pad; 6658 6664 }; 6659 6665 6660 6666 /**