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Merge tag 'riscv-for-linus-5.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Palmer Dabbelt:

- A build fix to always build modules with the 'medany' code model, as
the module loader doesn't support 'medlow'.

- A Kconfig warning fix for the SiFive errata.

- A pair of fixes that for regressions to the recent memory layout
changes.

- A fix for the FU740 device tree.

* tag 'riscv-for-linus-5.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: dts: fu740: fix cache-controller interrupts
riscv: Ensure BPF_JIT_REGION_START aligned with PMD size
riscv: kasan: Fix MODULES_VADDR evaluation due to local variables' name
riscv: sifive: fix Kconfig errata warning
riscv32: Use medany C model for modules

+12 -12
+2 -2
Documentation/riscv/vm-layout.rst
··· 58 58 | 59 59 ____________________________________________________________|____________________________________________________________ 60 60 | | | | 61 - ffffffff00000000 | -4 GB | ffffffff7fffffff | 2 GB | modules 62 - ffffffff80000000 | -2 GB | ffffffffffffffff | 2 GB | kernel, BPF 61 + ffffffff00000000 | -4 GB | ffffffff7fffffff | 2 GB | modules, BPF 62 + ffffffff80000000 | -2 GB | ffffffffffffffff | 2 GB | kernel 63 63 __________________|____________|__________________|_________|____________________________________________________________
+1
arch/riscv/Kconfig.socs
··· 14 14 select CLK_SIFIVE 15 15 select CLK_SIFIVE_PRCI 16 16 select SIFIVE_PLIC 17 + select RISCV_ERRATA_ALTERNATIVE 17 18 select ERRATA_SIFIVE 18 19 help 19 20 This enables support for SiFive SoC platform hardware.
+1 -1
arch/riscv/Makefile
··· 16 16 CC_FLAGS_FTRACE := -fpatchable-function-entry=8 17 17 endif 18 18 19 - ifeq ($(CONFIG_64BIT)$(CONFIG_CMODEL_MEDLOW),yy) 19 + ifeq ($(CONFIG_CMODEL_MEDLOW),y) 20 20 KBUILD_CFLAGS_MODULE += -mcmodel=medany 21 21 endif 22 22
+1 -1
arch/riscv/boot/dts/sifive/fu740-c000.dtsi
··· 273 273 cache-size = <2097152>; 274 274 cache-unified; 275 275 interrupt-parent = <&plic0>; 276 - interrupts = <19 20 21 22>; 276 + interrupts = <19 21 22 20>; 277 277 reg = <0x0 0x2010000 0x0 0x1000>; 278 278 }; 279 279 gpio: gpio@10060000 {
+2 -3
arch/riscv/include/asm/pgtable.h
··· 30 30 31 31 #define BPF_JIT_REGION_SIZE (SZ_128M) 32 32 #ifdef CONFIG_64BIT 33 - /* KASLR should leave at least 128MB for BPF after the kernel */ 34 - #define BPF_JIT_REGION_START PFN_ALIGN((unsigned long)&_end) 35 - #define BPF_JIT_REGION_END (BPF_JIT_REGION_START + BPF_JIT_REGION_SIZE) 33 + #define BPF_JIT_REGION_START (BPF_JIT_REGION_END - BPF_JIT_REGION_SIZE) 34 + #define BPF_JIT_REGION_END (MODULES_END) 36 35 #else 37 36 #define BPF_JIT_REGION_START (PAGE_OFFSET - BPF_JIT_REGION_SIZE) 38 37 #define BPF_JIT_REGION_END (VMALLOC_END)
+5 -5
arch/riscv/mm/kasan_init.c
··· 169 169 170 170 void __init kasan_init(void) 171 171 { 172 - phys_addr_t _start, _end; 172 + phys_addr_t p_start, p_end; 173 173 u64 i; 174 174 175 175 /* ··· 189 189 (void *)kasan_mem_to_shadow((void *)VMALLOC_END)); 190 190 191 191 /* Populate the linear mapping */ 192 - for_each_mem_range(i, &_start, &_end) { 193 - void *start = (void *)__va(_start); 194 - void *end = (void *)__va(_end); 192 + for_each_mem_range(i, &p_start, &p_end) { 193 + void *start = (void *)__va(p_start); 194 + void *end = (void *)__va(p_end); 195 195 196 196 if (start >= end) 197 197 break; ··· 201 201 202 202 /* Populate kernel, BPF, modules mapping */ 203 203 kasan_populate(kasan_mem_to_shadow((const void *)MODULES_VADDR), 204 - kasan_mem_to_shadow((const void *)BPF_JIT_REGION_END)); 204 + kasan_mem_to_shadow((const void *)MODULES_VADDR + SZ_2G)); 205 205 206 206 for (i = 0; i < PTRS_PER_PTE; i++) 207 207 set_pte(&kasan_early_shadow_pte[i],