Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'perf-urgent-2025-06-08' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 perf fix from Thomas Gleixner:
"A single fix for the x86 performance counters on Intel CPUs:
The MSR offset calculations for fixed performance counters are stored
at the wrong index in the configuration array causing the general
purpose counter MSR offset to be overwritten, so both the general
purpose and the fixed counters offsets are incorrect.
Correct the array index calculation to fix that"
* tag 'perf-urgent-2025-06-08' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86/intel: Fix incorrect MSR index calculations in intel_pmu_config_acr()
+5
-3
+5
-3
arch/x86/events/intel/core.c
+5
-3
arch/x86/events/intel/core.c
···
2900
2900
{
2901
2901
struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
2902
2902
int msr_b, msr_c;
2903
+
int msr_offset;
2903
2904
2904
2905
if (!mask && !cpuc->acr_cfg_b[idx])
2905
2906
return;
···
2908
2907
if (idx < INTEL_PMC_IDX_FIXED) {
2909
2908
msr_b = MSR_IA32_PMC_V6_GP0_CFG_B;
2910
2909
msr_c = MSR_IA32_PMC_V6_GP0_CFG_C;
2910
+
msr_offset = x86_pmu.addr_offset(idx, false);
2911
2911
} else {
2912
2912
msr_b = MSR_IA32_PMC_V6_FX0_CFG_B;
2913
2913
msr_c = MSR_IA32_PMC_V6_FX0_CFG_C;
2914
-
idx -= INTEL_PMC_IDX_FIXED;
2914
+
msr_offset = x86_pmu.addr_offset(idx - INTEL_PMC_IDX_FIXED, false);
2915
2915
}
2916
2916
2917
2917
if (cpuc->acr_cfg_b[idx] != mask) {
2918
-
wrmsrl(msr_b + x86_pmu.addr_offset(idx, false), mask);
2918
+
wrmsrl(msr_b + msr_offset, mask);
2919
2919
cpuc->acr_cfg_b[idx] = mask;
2920
2920
}
2921
2921
/* Only need to update the reload value when there is a valid config value. */
2922
2922
if (mask && cpuc->acr_cfg_c[idx] != reload) {
2923
-
wrmsrl(msr_c + x86_pmu.addr_offset(idx, false), reload);
2923
+
wrmsrl(msr_c + msr_offset, reload);
2924
2924
cpuc->acr_cfg_c[idx] = reload;
2925
2925
}
2926
2926
}