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KVM: arm64: gic: Enable GICv3 CPUIF trapping on GICv5 hosts if required

Factor out the enable (and printing of) the GICv3 CPUIF traps from the
main GICv3 probe into a separate function. Call said function from the
GICv5 probe for legacy support, ensuring that any required GICv3 CPUIF
traps on GICv5 hosts will be correctly handled, rather than injecting
an undef into the guest.

Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
Link: https://patch.msgid.link/20251208152724.3637157-3-sascha.bischoff@arm.com
Signed-off-by: Marc Zyngier <maz@kernel.org>

authored by

Sascha Bischoff and committed by
Marc Zyngier da63758c 9ace4753

+18 -10
+15 -10
arch/arm64/kvm/vgic/vgic-v3.c
··· 880 880 *updptr = cpu_to_le32(insn); 881 881 } 882 882 883 + void vgic_v3_enable_cpuif_traps(void) 884 + { 885 + u64 traps = vgic_ich_hcr_trap_bits(); 886 + 887 + if (traps) { 888 + kvm_info("GICv3 sysreg trapping enabled ([%s%s%s%s], reduced performance)\n", 889 + (traps & ICH_HCR_EL2_TALL0) ? "G0" : "", 890 + (traps & ICH_HCR_EL2_TALL1) ? "G1" : "", 891 + (traps & ICH_HCR_EL2_TC) ? "C" : "", 892 + (traps & ICH_HCR_EL2_TDIR) ? "D" : ""); 893 + static_branch_enable(&vgic_v3_cpuif_trap); 894 + } 895 + } 896 + 883 897 /** 884 898 * vgic_v3_probe - probe for a VGICv3 compatible interrupt controller 885 899 * @info: pointer to the GIC description ··· 905 891 { 906 892 u64 ich_vtr_el2 = kvm_call_hyp_ret(__vgic_v3_get_gic_config); 907 893 bool has_v2; 908 - u64 traps; 909 894 int ret; 910 895 911 896 has_v2 = ich_vtr_el2 >> 63; ··· 968 955 kvm_vgic_global_state.ich_vtr_el2 &= ~ICH_VTR_EL2_SEIS; 969 956 } 970 957 971 - traps = vgic_ich_hcr_trap_bits(); 972 - if (traps) { 973 - kvm_info("GICv3 sysreg trapping enabled ([%s%s%s%s], reduced performance)\n", 974 - (traps & ICH_HCR_EL2_TALL0) ? "G0" : "", 975 - (traps & ICH_HCR_EL2_TALL1) ? "G1" : "", 976 - (traps & ICH_HCR_EL2_TC) ? "C" : "", 977 - (traps & ICH_HCR_EL2_TDIR) ? "D" : ""); 978 - static_branch_enable(&vgic_v3_cpuif_trap); 979 - } 958 + vgic_v3_enable_cpuif_traps(); 980 959 981 960 kvm_vgic_global_state.vctrl_base = NULL; 982 961 kvm_vgic_global_state.type = VGIC_V3;
+2
arch/arm64/kvm/vgic/vgic-v5.c
··· 48 48 static_branch_enable(&kvm_vgic_global_state.gicv3_cpuif); 49 49 kvm_info("GCIE legacy system register CPU interface\n"); 50 50 51 + vgic_v3_enable_cpuif_traps(); 52 + 51 53 return 0; 52 54 }
+1
arch/arm64/kvm/vgic/vgic.h
··· 324 324 void vgic_v3_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr); 325 325 void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr); 326 326 void vgic_v3_reset(struct kvm_vcpu *vcpu); 327 + void vgic_v3_enable_cpuif_traps(void); 327 328 int vgic_v3_probe(const struct gic_kvm_info *info); 328 329 int vgic_v3_map_resources(struct kvm *kvm); 329 330 int vgic_v3_lpi_sync_pending_status(struct kvm *kvm, struct vgic_irq *irq);