Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'pci/controller/j721e'
- Add MODULE_DEVICE_TABLE() so driver can be autoloaded (Siddharth
Vadapalli)
- Power controller off before configuring the glue layer so the controller
latches the correct values on power-on (Siddharth Vadapalli)
- Correct the error message when j721e_pcie_ctrl_init() fails (Alok Tiwari)
* pci/controller/j721e:
PCI: j721e: Fix incorrect error message in probe()
PCI: j721e: Fix programming sequence of "strap" settings
PCI: j721e: Fix module autoloading
+27
-1
+27
-1
drivers/pci/controller/cadence/pci-j721e.c
+27
-1
drivers/pci/controller/cadence/pci-j721e.c
···
284
284
if (!ret)
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offset = args.args[0];
286
286
287
+
/*
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+
* The PCIe Controller's registers have different "reset-values"
289
+
* depending on the "strap" settings programmed into the PCIEn_CTRL
290
+
* register within the CTRL_MMR memory-mapped register space.
291
+
* The registers latch onto a "reset-value" based on the "strap"
292
+
* settings sampled after the PCIe Controller is powered on.
293
+
* To ensure that the "reset-values" are sampled accurately, power
294
+
* off the PCIe Controller before programming the "strap" settings
295
+
* and power it on after that. The runtime PM APIs namely
296
+
* pm_runtime_put_sync() and pm_runtime_get_sync() will decrement and
297
+
* increment the usage counter respectively, causing GENPD to power off
298
+
* and power on the PCIe Controller.
299
+
*/
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+
ret = pm_runtime_put_sync(dev);
301
+
if (ret < 0) {
302
+
dev_err(dev, "Failed to power off PCIe Controller\n");
303
+
return ret;
304
+
}
305
+
287
306
ret = j721e_pcie_set_mode(pcie, syscon, offset);
288
307
if (ret < 0) {
289
308
dev_err(dev, "Failed to set pci mode\n");
···
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299
ret = j721e_pcie_set_lane_count(pcie, syscon, offset);
319
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if (ret < 0) {
320
301
dev_err(dev, "Failed to set num-lanes\n");
302
+
return ret;
303
+
}
304
+
305
+
ret = pm_runtime_get_sync(dev);
306
+
if (ret < 0) {
307
+
dev_err(dev, "Failed to power on PCIe Controller\n");
321
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return ret;
322
309
}
323
310
···
465
440
},
466
441
{},
467
442
};
443
+
MODULE_DEVICE_TABLE(of, of_j721e_pcie_match);
468
444
469
445
static int j721e_pcie_probe(struct platform_device *pdev)
470
446
{
···
575
549
576
550
ret = j721e_pcie_ctrl_init(pcie);
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551
if (ret < 0) {
578
-
dev_err_probe(dev, ret, "pm_runtime_get_sync failed\n");
552
+
dev_err_probe(dev, ret, "j721e_pcie_ctrl_init failed\n");
579
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goto err_get_sync;
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554
}
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555