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drm/amdgpu: Add fw vram usage reserve-region

Use reserve region helpers for initializing/reserving firmware usage
region in virtualized environments.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Lijo Lazar and committed by
Alex Deucher
daaf24d1 14a517e3

+41 -84
+3 -3
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
··· 1685 1685 (uint32_t)(ATOM_VRAM_BLOCK_SRIOV_MSG_SHARE_RESERVATION << 1686 1686 ATOM_VRAM_OPERATION_FLAGS_SHIFT)) { 1687 1687 /* Firmware request VRAM reservation for SR-IOV */ 1688 - adev->mman.fw_vram_usage_start_offset = (start_addr & 1689 - (~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10; 1690 - adev->mman.fw_vram_usage_size = size << 10; 1688 + amdgpu_ttm_init_vram_resv(adev, AMDGPU_RESV_FW_VRAM_USAGE, 1689 + (start_addr & (~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10, 1690 + size << 10, true); 1691 1691 /* Use the default scratch size */ 1692 1692 usage_bytes = 0; 1693 1693 } else {
+6 -6
drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
··· 120 120 (u32)(ATOM_VRAM_BLOCK_SRIOV_MSG_SHARE_RESERVATION << 121 121 ATOM_VRAM_OPERATION_FLAGS_SHIFT)) { 122 122 /* Firmware request VRAM reservation for SR-IOV */ 123 - adev->mman.fw_vram_usage_start_offset = (start_addr & 124 - (~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10; 125 - adev->mman.fw_vram_usage_size = fw_size << 10; 123 + amdgpu_ttm_init_vram_resv(adev, AMDGPU_RESV_FW_VRAM_USAGE, 124 + (start_addr & (~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10, 125 + fw_size << 10, true); 126 126 /* Use the default scratch size */ 127 127 *usage_bytes = 0; 128 128 } else { ··· 152 152 ((fw_start_addr & (ATOM_VRAM_BLOCK_NEEDS_NO_RESERVATION << 153 153 ATOM_VRAM_OPERATION_FLAGS_SHIFT)) == 0)) { 154 154 /* Firmware request VRAM reservation for SR-IOV */ 155 - adev->mman.fw_vram_usage_start_offset = (fw_start_addr & 156 - (~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10; 157 - adev->mman.fw_vram_usage_size = fw_size << 10; 155 + amdgpu_ttm_init_vram_resv(adev, AMDGPU_RESV_FW_VRAM_USAGE, 156 + (fw_start_addr & (~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10, 157 + fw_size << 10, true); 158 158 } 159 159 160 160 if (amdgpu_sriov_vf(adev) &&
+9 -45
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
··· 1730 1730 } 1731 1731 1732 1732 /* 1733 - * Firmware Reservation functions 1734 - */ 1735 - /** 1736 - * amdgpu_ttm_fw_reserve_vram_fini - free fw reserved vram 1737 - * 1738 - * @adev: amdgpu_device pointer 1739 - * 1740 - * free fw reserved vram if it has been reserved. 1741 - */ 1742 - static void amdgpu_ttm_fw_reserve_vram_fini(struct amdgpu_device *adev) 1743 - { 1744 - amdgpu_bo_free_kernel(&adev->mman.fw_vram_usage_reserved_bo, 1745 - NULL, &adev->mman.fw_vram_usage_va); 1746 - } 1747 - 1748 - /* 1749 1733 * Driver Reservation functions 1750 1734 */ 1751 1735 /** ··· 1744 1760 amdgpu_bo_free_kernel(&adev->mman.drv_vram_usage_reserved_bo, 1745 1761 NULL, 1746 1762 &adev->mman.drv_vram_usage_va); 1747 - } 1748 - 1749 - /** 1750 - * amdgpu_ttm_fw_reserve_vram_init - create bo vram reservation from fw 1751 - * 1752 - * @adev: amdgpu_device pointer 1753 - * 1754 - * create bo vram reservation from fw. 1755 - */ 1756 - static int amdgpu_ttm_fw_reserve_vram_init(struct amdgpu_device *adev) 1757 - { 1758 - uint64_t vram_size = adev->gmc.visible_vram_size; 1759 - 1760 - adev->mman.fw_vram_usage_va = NULL; 1761 - adev->mman.fw_vram_usage_reserved_bo = NULL; 1762 - 1763 - if (adev->mman.fw_vram_usage_size == 0 || 1764 - adev->mman.fw_vram_usage_size > vram_size) 1765 - return 0; 1766 - 1767 - return amdgpu_bo_create_kernel_at(adev, 1768 - adev->mman.fw_vram_usage_start_offset, 1769 - adev->mman.fw_vram_usage_size, 1770 - &adev->mman.fw_vram_usage_reserved_bo, 1771 - &adev->mman.fw_vram_usage_va); 1772 1763 } 1773 1764 1774 1765 /** ··· 2135 2176 *The reserved vram for firmware must be pinned to the specified 2136 2177 *place on the VRAM, so reserve it early. 2137 2178 */ 2138 - r = amdgpu_ttm_fw_reserve_vram_init(adev); 2139 - if (r) 2140 - return r; 2179 + if (adev->mman.resv_region[AMDGPU_RESV_FW_VRAM_USAGE].size > 2180 + adev->gmc.visible_vram_size) { 2181 + adev->mman.resv_region[AMDGPU_RESV_FW_VRAM_USAGE].size = 0; 2182 + } else { 2183 + r = amdgpu_ttm_mark_vram_reserved(adev, AMDGPU_RESV_FW_VRAM_USAGE); 2184 + if (r) 2185 + return r; 2186 + } 2141 2187 2142 2188 /* 2143 2189 * The reserved VRAM for the driver must be pinned to a specific ··· 2305 2341 &adev->mman.sdma_access_ptr); 2306 2342 2307 2343 amdgpu_ttm_free_mmio_remap_bo(adev); 2308 - amdgpu_ttm_fw_reserve_vram_fini(adev); 2344 + amdgpu_ttm_unmark_vram_reserved(adev, AMDGPU_RESV_FW_VRAM_USAGE); 2309 2345 amdgpu_ttm_drv_reserve_vram_fini(adev); 2310 2346 2311 2347 if (drm_dev_enter(adev_to_drm(adev), &idx)) {
-6
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
··· 105 105 106 106 bool keep_stolen_vga_memory; 107 107 108 - /* firmware VRAM reservation */ 109 - u64 fw_vram_usage_start_offset; 110 - u64 fw_vram_usage_size; 111 - struct amdgpu_bo *fw_vram_usage_reserved_bo; 112 - void *fw_vram_usage_va; 113 - 114 108 /* driver VRAM reservation */ 115 109 u64 drv_vram_usage_start_offset; 116 110 u64 drv_vram_usage_size;
+19 -20
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
··· 437 437 struct eeprom_table_record bp; 438 438 uint64_t retired_page; 439 439 uint32_t bp_idx, bp_cnt; 440 - void *vram_usage_va = NULL; 441 - 442 - if (adev->mman.fw_vram_usage_va) 443 - vram_usage_va = adev->mman.fw_vram_usage_va; 444 - else 445 - vram_usage_va = adev->mman.drv_vram_usage_va; 440 + void *fw_va = adev->mman.resv_region[AMDGPU_RESV_FW_VRAM_USAGE].cpu_ptr; 441 + void *vram_usage_va = fw_va ? fw_va : adev->mman.drv_vram_usage_va; 446 442 447 443 memset(&bp, 0, sizeof(bp)); 448 444 ··· 706 710 void amdgpu_virt_init_data_exchange(struct amdgpu_device *adev) 707 711 { 708 712 uint32_t *pfvf_data = NULL; 713 + void *fw_va = adev->mman.resv_region[AMDGPU_RESV_FW_VRAM_USAGE].cpu_ptr; 709 714 710 715 adev->virt.fw_reserve.p_pf2vf = NULL; 711 716 adev->virt.fw_reserve.p_vf2pf = NULL; 712 717 adev->virt.vf2pf_update_interval_ms = 0; 713 718 adev->virt.vf2pf_update_retry_cnt = 0; 714 719 715 - if (adev->mman.fw_vram_usage_va && adev->mman.drv_vram_usage_va) { 720 + if (fw_va && adev->mman.drv_vram_usage_va) { 716 721 dev_warn(adev->dev, "Currently fw_vram and drv_vram should not have values at the same time!"); 717 - } else if (adev->mman.fw_vram_usage_va || adev->mman.drv_vram_usage_va) { 722 + } else if (fw_va || adev->mman.drv_vram_usage_va) { 718 723 /* go through this logic in ip_init and reset to init workqueue*/ 719 724 amdgpu_virt_exchange_data(adev); 720 725 ··· 760 763 uint64_t bp_block_offset = 0; 761 764 uint32_t bp_block_size = 0; 762 765 struct amd_sriov_msg_pf2vf_info *pf2vf_v2 = NULL; 766 + void *fw_va = adev->mman.resv_region[AMDGPU_RESV_FW_VRAM_USAGE].cpu_ptr; 763 767 764 - if (adev->mman.fw_vram_usage_va || adev->mman.drv_vram_usage_va) { 765 - if (adev->mman.fw_vram_usage_va) { 768 + if (fw_va || adev->mman.drv_vram_usage_va) { 769 + if (fw_va) { 766 770 if (adev->virt.req_init_data_ver == GPU_CRIT_REGION_V2) { 767 771 adev->virt.fw_reserve.p_pf2vf = 768 772 (struct amd_sriov_msg_pf2vf_info_header *) 769 - (adev->mman.fw_vram_usage_va + 773 + (fw_va + 770 774 adev->virt.crit_regn_tbl[AMD_SRIOV_MSG_DATAEXCHANGE_TABLE_ID].offset); 771 775 adev->virt.fw_reserve.p_vf2pf = 772 776 (struct amd_sriov_msg_vf2pf_info_header *) 773 - (adev->mman.fw_vram_usage_va + 777 + (fw_va + 774 778 adev->virt.crit_regn_tbl[AMD_SRIOV_MSG_DATAEXCHANGE_TABLE_ID].offset + 775 779 (AMD_SRIOV_MSG_SIZE_KB << 10)); 776 780 adev->virt.fw_reserve.ras_telemetry = 777 - (adev->mman.fw_vram_usage_va + 781 + (fw_va + 778 782 adev->virt.crit_regn_tbl[AMD_SRIOV_MSG_RAS_TELEMETRY_TABLE_ID].offset); 779 783 } else { 780 784 adev->virt.fw_reserve.p_pf2vf = 781 785 (struct amd_sriov_msg_pf2vf_info_header *) 782 - (adev->mman.fw_vram_usage_va + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB_V1 << 10)); 786 + (fw_va + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB_V1 << 10)); 783 787 adev->virt.fw_reserve.p_vf2pf = 784 788 (struct amd_sriov_msg_vf2pf_info_header *) 785 - (adev->mman.fw_vram_usage_va + (AMD_SRIOV_MSG_VF2PF_OFFSET_KB_V1 << 10)); 789 + (fw_va + (AMD_SRIOV_MSG_VF2PF_OFFSET_KB_V1 << 10)); 786 790 adev->virt.fw_reserve.ras_telemetry = 787 - (adev->mman.fw_vram_usage_va + (AMD_SRIOV_MSG_RAS_TELEMETRY_OFFSET_KB_V1 << 10)); 791 + (fw_va + (AMD_SRIOV_MSG_RAS_TELEMETRY_OFFSET_KB_V1 << 10)); 788 792 } 789 793 } else if (adev->mman.drv_vram_usage_va) { 790 794 adev->virt.fw_reserve.p_pf2vf = ··· 1079 1081 } 1080 1082 1081 1083 /* reserved memory starts from crit region base offset with the size of 5MB */ 1082 - adev->mman.fw_vram_usage_start_offset = adev->virt.crit_regn.offset; 1083 - adev->mman.fw_vram_usage_size = adev->virt.crit_regn.size_kb << 10; 1084 + amdgpu_ttm_init_vram_resv(adev, AMDGPU_RESV_FW_VRAM_USAGE, 1085 + adev->virt.crit_regn.offset, 1086 + adev->virt.crit_regn.size_kb << 10, true); 1084 1087 dev_info(adev->dev, 1085 1088 "critical region v%d requested to reserve memory start at %08llx with %llu KB.\n", 1086 1089 init_data_hdr->version, 1087 - adev->mman.fw_vram_usage_start_offset, 1088 - adev->mman.fw_vram_usage_size >> 10); 1090 + adev->mman.resv_region[AMDGPU_RESV_FW_VRAM_USAGE].offset, 1091 + adev->mman.resv_region[AMDGPU_RESV_FW_VRAM_USAGE].size >> 10); 1089 1092 1090 1093 adev->virt.is_dynamic_crit_regn_enabled = true; 1091 1094
+4 -4
drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_virt_ras_cmd.c
··· 36 36 struct amdgpu_device *adev = ras_core->dev; 37 37 struct amdsriov_ras_telemetry *ras_telemetry_cpu; 38 38 struct amdsriov_ras_telemetry *ras_telemetry_gpu; 39 + void *fw_va = adev->mman.resv_region[AMDGPU_RESV_FW_VRAM_USAGE].cpu_ptr; 39 40 uint64_t fw_vram_usage_start_offset = 0; 40 41 uint64_t ras_telemetry_offset = 0; 41 42 42 43 if (!adev->virt.fw_reserve.ras_telemetry) 43 44 return -EINVAL; 44 45 45 - if (adev->mman.fw_vram_usage_va && 46 - adev->mman.fw_vram_usage_va <= adev->virt.fw_reserve.ras_telemetry) { 47 - fw_vram_usage_start_offset = adev->mman.fw_vram_usage_start_offset; 46 + if (fw_va && fw_va <= adev->virt.fw_reserve.ras_telemetry) { 47 + fw_vram_usage_start_offset = adev->mman.resv_region[AMDGPU_RESV_FW_VRAM_USAGE].offset; 48 48 ras_telemetry_offset = (uintptr_t)adev->virt.fw_reserve.ras_telemetry - 49 - (uintptr_t)adev->mman.fw_vram_usage_va; 49 + (uintptr_t)fw_va; 50 50 } else if (adev->mman.drv_vram_usage_va && 51 51 adev->mman.drv_vram_usage_va <= adev->virt.fw_reserve.ras_telemetry) { 52 52 fw_vram_usage_start_offset = adev->mman.drv_vram_usage_start_offset;