Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'char-misc-6.6-final' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver fixes from Greg KH:
"Here are some very small driver fixes for 6.6-final that have shown up
in the past two weeks. Included in here are:
- tiny fastrpc bugfixes for reported errors
- nvmem register fixes
- iio driver fixes for some reported problems
- fpga test fix
- MAINTAINERS file update for fpga
All of these have been in linux-next this week with no reported
problems"
* tag 'char-misc-6.6-final' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc:
fpga: Fix memory leak for fpga_region_test_class_find()
fpga: m10bmc-sec: Change contact for secure update driver
fpga: disable KUnit test suites when module support is enabled
iio: afe: rescale: Accept only offset channels
nvmem: imx: correct nregs for i.MX6ULL
nvmem: imx: correct nregs for i.MX6UL
nvmem: imx: correct nregs for i.MX6SLL
misc: fastrpc: Unmap only if buffer is unmapped from DSP
misc: fastrpc: Clean buffers on remote invocation failures
misc: fastrpc: Free DMA handles for RPC calls with no arguments
misc: fastrpc: Reset metadata buffer to avoid incorrect free
iio: exynos-adc: request second interupt only when touchscreen mode is used
iio: adc: xilinx-xadc: Correct temperature offset/scale for UltraScale
iio: adc: xilinx-xadc: Don't clobber preset voltage/temperature thresholds
dt-bindings: iio: add missing reset-gpios constrain
+85
-73
+7
-7
Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update
+7
-7
Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update
···
1
1
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_root_entry_hash
2
2
Date: Sep 2022
3
3
KernelVersion: 5.20
4
-
Contact: Russ Weight <russell.h.weight@intel.com>
4
+
Contact: Peter Colberg <peter.colberg@intel.com>
5
5
Description: Read only. Returns the root entry hash for the static
6
6
region if one is programmed, else it returns the
7
7
string: "hash not programmed". This file is only
···
11
11
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_root_entry_hash
12
12
Date: Sep 2022
13
13
KernelVersion: 5.20
14
-
Contact: Russ Weight <russell.h.weight@intel.com>
14
+
Contact: Peter Colberg <peter.colberg@intel.com>
15
15
Description: Read only. Returns the root entry hash for the partial
16
16
reconfiguration region if one is programmed, else it
17
17
returns the string: "hash not programmed". This file
···
21
21
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_root_entry_hash
22
22
Date: Sep 2022
23
23
KernelVersion: 5.20
24
-
Contact: Russ Weight <russell.h.weight@intel.com>
24
+
Contact: Peter Colberg <peter.colberg@intel.com>
25
25
Description: Read only. Returns the root entry hash for the BMC image
26
26
if one is programmed, else it returns the string:
27
27
"hash not programmed". This file is only visible if the
···
31
31
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_canceled_csks
32
32
Date: Sep 2022
33
33
KernelVersion: 5.20
34
-
Contact: Russ Weight <russell.h.weight@intel.com>
34
+
Contact: Peter Colberg <peter.colberg@intel.com>
35
35
Description: Read only. Returns a list of indices for canceled code
36
36
signing keys for the static region. The standard bitmap
37
37
list format is used (e.g. "1,2-6,9").
···
39
39
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_canceled_csks
40
40
Date: Sep 2022
41
41
KernelVersion: 5.20
42
-
Contact: Russ Weight <russell.h.weight@intel.com>
42
+
Contact: Peter Colberg <peter.colberg@intel.com>
43
43
Description: Read only. Returns a list of indices for canceled code
44
44
signing keys for the partial reconfiguration region. The
45
45
standard bitmap list format is used (e.g. "1,2-6,9").
···
47
47
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_canceled_csks
48
48
Date: Sep 2022
49
49
KernelVersion: 5.20
50
-
Contact: Russ Weight <russell.h.weight@intel.com>
50
+
Contact: Peter Colberg <peter.colberg@intel.com>
51
51
Description: Read only. Returns a list of indices for canceled code
52
52
signing keys for the BMC. The standard bitmap list format
53
53
is used (e.g. "1,2-6,9").
···
55
55
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/flash_count
56
56
Date: Sep 2022
57
57
KernelVersion: 5.20
58
-
Contact: Russ Weight <russell.h.weight@intel.com>
58
+
Contact: Peter Colberg <peter.colberg@intel.com>
59
59
Description: Read only. Returns number of times the secure update
60
60
staging area has been flashed.
61
61
Format: "%u".
+2
-1
Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml
+2
-1
Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml
+2
-1
Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml
+2
-1
Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml
+2
-1
Documentation/devicetree/bindings/iio/health/ti,afe4403.yaml
+2
-1
Documentation/devicetree/bindings/iio/health/ti,afe4403.yaml
+2
-1
Documentation/devicetree/bindings/iio/health/ti,afe4404.yaml
+2
-1
Documentation/devicetree/bindings/iio/health/ti,afe4404.yaml
+1
-1
MAINTAINERS
+1
-1
MAINTAINERS
···
10701
10701
F: include/linux/mfd/intel-m10-bmc.h
10702
10702
10703
10703
INTEL MAX10 BMC SECURE UPDATES
10704
-
M: Russ Weight <russell.h.weight@intel.com>
10704
+
M: Peter Colberg <peter.colberg@intel.com>
10705
10705
L: linux-fpga@vger.kernel.org
10706
10706
S: Maintained
10707
10707
F: Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update
+2
-2
drivers/fpga/tests/Kconfig
+2
-2
drivers/fpga/tests/Kconfig
···
1
1
config FPGA_KUNIT_TESTS
2
-
tristate "KUnit test for the FPGA subsystem" if !KUNIT_ALL_TESTS
3
-
depends on FPGA && FPGA_REGION && FPGA_BRIDGE && KUNIT=y
2
+
bool "KUnit test for the FPGA subsystem" if !KUNIT_ALL_TESTS
3
+
depends on FPGA=y && FPGA_REGION=y && FPGA_BRIDGE=y && KUNIT=y && MODULES=n
4
4
default KUNIT_ALL_TESTS
5
5
help
6
6
This builds unit tests for the FPGA subsystem
+2
drivers/fpga/tests/fpga-region-test.c
+2
drivers/fpga/tests/fpga-region-test.c
+14
-10
drivers/iio/adc/exynos_adc.c
+14
-10
drivers/iio/adc/exynos_adc.c
···
826
826
}
827
827
}
828
828
829
+
/* leave out any TS related code if unreachable */
830
+
if (IS_REACHABLE(CONFIG_INPUT)) {
831
+
has_ts = of_property_read_bool(pdev->dev.of_node,
832
+
"has-touchscreen") || pdata;
833
+
}
834
+
829
835
irq = platform_get_irq(pdev, 0);
830
836
if (irq < 0)
831
837
return irq;
832
838
info->irq = irq;
833
839
834
-
irq = platform_get_irq(pdev, 1);
835
-
if (irq == -EPROBE_DEFER)
836
-
return irq;
840
+
if (has_ts) {
841
+
irq = platform_get_irq(pdev, 1);
842
+
if (irq == -EPROBE_DEFER)
843
+
return irq;
837
844
838
-
info->tsirq = irq;
845
+
info->tsirq = irq;
846
+
} else {
847
+
info->tsirq = -1;
848
+
}
839
849
840
850
info->dev = &pdev->dev;
841
851
···
909
899
910
900
if (info->data->init_hw)
911
901
info->data->init_hw(info);
912
-
913
-
/* leave out any TS related code if unreachable */
914
-
if (IS_REACHABLE(CONFIG_INPUT)) {
915
-
has_ts = of_property_read_bool(pdev->dev.of_node,
916
-
"has-touchscreen") || pdata;
917
-
}
918
902
919
903
if (pdata)
920
904
info->delay = pdata->delay;
+14
-25
drivers/iio/adc/xilinx-xadc-core.c
+14
-25
drivers/iio/adc/xilinx-xadc-core.c
···
456
456
.interrupt_handler = xadc_zynq_interrupt_handler,
457
457
.update_alarm = xadc_zynq_update_alarm,
458
458
.type = XADC_TYPE_S7,
459
+
/* Temp in C = (val * 503.975) / 2**bits - 273.15 */
460
+
.temp_scale = 503975,
461
+
.temp_offset = 273150,
459
462
};
460
463
461
464
static const unsigned int xadc_axi_reg_offsets[] = {
···
569
566
.interrupt_handler = xadc_axi_interrupt_handler,
570
567
.flags = XADC_FLAGS_BUFFERED | XADC_FLAGS_IRQ_OPTIONAL,
571
568
.type = XADC_TYPE_S7,
569
+
/* Temp in C = (val * 503.975) / 2**bits - 273.15 */
570
+
.temp_scale = 503975,
571
+
.temp_offset = 273150,
572
572
};
573
573
574
574
static const struct xadc_ops xadc_us_axi_ops = {
···
583
577
.interrupt_handler = xadc_axi_interrupt_handler,
584
578
.flags = XADC_FLAGS_BUFFERED | XADC_FLAGS_IRQ_OPTIONAL,
585
579
.type = XADC_TYPE_US,
580
+
/**
581
+
* Values below are for UltraScale+ (SYSMONE4) using internal reference.
582
+
* See https://docs.xilinx.com/v/u/en-US/ug580-ultrascale-sysmon
583
+
*/
584
+
.temp_scale = 509314,
585
+
.temp_offset = 280231,
586
586
};
587
587
588
588
static int _xadc_update_adc_reg(struct xadc *xadc, unsigned int reg,
···
957
945
*val2 = bits;
958
946
return IIO_VAL_FRACTIONAL_LOG2;
959
947
case IIO_TEMP:
960
-
/* Temp in C = (val * 503.975) / 2**bits - 273.15 */
961
-
*val = 503975;
948
+
*val = xadc->ops->temp_scale;
962
949
*val2 = bits;
963
950
return IIO_VAL_FRACTIONAL_LOG2;
964
951
default:
···
965
954
}
966
955
case IIO_CHAN_INFO_OFFSET:
967
956
/* Only the temperature channel has an offset */
968
-
*val = -((273150 << bits) / 503975);
957
+
*val = -((xadc->ops->temp_offset << bits) / xadc->ops->temp_scale);
969
958
return IIO_VAL_INT;
970
959
case IIO_CHAN_INFO_SAMP_FREQ:
971
960
ret = xadc_read_samplerate(xadc);
···
1433
1422
bipolar_mask >> 16);
1434
1423
if (ret)
1435
1424
return ret;
1436
-
1437
-
/* Disable all alarms */
1438
-
ret = xadc_update_adc_reg(xadc, XADC_REG_CONF1, XADC_CONF1_ALARM_MASK,
1439
-
XADC_CONF1_ALARM_MASK);
1440
-
if (ret)
1441
-
return ret;
1442
-
1443
-
/* Set thresholds to min/max */
1444
-
for (i = 0; i < 16; i++) {
1445
-
/*
1446
-
* Set max voltage threshold and both temperature thresholds to
1447
-
* 0xffff, min voltage threshold to 0.
1448
-
*/
1449
-
if (i % 8 < 4 || i == 7)
1450
-
xadc->threshold[i] = 0xffff;
1451
-
else
1452
-
xadc->threshold[i] = 0;
1453
-
ret = xadc_write_adc_reg(xadc, XADC_REG_THRESHOLD(i),
1454
-
xadc->threshold[i]);
1455
-
if (ret)
1456
-
return ret;
1457
-
}
1458
1425
1459
1426
/* Go to non-buffered mode */
1460
1427
xadc_postdisable(indio_dev);
+2
drivers/iio/adc/xilinx-xadc.h
+2
drivers/iio/adc/xilinx-xadc.h
+15
-4
drivers/iio/afe/iio-rescale.c
+15
-4
drivers/iio/afe/iio-rescale.c
···
214
214
return ret < 0 ? ret : -EOPNOTSUPP;
215
215
}
216
216
217
-
ret = iio_read_channel_scale(rescale->source, &scale, &scale2);
218
-
return rescale_process_offset(rescale, ret, scale, scale2,
217
+
if (iio_channel_has_info(rescale->source->channel,
218
+
IIO_CHAN_INFO_SCALE)) {
219
+
ret = iio_read_channel_scale(rescale->source, &scale, &scale2);
220
+
return rescale_process_offset(rescale, ret, scale, scale2,
221
+
schan_off, val, val2);
222
+
}
223
+
224
+
/*
225
+
* If we get here we have no scale so scale 1:1 but apply
226
+
* rescaler and offset, if any.
227
+
*/
228
+
return rescale_process_offset(rescale, IIO_VAL_FRACTIONAL, 1, 1,
219
229
schan_off, val, val2);
220
230
default:
221
231
return -EINVAL;
···
290
280
chan->type = rescale->cfg->type;
291
281
292
282
if (iio_channel_has_info(schan, IIO_CHAN_INFO_RAW) &&
293
-
iio_channel_has_info(schan, IIO_CHAN_INFO_SCALE)) {
294
-
dev_info(dev, "using raw+scale source channel\n");
283
+
(iio_channel_has_info(schan, IIO_CHAN_INFO_SCALE) ||
284
+
iio_channel_has_info(schan, IIO_CHAN_INFO_OFFSET))) {
285
+
dev_info(dev, "using raw+scale/offset source channel\n");
295
286
} else if (iio_channel_has_info(schan, IIO_CHAN_INFO_PROCESSED)) {
296
287
dev_info(dev, "using processed channel\n");
297
288
rescale->chan_processed = true;
+17
-17
drivers/misc/fastrpc.c
+17
-17
drivers/misc/fastrpc.c
···
958
958
if (err)
959
959
return err;
960
960
961
+
memset(ctx->buf->virt, 0, pkt_size);
961
962
rpra = ctx->buf->virt;
962
963
list = fastrpc_invoke_buf_start(rpra, ctx->nscalars);
963
964
pages = fastrpc_phy_page_start(list, ctx->nscalars);
···
1091
1090
}
1092
1091
}
1093
1092
1093
+
/* Clean up fdlist which is updated by DSP */
1094
1094
for (i = 0; i < FASTRPC_MAX_FDLIST; i++) {
1095
1095
if (!fdlist[i])
1096
1096
break;
···
1158
1156
if (IS_ERR(ctx))
1159
1157
return PTR_ERR(ctx);
1160
1158
1161
-
if (ctx->nscalars) {
1162
-
err = fastrpc_get_args(kernel, ctx);
1163
-
if (err)
1164
-
goto bail;
1165
-
}
1159
+
err = fastrpc_get_args(kernel, ctx);
1160
+
if (err)
1161
+
goto bail;
1166
1162
1167
1163
/* make sure that all CPU memory writes are seen by DSP */
1168
1164
dma_wmb();
···
1179
1179
if (err)
1180
1180
goto bail;
1181
1181
1182
+
/* make sure that all memory writes by DSP are seen by CPU */
1183
+
dma_rmb();
1184
+
/* populate all the output buffers with results */
1185
+
err = fastrpc_put_args(ctx, kernel);
1186
+
if (err)
1187
+
goto bail;
1188
+
1182
1189
/* Check the response from remote dsp */
1183
1190
err = ctx->retval;
1184
1191
if (err)
1185
1192
goto bail;
1186
-
1187
-
if (ctx->nscalars) {
1188
-
/* make sure that all memory writes by DSP are seen by CPU */
1189
-
dma_rmb();
1190
-
/* populate all the output buffers with results */
1191
-
err = fastrpc_put_args(ctx, kernel);
1192
-
if (err)
1193
-
goto bail;
1194
-
}
1195
1193
1196
1194
bail:
1197
1195
if (err != -ERESTARTSYS && err != -ETIMEDOUT) {
···
1981
1983
sc = FASTRPC_SCALARS(FASTRPC_RMID_INIT_MEM_UNMAP, 1, 0);
1982
1984
err = fastrpc_internal_invoke(fl, true, FASTRPC_INIT_HANDLE, sc,
1983
1985
&args[0]);
1984
-
fastrpc_map_put(map);
1985
-
if (err)
1986
+
if (err) {
1986
1987
dev_err(dev, "unmmap\tpt fd = %d, 0x%09llx error\n", map->fd, map->raddr);
1988
+
return err;
1989
+
}
1990
+
fastrpc_map_put(map);
1987
1991
1988
-
return err;
1992
+
return 0;
1989
1993
}
1990
1994
1991
1995
static int fastrpc_req_mem_unmap(struct fastrpc_user *fl, char __user *argp)
+3
-3
drivers/nvmem/imx-ocotp.c
+3
-3
drivers/nvmem/imx-ocotp.c
···
498
498
};
499
499
500
500
static const struct ocotp_params imx6sll_params = {
501
-
.nregs = 128,
501
+
.nregs = 80,
502
502
.bank_address_words = 0,
503
503
.set_timing = imx_ocotp_set_imx6_timing,
504
504
.ctrl = IMX_OCOTP_BM_CTRL_DEFAULT,
···
512
512
};
513
513
514
514
static const struct ocotp_params imx6ul_params = {
515
-
.nregs = 128,
515
+
.nregs = 144,
516
516
.bank_address_words = 0,
517
517
.set_timing = imx_ocotp_set_imx6_timing,
518
518
.ctrl = IMX_OCOTP_BM_CTRL_DEFAULT,
519
519
};
520
520
521
521
static const struct ocotp_params imx6ull_params = {
522
-
.nregs = 64,
522
+
.nregs = 80,
523
523
.bank_address_words = 0,
524
524
.set_timing = imx_ocotp_set_imx6_timing,
525
525
.ctrl = IMX_OCOTP_BM_CTRL_DEFAULT,