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drm/xe/vf: Fix guc_info debugfs for VFs

The guc_info debugfs attempts to read a bunch of registers that the VFs
doesn't have access to, so fix it by skipping the reads.

Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/4775
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Lukasz Laguna <lukasz.laguna@intel.com>
Link: https://lore.kernel.org/r/20250423173908.1571412-1-daniele.ceraolospurio@intel.com

+21 -19
+21 -19
drivers/gpu/drm/xe/xe_guc.c
··· 1510 1510 1511 1511 xe_uc_fw_print(&guc->fw, p); 1512 1512 1513 - fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT); 1514 - if (!fw_ref) 1515 - return; 1513 + if (!IS_SRIOV_VF(gt_to_xe(gt))) { 1514 + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT); 1515 + if (!fw_ref) 1516 + return; 1516 1517 1517 - status = xe_mmio_read32(&gt->mmio, GUC_STATUS); 1518 + status = xe_mmio_read32(&gt->mmio, GUC_STATUS); 1518 1519 1519 - drm_printf(p, "\nGuC status 0x%08x:\n", status); 1520 - drm_printf(p, "\tBootrom status = 0x%x\n", 1521 - REG_FIELD_GET(GS_BOOTROM_MASK, status)); 1522 - drm_printf(p, "\tuKernel status = 0x%x\n", 1523 - REG_FIELD_GET(GS_UKERNEL_MASK, status)); 1524 - drm_printf(p, "\tMIA Core status = 0x%x\n", 1525 - REG_FIELD_GET(GS_MIA_MASK, status)); 1526 - drm_printf(p, "\tLog level = %d\n", 1527 - xe_guc_log_get_level(&guc->log)); 1520 + drm_printf(p, "\nGuC status 0x%08x:\n", status); 1521 + drm_printf(p, "\tBootrom status = 0x%x\n", 1522 + REG_FIELD_GET(GS_BOOTROM_MASK, status)); 1523 + drm_printf(p, "\tuKernel status = 0x%x\n", 1524 + REG_FIELD_GET(GS_UKERNEL_MASK, status)); 1525 + drm_printf(p, "\tMIA Core status = 0x%x\n", 1526 + REG_FIELD_GET(GS_MIA_MASK, status)); 1527 + drm_printf(p, "\tLog level = %d\n", 1528 + xe_guc_log_get_level(&guc->log)); 1528 1529 1529 - drm_puts(p, "\nScratch registers:\n"); 1530 - for (i = 0; i < SOFT_SCRATCH_COUNT; i++) { 1531 - drm_printf(p, "\t%2d: \t0x%x\n", 1532 - i, xe_mmio_read32(&gt->mmio, SOFT_SCRATCH(i))); 1530 + drm_puts(p, "\nScratch registers:\n"); 1531 + for (i = 0; i < SOFT_SCRATCH_COUNT; i++) { 1532 + drm_printf(p, "\t%2d: \t0x%x\n", 1533 + i, xe_mmio_read32(&gt->mmio, SOFT_SCRATCH(i))); 1534 + } 1535 + 1536 + xe_force_wake_put(gt_to_fw(gt), fw_ref); 1533 1537 } 1534 - 1535 - xe_force_wake_put(gt_to_fw(gt), fw_ref); 1536 1538 1537 1539 drm_puts(p, "\n"); 1538 1540 xe_guc_ct_print(&guc->ct, p, false);