platform/x86/intel/vsec: Move structures to header

In preparation for exporting an API to register Intel Vendor Specific
Extended Capabilities (VSEC) from other drivers, move needed structures to
the header file.

Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20231129222132.2331261-4-david.e.box@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

authored by

David E. Box and committed by

Hans de Goede 2 years ago dbc01b0c ace7b6f0

+36 -35

2 changed files

expand all

drivers

platform

x86

intel

vsec.c

vsec.h

-35

drivers/platform/x86/intel/vsec.c

··· 24 24 25 25 #include "vsec.h" 26 26 27 - /* Intel DVSEC offsets */ 28 - #define INTEL_DVSEC_ENTRIES 0xA 29 - #define INTEL_DVSEC_SIZE 0xB 30 - #define INTEL_DVSEC_TABLE 0xC 31 - #define INTEL_DVSEC_TABLE_BAR(x) ((x) & GENMASK(2, 0)) 32 - #define INTEL_DVSEC_TABLE_OFFSET(x) ((x) & GENMASK(31, 3)) 33 - #define TABLE_OFFSET_SHIFT 3 34 27 #define PMT_XA_START 0 35 28 #define PMT_XA_MAX INT_MAX 36 29 #define PMT_XA_LIMIT XA_LIMIT(PMT_XA_START, PMT_XA_MAX) ··· 31 38 static DEFINE_IDA(intel_vsec_ida); 32 39 static DEFINE_IDA(intel_vsec_sdsi_ida); 33 40 static DEFINE_XARRAY_ALLOC(auxdev_array); 34 - 35 - /** 36 - * struct intel_vsec_header - Common fields of Intel VSEC and DVSEC registers. 37 - * @rev: Revision ID of the VSEC/DVSEC register space 38 - * @length: Length of the VSEC/DVSEC register space 39 - * @id: ID of the feature 40 - * @num_entries: Number of instances of the feature 41 - * @entry_size: Size of the discovery table for each feature 42 - * @tbir: BAR containing the discovery tables 43 - * @offset: BAR offset of start of the first discovery table 44 - */ 45 - struct intel_vsec_header { 46 - u8 rev; 47 - u16 length; 48 - u16 id; 49 - u8 num_entries; 50 - u8 entry_size; 51 - u8 tbir; 52 - u32 offset; 53 - }; 54 - 55 - enum intel_vsec_id { 56 - VSEC_ID_TELEMETRY = 2, 57 - VSEC_ID_WATCHER = 3, 58 - VSEC_ID_CRASHLOG = 4, 59 - VSEC_ID_SDSI = 65, 60 - VSEC_ID_TPMI = 66, 61 - }; 62 41 63 42 static const char *intel_vsec_name(enum intel_vsec_id id) 64 43 {

+36

drivers/platform/x86/intel/vsec.h

··· 11 11 #define VSEC_CAP_SDSI BIT(3) 12 12 #define VSEC_CAP_TPMI BIT(4) 13 13 14 + /* Intel DVSEC offsets */ 15 + #define INTEL_DVSEC_ENTRIES 0xA 16 + #define INTEL_DVSEC_SIZE 0xB 17 + #define INTEL_DVSEC_TABLE 0xC 18 + #define INTEL_DVSEC_TABLE_BAR(x) ((x) & GENMASK(2, 0)) 19 + #define INTEL_DVSEC_TABLE_OFFSET(x) ((x) & GENMASK(31, 3)) 20 + #define TABLE_OFFSET_SHIFT 3 21 + 14 22 struct pci_dev; 15 23 struct resource; 24 + 25 + enum intel_vsec_id { 26 + VSEC_ID_TELEMETRY = 2, 27 + VSEC_ID_WATCHER = 3, 28 + VSEC_ID_CRASHLOG = 4, 29 + VSEC_ID_SDSI = 65, 30 + VSEC_ID_TPMI = 66, 31 + }; 32 + 33 + /** 34 + * struct intel_vsec_header - Common fields of Intel VSEC and DVSEC registers. 35 + * @rev: Revision ID of the VSEC/DVSEC register space 36 + * @length: Length of the VSEC/DVSEC register space 37 + * @id: ID of the feature 38 + * @num_entries: Number of instances of the feature 39 + * @entry_size: Size of the discovery table for each feature 40 + * @tbir: BAR containing the discovery tables 41 + * @offset: BAR offset of start of the first discovery table 42 + */ 43 + struct intel_vsec_header { 44 + u8 rev; 45 + u16 length; 46 + u16 id; 47 + u8 num_entries; 48 + u8 entry_size; 49 + u8 tbir; 50 + u32 offset; 51 + }; 16 52 17 53 enum intel_vsec_quirks { 18 54 /* Watcher feature not supported */

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