Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

serial: sc16is7xx: convert from _raw_ to _noinc_ regmap functions for FIFO

The SC16IS7XX IC supports a burst mode to access the FIFOs where the
initial register address is sent ($00), followed by all the FIFO data
without having to resend the register address each time. In this mode, the
IC doesn't increment the register address for each R/W byte.

The regmap_raw_read() and regmap_raw_write() are functions which can
perform IO over multiple registers. They are currently used to read/write
from/to the FIFO, and although they operate correctly in this burst mode on
the SPI bus, they would corrupt the regmap cache if it was not disabled
manually. The reason is that when the R/W size is more than 1 byte, these
functions assume that the register address is incremented and handle the
cache accordingly.

Convert FIFO R/W functions to use the regmap _noinc_ versions in order to
remove the manual cache control which was a workaround when using the
_raw_ versions. FIFO registers are properly declared as volatile so
cache will not be used/updated for FIFO accesses.

Fixes: dfeae619d781 ("serial: sc16is7xx")
Cc: <stable@vger.kernel.org>
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Link: https://lore.kernel.org/r/20231211171353.2901416-6-hugo@hugovil.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Hugo Villeneuve and committed by
Greg Kroah-Hartman
dbf4ab82 4409df58

+11 -6
+11 -6
drivers/tty/serial/sc16is7xx.c
··· 381 381 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); 382 382 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); 383 383 384 - regcache_cache_bypass(one->regmap, true); 385 - regmap_raw_read(one->regmap, SC16IS7XX_RHR_REG, s->buf, rxlen); 386 - regcache_cache_bypass(one->regmap, false); 384 + regmap_noinc_read(one->regmap, SC16IS7XX_RHR_REG, s->buf, rxlen); 387 385 } 388 386 389 387 static void sc16is7xx_fifo_write(struct uart_port *port, u8 to_send) ··· 396 398 if (unlikely(!to_send)) 397 399 return; 398 400 399 - regcache_cache_bypass(one->regmap, true); 400 - regmap_raw_write(one->regmap, SC16IS7XX_THR_REG, s->buf, to_send); 401 - regcache_cache_bypass(one->regmap, false); 401 + regmap_noinc_write(one->regmap, SC16IS7XX_THR_REG, s->buf, to_send); 402 402 } 403 403 404 404 static void sc16is7xx_port_update(struct uart_port *port, u8 reg, ··· 486 490 } 487 491 488 492 return false; 493 + } 494 + 495 + static bool sc16is7xx_regmap_noinc(struct device *dev, unsigned int reg) 496 + { 497 + return reg == SC16IS7XX_RHR_REG; 489 498 } 490 499 491 500 static int sc16is7xx_set_baud(struct uart_port *port, int baud) ··· 1710 1709 .cache_type = REGCACHE_RBTREE, 1711 1710 .volatile_reg = sc16is7xx_regmap_volatile, 1712 1711 .precious_reg = sc16is7xx_regmap_precious, 1712 + .writeable_noinc_reg = sc16is7xx_regmap_noinc, 1713 + .readable_noinc_reg = sc16is7xx_regmap_noinc, 1714 + .max_raw_read = SC16IS7XX_FIFO_SIZE, 1715 + .max_raw_write = SC16IS7XX_FIFO_SIZE, 1713 1716 .max_register = SC16IS7XX_EFCR_REG, 1714 1717 }; 1715 1718