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Merge tag 'x86_urgent_for_v6.18_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 fixes from Borislav Petkov:

- Remove dead code leftovers after a recent mitigations cleanup which
fail a Clang build

- Make sure a Retbleed mitigation message is printed only when
necessary

- Correct the last Zen1 microcode revision for which Entrysign sha256
check is needed

- Fix a NULL ptr deref when mounting the resctrl fs on a system which
supports assignable counters but where L3 total and local bandwidth
monitoring has been disabled at boot

* tag 'x86_urgent_for_v6.18_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/bugs: Remove dead code which might prevent from building
x86/bugs: Qualify RETBLEED_INTEL_MSG
x86/microcode: Fix Entrysign revision check for Zen1/Naples
x86,fs/resctrl: Fix NULL pointer dereference with events force-disabled in mbm_event mode

+21 -19
+3 -8
arch/x86/kernel/cpu/bugs.c
··· 1463 1463 break; 1464 1464 default: 1465 1465 if (retbleed_mitigation != RETBLEED_MITIGATION_STUFF) { 1466 - pr_err(RETBLEED_INTEL_MSG); 1466 + if (retbleed_mitigation != RETBLEED_MITIGATION_NONE) 1467 + pr_err(RETBLEED_INTEL_MSG); 1468 + 1467 1469 retbleed_mitigation = RETBLEED_MITIGATION_NONE; 1468 1470 } 1469 1471 } ··· 1826 1824 } 1827 1825 } 1828 1826 #endif 1829 - 1830 - static inline bool match_option(const char *arg, int arglen, const char *opt) 1831 - { 1832 - int len = strlen(opt); 1833 - 1834 - return len == arglen && !strncmp(arg, opt, len); 1835 - } 1836 1827 1837 1828 /* The kernel command line selection for spectre v2 */ 1838 1829 enum spectre_v2_mitigation_cmd {
+1 -1
arch/x86/kernel/cpu/microcode/amd.c
··· 194 194 } 195 195 196 196 switch (cur_rev >> 8) { 197 - case 0x80012: return cur_rev <= 0x800126f; break; 197 + case 0x80012: return cur_rev <= 0x8001277; break; 198 198 case 0x80082: return cur_rev <= 0x800820f; break; 199 199 case 0x83010: return cur_rev <= 0x830107c; break; 200 200 case 0x86001: return cur_rev <= 0x860010e; break;
+10 -1
arch/x86/kernel/cpu/resctrl/monitor.c
··· 458 458 r->mon.mbm_cfg_mask = ecx & MAX_EVT_CONFIG_BITS; 459 459 } 460 460 461 - if (rdt_cpu_has(X86_FEATURE_ABMC)) { 461 + /* 462 + * resctrl assumes a system that supports assignable counters can 463 + * switch to "default" mode. Ensure that there is a "default" mode 464 + * to switch to. This enforces a dependency between the independent 465 + * X86_FEATURE_ABMC and X86_FEATURE_CQM_MBM_TOTAL/X86_FEATURE_CQM_MBM_LOCAL 466 + * hardware features. 467 + */ 468 + if (rdt_cpu_has(X86_FEATURE_ABMC) && 469 + (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL) || 470 + rdt_cpu_has(X86_FEATURE_CQM_MBM_LOCAL))) { 462 471 r->mon.mbm_cntr_assignable = true; 463 472 cpuid_count(0x80000020, 5, &eax, &ebx, &ecx, &edx); 464 473 r->mon.num_mbm_cntrs = (ebx & GENMASK(15, 0)) + 1;
+7 -9
fs/resctrl/monitor.c
··· 1782 1782 mba_mbps_default_event = QOS_L3_MBM_TOTAL_EVENT_ID; 1783 1783 1784 1784 if (r->mon.mbm_cntr_assignable) { 1785 - if (!resctrl_is_mon_event_enabled(QOS_L3_MBM_TOTAL_EVENT_ID)) 1786 - resctrl_enable_mon_event(QOS_L3_MBM_TOTAL_EVENT_ID); 1787 - if (!resctrl_is_mon_event_enabled(QOS_L3_MBM_LOCAL_EVENT_ID)) 1788 - resctrl_enable_mon_event(QOS_L3_MBM_LOCAL_EVENT_ID); 1789 - mon_event_all[QOS_L3_MBM_TOTAL_EVENT_ID].evt_cfg = r->mon.mbm_cfg_mask; 1790 - mon_event_all[QOS_L3_MBM_LOCAL_EVENT_ID].evt_cfg = r->mon.mbm_cfg_mask & 1791 - (READS_TO_LOCAL_MEM | 1792 - READS_TO_LOCAL_S_MEM | 1793 - NON_TEMP_WRITE_TO_LOCAL_MEM); 1785 + if (resctrl_is_mon_event_enabled(QOS_L3_MBM_TOTAL_EVENT_ID)) 1786 + mon_event_all[QOS_L3_MBM_TOTAL_EVENT_ID].evt_cfg = r->mon.mbm_cfg_mask; 1787 + if (resctrl_is_mon_event_enabled(QOS_L3_MBM_LOCAL_EVENT_ID)) 1788 + mon_event_all[QOS_L3_MBM_LOCAL_EVENT_ID].evt_cfg = r->mon.mbm_cfg_mask & 1789 + (READS_TO_LOCAL_MEM | 1790 + READS_TO_LOCAL_S_MEM | 1791 + NON_TEMP_WRITE_TO_LOCAL_MEM); 1794 1792 r->mon.mbm_assign_on_mkdir = true; 1795 1793 resctrl_file_fflags_init("num_mbm_cntrs", 1796 1794 RFTYPE_MON_INFO | RFTYPE_RES_CACHE);