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Merge tag 'platform-drivers-x86-v6.13-3' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86

Pull x86 platform driver fixes from Ilpo Järvinen:

- alienware-wmi:
- Add support for Alienware m16 R1 AMD
- Do not setup legacy LED control with X and G Series

- intel/ifs: Clearwater Forest support

- intel/vsec: Panther Lake support

- p2sb: Do not hide the device if BIOS left it unhidden

- touchscreen_dmi: Add SARY Tab 3 tablet information

* tag 'platform-drivers-x86-v6.13-3' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86:
platform/x86/intel/vsec: Add support for Panther Lake
platform/x86/intel/ifs: Add Clearwater Forest to CPU support list
platform/x86: touchscreen_dmi: Add info for SARY Tab 3 tablet
p2sb: Do not scan and remove the P2SB device when it is unhidden
p2sb: Move P2SB hide and unhide code to p2sb_scan_and_cache()
p2sb: Introduce the global flag p2sb_hidden_by_bios
p2sb: Factor out p2sb_read_from_cache()
alienware-wmi: Adds support to Alienware m16 R1 AMD
alienware-wmi: Fix X Series and G Series quirks

+104 -28
+19 -5
drivers/platform/x86/dell/alienware-wmi.c
··· 190 190 }; 191 191 192 192 static struct quirk_entry quirk_g_series = { 193 - .num_zones = 2, 193 + .num_zones = 0, 194 194 .hdmi_mux = 0, 195 195 .amplifier = 0, 196 196 .deepslp = 0, ··· 199 199 }; 200 200 201 201 static struct quirk_entry quirk_x_series = { 202 - .num_zones = 2, 202 + .num_zones = 0, 203 203 .hdmi_mux = 0, 204 204 .amplifier = 0, 205 205 .deepslp = 0, ··· 240 240 DMI_MATCH(DMI_PRODUCT_NAME, "ASM201"), 241 241 }, 242 242 .driver_data = &quirk_asm201, 243 + }, 244 + { 245 + .callback = dmi_matched, 246 + .ident = "Alienware m16 R1 AMD", 247 + .matches = { 248 + DMI_MATCH(DMI_SYS_VENDOR, "Alienware"), 249 + DMI_MATCH(DMI_PRODUCT_NAME, "Alienware m16 R1 AMD"), 250 + }, 251 + .driver_data = &quirk_x_series, 243 252 }, 244 253 { 245 254 .callback = dmi_matched, ··· 695 686 static void alienware_zone_exit(struct platform_device *dev) 696 687 { 697 688 u8 zone; 689 + 690 + if (!quirks->num_zones) 691 + return; 698 692 699 693 sysfs_remove_group(&dev->dev.kobj, &zone_attribute_group); 700 694 led_classdev_unregister(&global_led); ··· 1241 1229 goto fail_prep_thermal_profile; 1242 1230 } 1243 1231 1244 - ret = alienware_zone_init(platform_device); 1245 - if (ret) 1246 - goto fail_prep_zones; 1232 + if (quirks->num_zones > 0) { 1233 + ret = alienware_zone_init(platform_device); 1234 + if (ret) 1235 + goto fail_prep_zones; 1236 + } 1247 1237 1248 1238 return 0; 1249 1239
+1
drivers/platform/x86/intel/ifs/core.c
··· 20 20 X86_MATCH(INTEL_GRANITERAPIDS_X, ARRAY_GEN0), 21 21 X86_MATCH(INTEL_GRANITERAPIDS_D, ARRAY_GEN0), 22 22 X86_MATCH(INTEL_ATOM_CRESTMONT_X, ARRAY_GEN1), 23 + X86_MATCH(INTEL_ATOM_DARKMONT_X, ARRAY_GEN1), 23 24 {} 24 25 }; 25 26 MODULE_DEVICE_TABLE(x86cpu, ifs_cpu_ids);
+2
drivers/platform/x86/intel/vsec.c
··· 423 423 #define PCI_DEVICE_ID_INTEL_VSEC_RPL 0xa77d 424 424 #define PCI_DEVICE_ID_INTEL_VSEC_TGL 0x9a0d 425 425 #define PCI_DEVICE_ID_INTEL_VSEC_LNL_M 0x647d 426 + #define PCI_DEVICE_ID_INTEL_VSEC_PTL 0xb07d 426 427 static const struct pci_device_id intel_vsec_pci_ids[] = { 427 428 { PCI_DEVICE_DATA(INTEL, VSEC_ADL, &tgl_info) }, 428 429 { PCI_DEVICE_DATA(INTEL, VSEC_DG1, &dg1_info) }, ··· 433 432 { PCI_DEVICE_DATA(INTEL, VSEC_RPL, &tgl_info) }, 434 433 { PCI_DEVICE_DATA(INTEL, VSEC_TGL, &tgl_info) }, 435 434 { PCI_DEVICE_DATA(INTEL, VSEC_LNL_M, &lnl_info) }, 435 + { PCI_DEVICE_DATA(INTEL, VSEC_PTL, &mtl_info) }, 436 436 { } 437 437 }; 438 438 MODULE_DEVICE_TABLE(pci, intel_vsec_pci_ids);
+56 -23
drivers/platform/x86/p2sb.c
··· 43 43 }; 44 44 45 45 static struct p2sb_res_cache p2sb_resources[NR_P2SB_RES_CACHE]; 46 + static bool p2sb_hidden_by_bios; 46 47 47 48 static void p2sb_get_devfn(unsigned int *devfn) 48 49 { ··· 98 97 99 98 static int p2sb_scan_and_cache(struct pci_bus *bus, unsigned int devfn) 100 99 { 100 + /* 101 + * The BIOS prevents the P2SB device from being enumerated by the PCI 102 + * subsystem, so we need to unhide and hide it back to lookup the BAR. 103 + */ 104 + pci_bus_write_config_dword(bus, devfn, P2SBC, 0); 105 + 101 106 /* Scan the P2SB device and cache its BAR0 */ 102 107 p2sb_scan_and_cache_devfn(bus, devfn); 103 108 104 109 /* On Goldmont p2sb_bar() also gets called for the SPI controller */ 105 110 if (devfn == P2SB_DEVFN_GOLDMONT) 106 111 p2sb_scan_and_cache_devfn(bus, SPI_DEVFN_GOLDMONT); 112 + 113 + pci_bus_write_config_dword(bus, devfn, P2SBC, P2SBC_HIDE); 107 114 108 115 if (!p2sb_valid_resource(&p2sb_resources[PCI_FUNC(devfn)].res)) 109 116 return -ENOENT; ··· 138 129 u32 value = P2SBC_HIDE; 139 130 struct pci_bus *bus; 140 131 u16 class; 141 - int ret; 132 + int ret = 0; 142 133 143 134 /* Get devfn for P2SB device itself */ 144 135 p2sb_get_devfn(&devfn_p2sb); ··· 161 152 */ 162 153 pci_lock_rescan_remove(); 163 154 164 - /* 165 - * The BIOS prevents the P2SB device from being enumerated by the PCI 166 - * subsystem, so we need to unhide and hide it back to lookup the BAR. 167 - * Unhide the P2SB device here, if needed. 168 - */ 169 155 pci_bus_read_config_dword(bus, devfn_p2sb, P2SBC, &value); 170 - if (value & P2SBC_HIDE) 171 - pci_bus_write_config_dword(bus, devfn_p2sb, P2SBC, 0); 156 + p2sb_hidden_by_bios = value & P2SBC_HIDE; 172 157 173 - ret = p2sb_scan_and_cache(bus, devfn_p2sb); 174 - 175 - /* Hide the P2SB device, if it was hidden */ 176 - if (value & P2SBC_HIDE) 177 - pci_bus_write_config_dword(bus, devfn_p2sb, P2SBC, P2SBC_HIDE); 158 + /* 159 + * If the BIOS does not hide the P2SB device then its resources 160 + * are accesilble. Cache them only if the P2SB device is hidden. 161 + */ 162 + if (p2sb_hidden_by_bios) 163 + ret = p2sb_scan_and_cache(bus, devfn_p2sb); 178 164 179 165 pci_unlock_rescan_remove(); 166 + 167 + return ret; 168 + } 169 + 170 + static int p2sb_read_from_cache(struct pci_bus *bus, unsigned int devfn, 171 + struct resource *mem) 172 + { 173 + struct p2sb_res_cache *cache = &p2sb_resources[PCI_FUNC(devfn)]; 174 + 175 + if (cache->bus_dev_id != bus->dev.id) 176 + return -ENODEV; 177 + 178 + if (!p2sb_valid_resource(&cache->res)) 179 + return -ENOENT; 180 + 181 + memcpy(mem, &cache->res, sizeof(*mem)); 182 + 183 + return 0; 184 + } 185 + 186 + static int p2sb_read_from_dev(struct pci_bus *bus, unsigned int devfn, 187 + struct resource *mem) 188 + { 189 + struct pci_dev *pdev; 190 + int ret = 0; 191 + 192 + pdev = pci_get_slot(bus, devfn); 193 + if (!pdev) 194 + return -ENODEV; 195 + 196 + if (p2sb_valid_resource(pci_resource_n(pdev, 0))) 197 + p2sb_read_bar0(pdev, mem); 198 + else 199 + ret = -ENOENT; 200 + 201 + pci_dev_put(pdev); 180 202 181 203 return ret; 182 204 } ··· 228 188 */ 229 189 int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem) 230 190 { 231 - struct p2sb_res_cache *cache; 232 - 233 191 bus = p2sb_get_bus(bus); 234 192 if (!bus) 235 193 return -ENODEV; ··· 235 197 if (!devfn) 236 198 p2sb_get_devfn(&devfn); 237 199 238 - cache = &p2sb_resources[PCI_FUNC(devfn)]; 239 - if (cache->bus_dev_id != bus->dev.id) 240 - return -ENODEV; 200 + if (p2sb_hidden_by_bios) 201 + return p2sb_read_from_cache(bus, devfn, mem); 241 202 242 - if (!p2sb_valid_resource(&cache->res)) 243 - return -ENOENT; 244 - 245 - memcpy(mem, &cache->res, sizeof(*mem)); 246 - return 0; 203 + return p2sb_read_from_dev(bus, devfn, mem); 247 204 } 248 205 EXPORT_SYMBOL_GPL(p2sb_bar); 249 206
+26
drivers/platform/x86/touchscreen_dmi.c
··· 855 855 .properties = rwc_nanote_next_props, 856 856 }; 857 857 858 + static const struct property_entry sary_tab_3_props[] = { 859 + PROPERTY_ENTRY_U32("touchscreen-size-x", 1730), 860 + PROPERTY_ENTRY_U32("touchscreen-size-y", 1151), 861 + PROPERTY_ENTRY_BOOL("touchscreen-inverted-x"), 862 + PROPERTY_ENTRY_BOOL("touchscreen-inverted-y"), 863 + PROPERTY_ENTRY_BOOL("touchscreen-swapped-x-y"), 864 + PROPERTY_ENTRY_STRING("firmware-name", "gsl1680-sary-tab-3.fw"), 865 + PROPERTY_ENTRY_U32("silead,max-fingers", 10), 866 + PROPERTY_ENTRY_BOOL("silead,home-button"), 867 + { } 868 + }; 869 + 870 + static const struct ts_dmi_data sary_tab_3_data = { 871 + .acpi_name = "MSSL1680:00", 872 + .properties = sary_tab_3_props, 873 + }; 874 + 858 875 static const struct property_entry schneider_sct101ctm_props[] = { 859 876 PROPERTY_ENTRY_U32("touchscreen-size-x", 1715), 860 877 PROPERTY_ENTRY_U32("touchscreen-size-y", 1140), ··· 1630 1613 DMI_MATCH(DMI_BOARD_VENDOR, "To be filled by O.E.M."), 1631 1614 /* Above matches are too generic, add bios-version match */ 1632 1615 DMI_MATCH(DMI_BIOS_VERSION, "S8A70R100-V005"), 1616 + }, 1617 + }, 1618 + { 1619 + /* SARY Tab 3 */ 1620 + .driver_data = (void *)&sary_tab_3_data, 1621 + .matches = { 1622 + DMI_MATCH(DMI_SYS_VENDOR, "SARY"), 1623 + DMI_MATCH(DMI_PRODUCT_NAME, "C210C"), 1624 + DMI_MATCH(DMI_PRODUCT_SKU, "TAB3"), 1633 1625 }, 1634 1626 }, 1635 1627 {