Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie:
"A bunch of i915 fixes, one revert a VBT fix that was a bit premature,
and some braswell feature removal that the hw actually didn't support.
One radeon race fix at boot, and one hlcdc build fix, one fix from
Russell that fixes build as well with new audio features.
This is hopefully all I have until -next"
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/radeon: fix hotplug race at startup
drm/edid: add function to help find SADs
drm/i915: Avoid TP3 on CHV
drm/i915: remove HBR2 from chv supported list
Revert "drm/i915: Add eDP intermediate frequencies for CHV"
Revert "drm/i915: Allow parsing of variable size child device entries from VBT"
drm/atmel-hlcdc: Compile suspend/resume for PM_SLEEP only
drm/i915: Flag the execlists context object as dirty after every use
+53
-37
+1
-1
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
+1
-1
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
+4
-23
drivers/gpu/drm/i915/intel_bios.c
+4
-23
drivers/gpu/drm/i915/intel_bios.c
···
1075
1075
const union child_device_config *p_child;
1076
1076
union child_device_config *child_dev_ptr;
1077
1077
int i, child_device_num, count;
1078
-
u8 expected_size;
1079
-
u16 block_size;
1078
+
u16 block_size;
1080
1079
1081
1080
p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1082
1081
if (!p_defs) {
1083
1082
DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
1084
1083
return;
1085
1084
}
1086
-
if (bdb->version < 195) {
1087
-
expected_size = 33;
1088
-
} else if (bdb->version == 195) {
1089
-
expected_size = 37;
1090
-
} else if (bdb->version <= 197) {
1091
-
expected_size = 38;
1092
-
} else {
1093
-
expected_size = 38;
1094
-
DRM_DEBUG_DRIVER("Expected child_device_config size for BDB version %u not known; assuming %u\n",
1095
-
expected_size, bdb->version);
1096
-
}
1097
-
1098
-
if (expected_size > sizeof(*p_child)) {
1099
-
DRM_ERROR("child_device_config cannot fit in p_child\n");
1100
-
return;
1101
-
}
1102
-
1103
-
if (p_defs->child_dev_size != expected_size) {
1104
-
DRM_ERROR("Size mismatch; child_device_config size=%u (expected %u); bdb->version: %u\n",
1105
-
p_defs->child_dev_size, expected_size, bdb->version);
1085
+
if (p_defs->child_dev_size < sizeof(*p_child)) {
1086
+
DRM_ERROR("General definiton block child device size is too small.\n");
1106
1087
return;
1107
1088
}
1108
1089
/* get the block size of general definitions */
···
1130
1149
1131
1150
child_dev_ptr = dev_priv->vbt.child_dev + count;
1132
1151
count++;
1133
-
memcpy(child_dev_ptr, p_child, p_defs->child_dev_size);
1152
+
memcpy(child_dev_ptr, p_child, sizeof(*p_child));
1134
1153
}
1135
1154
return;
1136
1155
}
+22
-13
drivers/gpu/drm/i915/intel_dp.c
+22
-13
drivers/gpu/drm/i915/intel_dp.c
···
93
93
94
94
static const int skl_rates[] = { 162000, 216000, 270000,
95
95
324000, 432000, 540000 };
96
-
static const int chv_rates[] = { 162000, 202500, 210000, 216000,
97
-
243000, 270000, 324000, 405000,
98
-
420000, 432000, 540000 };
99
96
static const int default_rates[] = { 162000, 270000, 540000 };
100
97
101
98
/**
···
1166
1169
return (intel_dp_max_link_bw(intel_dp) >> 3) + 1;
1167
1170
}
1168
1171
1172
+
static bool intel_dp_source_supports_hbr2(struct drm_device *dev)
1173
+
{
1174
+
/* WaDisableHBR2:skl */
1175
+
if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0)
1176
+
return false;
1177
+
1178
+
if ((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || IS_BROADWELL(dev) ||
1179
+
(INTEL_INFO(dev)->gen >= 9))
1180
+
return true;
1181
+
else
1182
+
return false;
1183
+
}
1184
+
1169
1185
static int
1170
1186
intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
1171
1187
{
1172
1188
if (IS_SKYLAKE(dev)) {
1173
1189
*source_rates = skl_rates;
1174
1190
return ARRAY_SIZE(skl_rates);
1175
-
} else if (IS_CHERRYVIEW(dev)) {
1176
-
*source_rates = chv_rates;
1177
-
return ARRAY_SIZE(chv_rates);
1178
1191
}
1179
1192
1180
1193
*source_rates = default_rates;
1181
1194
1182
-
if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0)
1183
-
/* WaDisableHBR2:skl */
1184
-
return (DP_LINK_BW_2_7 >> 3) + 1;
1185
-
else if (INTEL_INFO(dev)->gen >= 8 ||
1186
-
(IS_HASWELL(dev) && !IS_HSW_ULX(dev)))
1195
+
/* This depends on the fact that 5.4 is last value in the array */
1196
+
if (intel_dp_source_supports_hbr2(dev))
1187
1197
return (DP_LINK_BW_5_4 >> 3) + 1;
1188
1198
else
1189
1199
return (DP_LINK_BW_2_7 >> 3) + 1;
···
3945
3941
}
3946
3942
}
3947
3943
3948
-
/* Training Pattern 3 support, both source and sink */
3944
+
/* Training Pattern 3 support, Intel platforms that support HBR2 alone
3945
+
* have support for TP3 hence that check is used along with dpcd check
3946
+
* to ensure TP3 can be enabled.
3947
+
* SKL < B0: due it's WaDisableHBR2 is the only exception where TP3 is
3948
+
* supported but still not enabled.
3949
+
*/
3949
3950
if (intel_dp->dpcd[DP_DPCD_REV] >= 0x12 &&
3950
3951
intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED &&
3951
-
(IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)) {
3952
+
intel_dp_source_supports_hbr2(dev)) {
3952
3953
intel_dp->use_tps3 = true;
3953
3954
DRM_DEBUG_KMS("Displayport TPS3 supported\n");
3954
3955
} else
+2
drivers/gpu/drm/i915/intel_lrc.c
+2
drivers/gpu/drm/i915/intel_lrc.c
+5
drivers/gpu/drm/radeon/radeon_irq_kms.c
+5
drivers/gpu/drm/radeon/radeon_irq_kms.c
···
79
79
struct drm_mode_config *mode_config = &dev->mode_config;
80
80
struct drm_connector *connector;
81
81
82
+
/* we can race here at startup, some boards seem to trigger
83
+
* hotplug irqs when they shouldn't. */
84
+
if (!rdev->mode_info.mode_config_initialized)
85
+
return;
86
+
82
87
mutex_lock(&mode_config->mutex);
83
88
if (mode_config->num_connector) {
84
89
list_for_each_entry(connector, &mode_config->connector_list, head)
+19
include/drm/drm_edid.h
+19
include/drm/drm_edid.h
···
348
348
}
349
349
350
350
/**
351
+
* drm_eld_sad - Get ELD SAD structures.
352
+
* @eld: pointer to an eld memory structure with sad_count set
353
+
*/
354
+
static inline const uint8_t *drm_eld_sad(const uint8_t *eld)
355
+
{
356
+
unsigned int ver, mnl;
357
+
358
+
ver = (eld[DRM_ELD_VER] & DRM_ELD_VER_MASK) >> DRM_ELD_VER_SHIFT;
359
+
if (ver != 2 && ver != 31)
360
+
return NULL;
361
+
362
+
mnl = drm_eld_mnl(eld);
363
+
if (mnl > 16)
364
+
return NULL;
365
+
366
+
return eld + DRM_ELD_CEA_SAD(mnl, 0);
367
+
}
368
+
369
+
/**
351
370
* drm_eld_sad_count - Get ELD SAD count.
352
371
* @eld: pointer to an eld memory structure with sad_count set
353
372
*/