Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'ntb-6.18' of https://github.com/jonmason/ntb
Pull NTB updates from Jon Mason:
- Add support for Renesas R-Car and allow arbitrary BAR mapping in EPF
- Update ntb_hw_amd to support the latest generation secondary topology
and add a new maintainer
- Fix a bug by adding a mutex to ensure `link_event_callback` executes
sequentially
* tag 'ntb-6.18' of https://github.com/jonmason/ntb:
NTB: epf: Add Renesas rcar support
NTB: epf: Allow arbitrary BAR mapping
ntb: Add mutex to make link_event_callback executed linearly.
MAINTAINERS: Update for the NTB AMD driver maintainer
ntb_hw_amd: Update amd_ntb_get_link_status to support latest generation secondary topology
+94
-51
+1
MAINTAINERS
+1
MAINTAINERS
+17
-1
drivers/ntb/hw/amd/ntb_hw_amd.c
+17
-1
drivers/ntb/hw/amd/ntb_hw_amd.c
···
197
197
198
198
static int amd_ntb_get_link_status(struct amd_ntb_dev *ndev)
199
199
{
200
-
struct pci_dev *pdev = NULL;
200
+
struct pci_dev *pdev = ndev->ntb.pdev;
201
201
struct pci_dev *pci_swds = NULL;
202
202
struct pci_dev *pci_swus = NULL;
203
203
u32 stat;
204
204
int rc;
205
205
206
206
if (ndev->ntb.topo == NTB_TOPO_SEC) {
207
+
if (ndev->dev_data->is_endpoint) {
208
+
rc = pcie_capability_read_dword(pdev, PCI_EXP_LNKCTL, &stat);
209
+
if (rc)
210
+
return rc;
211
+
212
+
ndev->lnk_sta = stat;
213
+
return 0;
214
+
}
215
+
207
216
/* Locate the pointer to Downstream Switch for this device */
208
217
pci_swds = pci_upstream_bridge(ndev->ntb.pdev);
209
218
if (pci_swds) {
···
1320
1311
.mw_count = 2,
1321
1312
.mw_idx = 2,
1322
1313
},
1314
+
{ /* for device 0x17d7 */
1315
+
.mw_count = 2,
1316
+
.mw_idx = 2,
1317
+
.is_endpoint = true,
1318
+
},
1323
1319
};
1324
1320
1325
1321
static const struct pci_device_id amd_ntb_pci_tbl[] = {
···
1333
1319
{ PCI_VDEVICE(AMD, 0x14c0), (kernel_ulong_t)&dev_data[1] },
1334
1320
{ PCI_VDEVICE(AMD, 0x14c3), (kernel_ulong_t)&dev_data[1] },
1335
1321
{ PCI_VDEVICE(AMD, 0x155a), (kernel_ulong_t)&dev_data[1] },
1322
+
{ PCI_VDEVICE(AMD, 0x17d4), (kernel_ulong_t)&dev_data[1] },
1323
+
{ PCI_VDEVICE(AMD, 0x17d7), (kernel_ulong_t)&dev_data[2] },
1336
1324
{ PCI_VDEVICE(HYGON, 0x145b), (kernel_ulong_t)&dev_data[0] },
1337
1325
{ 0, }
1338
1326
};
+1
drivers/ntb/hw/amd/ntb_hw_amd.h
+1
drivers/ntb/hw/amd/ntb_hw_amd.h
+68
-50
drivers/ntb/hw/epf/ntb_hw_epf.c
+68
-50
drivers/ntb/hw/epf/ntb_hw_epf.c
···
49
49
#define NTB_EPF_COMMAND_TIMEOUT 1000 /* 1 Sec */
50
50
51
51
enum pci_barno {
52
+
NO_BAR = -1,
52
53
BAR_0,
53
54
BAR_1,
54
55
BAR_2,
···
58
57
BAR_5,
59
58
};
60
59
60
+
enum epf_ntb_bar {
61
+
BAR_CONFIG,
62
+
BAR_PEER_SPAD,
63
+
BAR_DB,
64
+
BAR_MW1,
65
+
BAR_MW2,
66
+
BAR_MW3,
67
+
BAR_MW4,
68
+
NTB_BAR_NUM,
69
+
};
70
+
71
+
#define NTB_EPF_MAX_MW_COUNT (NTB_BAR_NUM - BAR_MW1)
72
+
61
73
struct ntb_epf_dev {
62
74
struct ntb_dev ntb;
63
75
struct device *dev;
64
76
/* Mutex to protect providing commands to NTB EPF */
65
77
struct mutex cmd_lock;
66
78
67
-
enum pci_barno ctrl_reg_bar;
68
-
enum pci_barno peer_spad_reg_bar;
69
-
enum pci_barno db_reg_bar;
70
-
enum pci_barno mw_bar;
79
+
const enum pci_barno *barno_map;
71
80
72
81
unsigned int mw_count;
73
82
unsigned int spad_count;
···
95
84
};
96
85
97
86
#define ntb_ndev(__ntb) container_of(__ntb, struct ntb_epf_dev, ntb)
98
-
99
-
struct ntb_epf_data {
100
-
/* BAR that contains both control region and self spad region */
101
-
enum pci_barno ctrl_reg_bar;
102
-
/* BAR that contains peer spad region */
103
-
enum pci_barno peer_spad_reg_bar;
104
-
/* BAR that contains Doorbell region and Memory window '1' */
105
-
enum pci_barno db_reg_bar;
106
-
/* BAR that contains memory windows*/
107
-
enum pci_barno mw_bar;
108
-
};
109
87
110
88
static int ntb_epf_send_command(struct ntb_epf_dev *ndev, u32 command,
111
89
u32 argument)
···
144
144
return -EINVAL;
145
145
}
146
146
147
-
return idx + 2;
147
+
return ndev->barno_map[BAR_MW1 + idx];
148
148
}
149
149
150
150
static int ntb_epf_mw_count(struct ntb_dev *ntb, int pidx)
···
413
413
return -EINVAL;
414
414
}
415
415
416
-
bar = idx + ndev->mw_bar;
416
+
bar = ntb_epf_mw_to_bar(ndev, idx);
417
+
if (bar < 0)
418
+
return bar;
417
419
418
420
mw_size = pci_resource_len(ntb->pdev, bar);
419
421
···
457
455
if (idx == 0)
458
456
offset = readl(ndev->ctrl_reg + NTB_EPF_MW1_OFFSET);
459
457
460
-
bar = idx + ndev->mw_bar;
458
+
bar = ntb_epf_mw_to_bar(ndev, idx);
459
+
if (bar < 0)
460
+
return bar;
461
461
462
462
if (base)
463
463
*base = pci_resource_start(ndev->ntb.pdev, bar) + offset;
···
564
560
ndev->mw_count = readl(ndev->ctrl_reg + NTB_EPF_MW_COUNT);
565
561
ndev->spad_count = readl(ndev->ctrl_reg + NTB_EPF_SPAD_COUNT);
566
562
563
+
if (ndev->mw_count > NTB_EPF_MAX_MW_COUNT) {
564
+
dev_err(dev, "Unsupported MW count: %u\n", ndev->mw_count);
565
+
return -EINVAL;
566
+
}
567
+
567
568
return 0;
568
569
}
569
570
···
605
596
dev_warn(&pdev->dev, "Cannot DMA highmem\n");
606
597
}
607
598
608
-
ndev->ctrl_reg = pci_iomap(pdev, ndev->ctrl_reg_bar, 0);
599
+
ndev->ctrl_reg = pci_iomap(pdev, ndev->barno_map[BAR_CONFIG], 0);
609
600
if (!ndev->ctrl_reg) {
610
601
ret = -EIO;
611
602
goto err_pci_regions;
612
603
}
613
604
614
-
if (ndev->peer_spad_reg_bar) {
615
-
ndev->peer_spad_reg = pci_iomap(pdev, ndev->peer_spad_reg_bar, 0);
605
+
if (ndev->barno_map[BAR_PEER_SPAD] != ndev->barno_map[BAR_CONFIG]) {
606
+
ndev->peer_spad_reg = pci_iomap(pdev,
607
+
ndev->barno_map[BAR_PEER_SPAD], 0);
616
608
if (!ndev->peer_spad_reg) {
617
609
ret = -EIO;
618
610
goto err_pci_regions;
···
624
614
ndev->peer_spad_reg = ndev->ctrl_reg + spad_off + spad_sz;
625
615
}
626
616
627
-
ndev->db_reg = pci_iomap(pdev, ndev->db_reg_bar, 0);
617
+
ndev->db_reg = pci_iomap(pdev, ndev->barno_map[BAR_DB], 0);
628
618
if (!ndev->db_reg) {
629
619
ret = -EIO;
630
620
goto err_pci_regions;
···
669
659
static int ntb_epf_pci_probe(struct pci_dev *pdev,
670
660
const struct pci_device_id *id)
671
661
{
672
-
enum pci_barno peer_spad_reg_bar = BAR_1;
673
-
enum pci_barno ctrl_reg_bar = BAR_0;
674
-
enum pci_barno db_reg_bar = BAR_2;
675
-
enum pci_barno mw_bar = BAR_2;
676
662
struct device *dev = &pdev->dev;
677
-
struct ntb_epf_data *data;
678
663
struct ntb_epf_dev *ndev;
679
664
int ret;
680
665
···
680
675
if (!ndev)
681
676
return -ENOMEM;
682
677
683
-
data = (struct ntb_epf_data *)id->driver_data;
684
-
if (data) {
685
-
peer_spad_reg_bar = data->peer_spad_reg_bar;
686
-
ctrl_reg_bar = data->ctrl_reg_bar;
687
-
db_reg_bar = data->db_reg_bar;
688
-
mw_bar = data->mw_bar;
689
-
}
678
+
ndev->barno_map = (const enum pci_barno *)id->driver_data;
679
+
if (!ndev->barno_map)
680
+
return -EINVAL;
690
681
691
-
ndev->peer_spad_reg_bar = peer_spad_reg_bar;
692
-
ndev->ctrl_reg_bar = ctrl_reg_bar;
693
-
ndev->db_reg_bar = db_reg_bar;
694
-
ndev->mw_bar = mw_bar;
695
682
ndev->dev = dev;
696
683
697
684
ntb_epf_init_struct(ndev, pdev);
···
727
730
ntb_epf_deinit_pci(ndev);
728
731
}
729
732
730
-
static const struct ntb_epf_data j721e_data = {
731
-
.ctrl_reg_bar = BAR_0,
732
-
.peer_spad_reg_bar = BAR_1,
733
-
.db_reg_bar = BAR_2,
734
-
.mw_bar = BAR_2,
733
+
static const enum pci_barno j721e_map[NTB_BAR_NUM] = {
734
+
[BAR_CONFIG] = BAR_0,
735
+
[BAR_PEER_SPAD] = BAR_1,
736
+
[BAR_DB] = BAR_2,
737
+
[BAR_MW1] = BAR_2,
738
+
[BAR_MW2] = BAR_3,
739
+
[BAR_MW3] = BAR_4,
740
+
[BAR_MW4] = BAR_5
735
741
};
736
742
737
-
static const struct ntb_epf_data mx8_data = {
738
-
.ctrl_reg_bar = BAR_0,
739
-
.peer_spad_reg_bar = BAR_0,
740
-
.db_reg_bar = BAR_2,
741
-
.mw_bar = BAR_4,
743
+
static const enum pci_barno mx8_map[NTB_BAR_NUM] = {
744
+
[BAR_CONFIG] = BAR_0,
745
+
[BAR_PEER_SPAD] = BAR_0,
746
+
[BAR_DB] = BAR_2,
747
+
[BAR_MW1] = BAR_4,
748
+
[BAR_MW2] = BAR_5,
749
+
[BAR_MW3] = NO_BAR,
750
+
[BAR_MW4] = NO_BAR
751
+
};
752
+
753
+
static const enum pci_barno rcar_barno[NTB_BAR_NUM] = {
754
+
[BAR_CONFIG] = BAR_0,
755
+
[BAR_PEER_SPAD] = BAR_0,
756
+
[BAR_DB] = BAR_4,
757
+
[BAR_MW1] = BAR_2,
758
+
[BAR_MW2] = NO_BAR,
759
+
[BAR_MW3] = NO_BAR,
760
+
[BAR_MW4] = NO_BAR,
742
761
};
743
762
744
763
static const struct pci_device_id ntb_epf_pci_tbl[] = {
745
764
{
746
765
PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_J721E),
747
766
.class = PCI_CLASS_MEMORY_RAM << 8, .class_mask = 0xffff00,
748
-
.driver_data = (kernel_ulong_t)&j721e_data,
767
+
.driver_data = (kernel_ulong_t)j721e_map,
749
768
},
750
769
{
751
770
PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x0809),
752
771
.class = PCI_CLASS_MEMORY_RAM << 8, .class_mask = 0xffff00,
753
-
.driver_data = (kernel_ulong_t)&mx8_data,
772
+
.driver_data = (kernel_ulong_t)mx8_map,
773
+
},
774
+
{
775
+
PCI_DEVICE(PCI_VENDOR_ID_RENESAS, 0x0030),
776
+
.class = PCI_CLASS_MEMORY_RAM << 8, .class_mask = 0xffff00,
777
+
.driver_data = (kernel_ulong_t)rcar_barno,
754
778
},
755
779
{ },
756
780
};
+7
drivers/ntb/ntb_transport.c
+7
drivers/ntb/ntb_transport.c
···
59
59
#include <linux/slab.h>
60
60
#include <linux/types.h>
61
61
#include <linux/uaccess.h>
62
+
#include <linux/mutex.h>
62
63
#include "linux/ntb.h"
63
64
#include "linux/ntb_transport.h"
64
65
···
242
241
struct work_struct link_cleanup;
243
242
244
243
struct dentry *debugfs_node_dir;
244
+
245
+
/* Make sure workq of link event be executed serially */
246
+
struct mutex link_event_lock;
245
247
};
246
248
247
249
enum {
···
1028
1024
struct ntb_transport_ctx *nt =
1029
1025
container_of(work, struct ntb_transport_ctx, link_cleanup);
1030
1026
1027
+
guard(mutex)(&nt->link_event_lock);
1031
1028
ntb_transport_link_cleanup(nt);
1032
1029
}
1033
1030
···
1051
1046
resource_size_t size;
1052
1047
u32 val;
1053
1048
int rc = 0, i, spad;
1049
+
1050
+
guard(mutex)(&nt->link_event_lock);
1054
1051
1055
1052
/* send the local info, in the opposite order of the way we read it */
1056
1053