cxl/port: Use __free() to drop put_device() for cxl_port

+2 -4

drivers/cxl/core/pci.c

··· 915 915 struct pci_dev *pdev = to_pci_dev(cxlds->dev); 916 916 struct aer_capability_regs aer_regs; 917 917 struct cxl_dport *dport; 918 - struct cxl_port *port; 919 918 int severity; 920 919 921 - port = cxl_pci_find_port(pdev, &dport); 920 + struct cxl_port *port __free(put_cxl_port) = 921 + cxl_pci_find_port(pdev, &dport); 922 922 if (!port) 923 923 return; 924 - 925 - put_device(&port->dev); 926 924 927 925 if (!cxl_rch_get_aer_info(dport->regs.dport_aer, &aer_regs)) 928 926 return;

+13 -17

drivers/cxl/core/port.c

··· 1477 1477 .cxlmd = cxlmd, 1478 1478 .depth = i, 1479 1479 }; 1480 - struct device *dev; 1481 1480 struct cxl_ep *ep; 1482 1481 bool died = false; 1483 1482 1484 - dev = bus_find_device(&cxl_bus_type, NULL, &ctx, 1485 - port_has_memdev); 1483 + struct device *dev __free(put_device) = 1484 + bus_find_device(&cxl_bus_type, NULL, &ctx, port_has_memdev); 1486 1485 if (!dev) 1487 1486 continue; 1488 1487 port = to_cxl_port(dev); ··· 1511 1512 dev_name(&port->dev)); 1512 1513 delete_switch_port(port); 1513 1514 } 1514 - put_device(&port->dev); 1515 1515 device_unlock(&parent_port->dev); 1516 1516 } 1517 1517 } ··· 1538 1540 struct device *dport_dev) 1539 1541 { 1540 1542 struct device *dparent = grandparent(dport_dev); 1541 - struct cxl_port *port, *parent_port = NULL; 1542 1543 struct cxl_dport *dport, *parent_dport; 1543 1544 resource_size_t component_reg_phys; 1544 1545 int rc; ··· 1553 1556 return -ENXIO; 1554 1557 } 1555 1558 1556 - parent_port = find_cxl_port(dparent, &parent_dport); 1559 + struct cxl_port *parent_port __free(put_cxl_port) = 1560 + find_cxl_port(dparent, &parent_dport); 1557 1561 if (!parent_port) { 1558 1562 /* iterate to create this parent_port */ 1559 1563 return -EAGAIN; 1560 1564 } 1561 1565 1566 + /* 1567 + * Definition with __free() here to keep the sequence of 1568 + * dereferencing the device of the port before the parent_port releasing. 1569 + */ 1570 + struct cxl_port *port __free(put_cxl_port) = NULL; 1562 1571 device_lock(&parent_port->dev); 1563 1572 if (!parent_port->dev.driver) { 1564 1573 dev_warn(&cxlmd->dev, ··· 1599 1596 */ 1600 1597 rc = -ENXIO; 1601 1598 } 1602 - put_device(&port->dev); 1603 1599 } 1604 1600 1605 - put_device(&parent_port->dev); 1606 1601 return rc; 1607 1602 } 1608 1603 ··· 1631 1630 struct device *dport_dev = grandparent(iter); 1632 1631 struct device *uport_dev; 1633 1632 struct cxl_dport *dport; 1634 - struct cxl_port *port; 1635 1633 1636 1634 /* 1637 1635 * The terminal "grandparent" in PCI is NULL and @platform_bus ··· 1649 1649 dev_dbg(dev, "scan: iter: %s dport_dev: %s parent: %s\n", 1650 1650 dev_name(iter), dev_name(dport_dev), 1651 1651 dev_name(uport_dev)); 1652 - port = find_cxl_port(dport_dev, &dport); 1652 + struct cxl_port *port __free(put_cxl_port) = 1653 + find_cxl_port(dport_dev, &dport); 1653 1654 if (port) { 1654 1655 dev_dbg(&cxlmd->dev, 1655 1656 "found already registered port %s:%s\n", ··· 1665 1664 * the parent_port lock as the current port may be being 1666 1665 * reaped. 1667 1666 */ 1668 - if (rc && rc != -EBUSY) { 1669 - put_device(&port->dev); 1667 + if (rc && rc != -EBUSY) 1670 1668 return rc; 1671 - } 1672 1669 1673 1670 /* Any more ports to add between this one and the root? */ 1674 - if (!dev_is_cxl_root_child(&port->dev)) { 1675 - put_device(&port->dev); 1671 + if (!dev_is_cxl_root_child(&port->dev)) 1676 1672 continue; 1677 - } 1678 1673 1679 - put_device(&port->dev); 1680 1674 return 0; 1681 1675 } 1682 1676

+1

drivers/cxl/cxl.h

··· 744 744 void put_cxl_root(struct cxl_root *cxl_root); 745 745 DEFINE_FREE(put_cxl_root, struct cxl_root *, if (_T) put_cxl_root(_T)) 746 746 747 + DEFINE_FREE(put_cxl_port, struct cxl_port *, if (!IS_ERR_OR_NULL(_T)) put_device(&_T->dev)) 747 748 int devm_cxl_enumerate_ports(struct cxl_memdev *cxlmd); 748 749 void cxl_bus_rescan(void); 749 750 void cxl_bus_drain(void);

+2 -3

drivers/cxl/mem.c

··· 109 109 struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds); 110 110 struct cxl_dev_state *cxlds = cxlmd->cxlds; 111 111 struct device *endpoint_parent; 112 - struct cxl_port *parent_port; 113 112 struct cxl_dport *dport; 114 113 struct dentry *dentry; 115 114 int rc; ··· 145 146 if (rc) 146 147 return rc; 147 148 148 - parent_port = cxl_mem_find_port(cxlmd, &dport); 149 + struct cxl_port *parent_port __free(put_cxl_port) = 150 + cxl_mem_find_port(cxlmd, &dport); 149 151 if (!parent_port) { 150 152 dev_err(dev, "CXL port topology not found\n"); 151 153 return -ENXIO; ··· 179 179 rc = devm_cxl_add_endpoint(endpoint_parent, cxlmd, dport); 180 180 unlock: 181 181 device_unlock(endpoint_parent); 182 - put_device(&parent_port->dev); 183 182 if (rc) 184 183 return rc; 185 184

+2 -5

drivers/cxl/pci.c

··· 473 473 static int cxl_rcrb_get_comp_regs(struct pci_dev *pdev, 474 474 struct cxl_register_map *map) 475 475 { 476 - struct cxl_port *port; 477 476 struct cxl_dport *dport; 478 477 resource_size_t component_reg_phys; 479 478 ··· 481 482 .resource = CXL_RESOURCE_NONE, 482 483 }; 483 484 484 - port = cxl_pci_find_port(pdev, &dport); 485 + struct cxl_port *port __free(put_cxl_port) = 486 + cxl_pci_find_port(pdev, &dport); 485 487 if (!port) 486 488 return -EPROBE_DEFER; 487 489 488 490 component_reg_phys = cxl_rcd_component_reg_phys(&pdev->dev, dport); 489 - 490 - put_device(&port->dev); 491 - 492 491 if (component_reg_phys == CXL_RESOURCE_NONE) 493 492 return -ENXIO; 494 493

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