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Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull i2c fixes from Wolfram Sang:
"Some driver bugfixes"

* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: imx: use open drain for recovery GPIO
i2c: rcar: handle RXDMA HW behaviour on Gen3
i2c: imx: Fix reinit_completion() use
i2c: davinci: Avoid zero value of CLKH

+59 -8
+6 -2
drivers/i2c/busses/i2c-davinci.c
··· 237 237 /* 238 238 * It's not always possible to have 1 to 2 ratio when d=7, so fall back 239 239 * to minimal possible clkh in this case. 240 + * 241 + * Note: 242 + * CLKH is not allowed to be 0, in this case I2C clock is not generated 243 + * at all 240 244 */ 241 - if (clk >= clkl + d) { 245 + if (clk > clkl + d) { 242 246 clkh = clk - clkl - d; 243 247 clkl -= d; 244 248 } else { 245 - clkh = 0; 249 + clkh = 1; 246 250 clkl = clk - (d << 1); 247 251 } 248 252
+2 -3
drivers/i2c/busses/i2c-imx.c
··· 368 368 goto err_desc; 369 369 } 370 370 371 + reinit_completion(&dma->cmd_complete); 371 372 txdesc->callback = i2c_imx_dma_callback; 372 373 txdesc->callback_param = i2c_imx; 373 374 if (dma_submit_error(dmaengine_submit(txdesc))) { ··· 623 622 * The first byte must be transmitted by the CPU. 624 623 */ 625 624 imx_i2c_write_reg(i2c_8bit_addr_from_msg(msgs), i2c_imx, IMX_I2C_I2DR); 626 - reinit_completion(&i2c_imx->dma->cmd_complete); 627 625 time_left = wait_for_completion_timeout( 628 626 &i2c_imx->dma->cmd_complete, 629 627 msecs_to_jiffies(DMA_TIMEOUT)); ··· 681 681 if (result) 682 682 return result; 683 683 684 - reinit_completion(&i2c_imx->dma->cmd_complete); 685 684 time_left = wait_for_completion_timeout( 686 685 &i2c_imx->dma->cmd_complete, 687 686 msecs_to_jiffies(DMA_TIMEOUT)); ··· 1009 1010 i2c_imx->pinctrl_pins_gpio = pinctrl_lookup_state(i2c_imx->pinctrl, 1010 1011 "gpio"); 1011 1012 rinfo->sda_gpiod = devm_gpiod_get(&pdev->dev, "sda", GPIOD_IN); 1012 - rinfo->scl_gpiod = devm_gpiod_get(&pdev->dev, "scl", GPIOD_OUT_HIGH); 1013 + rinfo->scl_gpiod = devm_gpiod_get(&pdev->dev, "scl", GPIOD_OUT_HIGH_OPEN_DRAIN); 1013 1014 1014 1015 if (PTR_ERR(rinfo->sda_gpiod) == -EPROBE_DEFER || 1015 1016 PTR_ERR(rinfo->scl_gpiod) == -EPROBE_DEFER) {
+51 -3
drivers/i2c/busses/i2c-rcar.c
··· 32 32 #include <linux/of_device.h> 33 33 #include <linux/platform_device.h> 34 34 #include <linux/pm_runtime.h> 35 + #include <linux/reset.h> 35 36 #include <linux/slab.h> 36 37 37 38 /* register offsets */ ··· 112 111 #define ID_ARBLOST (1 << 3) 113 112 #define ID_NACK (1 << 4) 114 113 /* persistent flags */ 114 + #define ID_P_NO_RXDMA (1 << 30) /* HW forbids RXDMA sometimes */ 115 115 #define ID_P_PM_BLOCKED (1 << 31) 116 - #define ID_P_MASK ID_P_PM_BLOCKED 116 + #define ID_P_MASK (ID_P_PM_BLOCKED | ID_P_NO_RXDMA) 117 117 118 118 enum rcar_i2c_type { 119 119 I2C_RCAR_GEN1, ··· 143 141 struct dma_chan *dma_rx; 144 142 struct scatterlist sg; 145 143 enum dma_data_direction dma_direction; 144 + 145 + struct reset_control *rstc; 146 146 }; 147 147 148 148 #define rcar_i2c_priv_to_dev(p) ((p)->adap.dev.parent) ··· 374 370 dma_unmap_single(chan->device->dev, sg_dma_address(&priv->sg), 375 371 sg_dma_len(&priv->sg), priv->dma_direction); 376 372 373 + /* Gen3 can only do one RXDMA per transfer and we just completed it */ 374 + if (priv->devtype == I2C_RCAR_GEN3 && 375 + priv->dma_direction == DMA_FROM_DEVICE) 376 + priv->flags |= ID_P_NO_RXDMA; 377 + 377 378 priv->dma_direction = DMA_NONE; 378 379 } 379 380 ··· 416 407 unsigned char *buf; 417 408 int len; 418 409 419 - /* Do not use DMA if it's not available or for messages < 8 bytes */ 420 - if (IS_ERR(chan) || msg->len < 8 || !(msg->flags & I2C_M_DMA_SAFE)) 410 + /* Do various checks to see if DMA is feasible at all */ 411 + if (IS_ERR(chan) || msg->len < 8 || !(msg->flags & I2C_M_DMA_SAFE) || 412 + (read && priv->flags & ID_P_NO_RXDMA)) 421 413 return; 422 414 423 415 if (read) { ··· 749 739 } 750 740 } 751 741 742 + /* I2C is a special case, we need to poll the status of a reset */ 743 + static int rcar_i2c_do_reset(struct rcar_i2c_priv *priv) 744 + { 745 + int i, ret; 746 + 747 + ret = reset_control_reset(priv->rstc); 748 + if (ret) 749 + return ret; 750 + 751 + for (i = 0; i < LOOP_TIMEOUT; i++) { 752 + ret = reset_control_status(priv->rstc); 753 + if (ret == 0) 754 + return 0; 755 + udelay(1); 756 + } 757 + 758 + return -ETIMEDOUT; 759 + } 760 + 752 761 static int rcar_i2c_master_xfer(struct i2c_adapter *adap, 753 762 struct i2c_msg *msgs, 754 763 int num) ··· 778 749 long time_left; 779 750 780 751 pm_runtime_get_sync(dev); 752 + 753 + /* Gen3 needs a reset before allowing RXDMA once */ 754 + if (priv->devtype == I2C_RCAR_GEN3) { 755 + priv->flags |= ID_P_NO_RXDMA; 756 + if (!IS_ERR(priv->rstc)) { 757 + ret = rcar_i2c_do_reset(priv); 758 + if (ret == 0) 759 + priv->flags &= ~ID_P_NO_RXDMA; 760 + } 761 + } 781 762 782 763 rcar_i2c_init(priv); 783 764 ··· 958 919 ret = rcar_i2c_clock_calculate(priv, &i2c_t); 959 920 if (ret < 0) 960 921 goto out_pm_put; 922 + 923 + if (priv->devtype == I2C_RCAR_GEN3) { 924 + priv->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL); 925 + if (!IS_ERR(priv->rstc)) { 926 + ret = reset_control_status(priv->rstc); 927 + if (ret < 0) 928 + priv->rstc = ERR_PTR(-ENOTSUPP); 929 + } 930 + } 961 931 962 932 /* Stay always active when multi-master to keep arbitration working */ 963 933 if (of_property_read_bool(dev->of_node, "multi-master"))