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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Catalin Marinas:

- Cache invalidation fix for early CPU boot status update (incorrect
cacheline)

- of_put_node() missing in the spin_table code

- EL1/El2 early init inconsistency when Virtualisation Host Extensions
are present

- RCU warning fix in the arm_pmu.c driver

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: Fix EL1/EL2 early init inconsistencies with VHE
drivers/perf: arm-pmu: fix RCU usage on pmu resume from low-power
arm64: spin-table: add missing of_node_put()
arm64: fix invalidation of wrong __early_cpu_boot_status cacheline

+31 -8
+12 -1
arch/arm64/kernel/head.S
··· 588 588 msr vpidr_el2, x0 589 589 msr vmpidr_el2, x1 590 590 591 + /* 592 + * When VHE is not in use, early init of EL2 and EL1 needs to be 593 + * done here. 594 + * When VHE _is_ in use, EL1 will not be used in the host and 595 + * requires no configuration, and all non-hyp-specific EL2 setup 596 + * will be done via the _EL1 system register aliases in __cpu_setup. 597 + */ 598 + cbnz x2, 1f 599 + 591 600 /* sctlr_el1 */ 592 601 mov x0, #0x0800 // Set/clear RES{1,0} bits 593 602 CPU_BE( movk x0, #0x33d0, lsl #16 ) // Set EE and E0E on BE systems ··· 606 597 /* Coprocessor traps. */ 607 598 mov x0, #0x33ff 608 599 msr cptr_el2, x0 // Disable copro. traps to EL2 600 + 1: 609 601 610 602 #ifdef CONFIG_COMPAT 611 603 msr hstr_el2, xzr // Disable CP15 traps to EL2 ··· 744 734 745 735 .macro update_early_cpu_boot_status status, tmp1, tmp2 746 736 mov \tmp2, #\status 747 - str_l \tmp2, __early_cpu_boot_status, \tmp1 737 + adr_l \tmp1, __early_cpu_boot_status 738 + str \tmp2, [\tmp1] 748 739 dmb sy 749 740 dc ivac, \tmp1 // Invalidate potentially stale cache line 750 741 .endm
+6 -5
arch/arm64/kernel/smp_spin_table.c
··· 52 52 static int smp_spin_table_cpu_init(unsigned int cpu) 53 53 { 54 54 struct device_node *dn; 55 + int ret; 55 56 56 57 dn = of_get_cpu_node(cpu, NULL); 57 58 if (!dn) ··· 61 60 /* 62 61 * Determine the address from which the CPU is polling. 63 62 */ 64 - if (of_property_read_u64(dn, "cpu-release-addr", 65 - &cpu_release_addr[cpu])) { 63 + ret = of_property_read_u64(dn, "cpu-release-addr", 64 + &cpu_release_addr[cpu]); 65 + if (ret) 66 66 pr_err("CPU %d: missing or invalid cpu-release-addr property\n", 67 67 cpu); 68 68 69 - return -1; 70 - } 69 + of_node_put(dn); 71 70 72 - return 0; 71 + return ret; 73 72 } 74 73 75 74 static int smp_spin_table_cpu_prepare(unsigned int cpu)
+13 -2
drivers/perf/arm_pmu.c
··· 737 737 break; 738 738 case CPU_PM_EXIT: 739 739 case CPU_PM_ENTER_FAILED: 740 - /* Restore and enable the counter */ 741 - armpmu_start(event, PERF_EF_RELOAD); 740 + /* 741 + * Restore and enable the counter. 742 + * armpmu_start() indirectly calls 743 + * 744 + * perf_event_update_userpage() 745 + * 746 + * that requires RCU read locking to be functional, 747 + * wrap the call within RCU_NONIDLE to make the 748 + * RCU subsystem aware this cpu is not idle from 749 + * an RCU perspective for the armpmu_start() call 750 + * duration. 751 + */ 752 + RCU_NONIDLE(armpmu_start(event, PERF_EF_RELOAD)); 742 753 break; 743 754 default: 744 755 break;