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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
interconnect: qcom: sdx65: Retire DEFINE_QBCM
The struct definition macros are hard to read and compare, expand them.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230811-topic-icc_retire_macrosd-v1-15-c03aaeffc769@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
authored by
Konrad Dybcio
and committed by
Georgi Djakov
de2ae887
37474b02
+165
-20
+165
-20
drivers/interconnect/qcom/sdx65.c
+165
-20
drivers/interconnect/qcom/sdx65.c
···
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.buswidth = 8,
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};
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-
DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto);
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DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
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-
DEFINE_QBCM(bcm_pn0, "PN0", true, &qhm_snoc_cfg, &qhs_aoss, &qhs_apss, &qhs_audio, &qhs_blsp1, &qhs_clk_ctl, &qhs_crypto0_cfg, &qhs_ddrss_cfg, &qhs_ecc_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_mss_cfg, &qhs_pcie_parf, &qhs_pdm, &qhs_prng, &qhs_qdss_cfg, &qhs_qpic, &qhs_sdc1, &qhs_snoc_cfg, &qhs_spmi_fetcher, &qhs_spmi_vgi_coex, &qhs_tcsr, &qhs_tlmm, &qhs_usb3, &qhs_usb3_phy, &srvc_snoc);
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-
DEFINE_QBCM(bcm_pn1, "PN1", false, &xm_sdc1);
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DEFINE_QBCM(bcm_pn2, "PN2", false, &qhm_audio, &qhm_spmi_fetcher1);
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DEFINE_QBCM(bcm_pn3, "PN3", false, &qhm_blsp1, &qhm_qpic);
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DEFINE_QBCM(bcm_pn4, "PN4", false, &qxm_crypto);
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DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc);
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DEFINE_QBCM(bcm_sh1, "SH1", false, &qns_memnoc_snoc);
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DEFINE_QBCM(bcm_sh3, "SH3", false, &xm_apps_rdwr);
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DEFINE_QBCM(bcm_sn0, "SN0", true, &qns_snoc_memnoc);
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DEFINE_QBCM(bcm_sn1, "SN1", false, &qxs_imem);
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DEFINE_QBCM(bcm_sn2, "SN2", false, &xs_qdss_stm);
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DEFINE_QBCM(bcm_sn3, "SN3", false, &xs_sys_tcu_cfg);
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DEFINE_QBCM(bcm_sn5, "SN5", false, &xs_pcie);
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DEFINE_QBCM(bcm_sn6, "SN6", false, &qhm_qdss_bam, &xm_qdss_etr);
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DEFINE_QBCM(bcm_sn7, "SN7", false, &qnm_aggre_noc, &xm_pcie, &xm_usb3, &qns_aggre_noc);
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DEFINE_QBCM(bcm_sn8, "SN8", false, &qnm_memnoc);
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DEFINE_QBCM(bcm_sn9, "SN9", false, &qnm_memnoc_pcie);
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DEFINE_QBCM(bcm_sn10, "SN10", false, &qnm_ipa, &xm_ipa2pcie_slv);
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+
static struct qcom_icc_bcm bcm_ce0 = {
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.name = "CE0",
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.keepalive = false,
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.num_nodes = 1,
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.nodes = { &qxm_crypto },
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};
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+
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static struct qcom_icc_bcm bcm_mc0 = {
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.name = "MC0",
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.keepalive = true,
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.num_nodes = 1,
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.nodes = { &ebi },
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};
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+
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static struct qcom_icc_bcm bcm_pn0 = {
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.name = "PN0",
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.keepalive = true,
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.num_nodes = 26,
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.nodes = { &qhm_snoc_cfg,
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&qhs_aoss,
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&qhs_apss,
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&qhs_audio,
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&qhs_blsp1,
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&qhs_clk_ctl,
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&qhs_crypto0_cfg,
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&qhs_ddrss_cfg,
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&qhs_ecc_cfg,
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&qhs_imem_cfg,
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&qhs_ipa,
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&qhs_mss_cfg,
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&qhs_pcie_parf,
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&qhs_pdm,
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&qhs_prng,
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&qhs_qdss_cfg,
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&qhs_qpic,
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&qhs_sdc1,
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&qhs_snoc_cfg,
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&qhs_spmi_fetcher,
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&qhs_spmi_vgi_coex,
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&qhs_tcsr,
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&qhs_tlmm,
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&qhs_usb3,
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&qhs_usb3_phy,
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&srvc_snoc
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},
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};
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+
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static struct qcom_icc_bcm bcm_pn1 = {
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.name = "PN1",
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.keepalive = false,
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.num_nodes = 1,
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.nodes = { &xm_sdc1 },
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};
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static struct qcom_icc_bcm bcm_pn2 = {
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.name = "PN2",
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.keepalive = false,
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.num_nodes = 2,
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.nodes = { &qhm_audio, &qhm_spmi_fetcher1 },
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};
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static struct qcom_icc_bcm bcm_pn3 = {
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.name = "PN3",
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.keepalive = false,
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.num_nodes = 2,
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.nodes = { &qhm_blsp1, &qhm_qpic },
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};
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static struct qcom_icc_bcm bcm_pn4 = {
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.name = "PN4",
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.keepalive = false,
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.num_nodes = 1,
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.nodes = { &qxm_crypto },
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};
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+
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static struct qcom_icc_bcm bcm_sh0 = {
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.name = "SH0",
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.keepalive = true,
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.num_nodes = 1,
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.nodes = { &qns_llcc },
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};
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static struct qcom_icc_bcm bcm_sh1 = {
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.name = "SH1",
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.keepalive = false,
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.num_nodes = 1,
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.nodes = { &qns_memnoc_snoc },
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};
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static struct qcom_icc_bcm bcm_sh3 = {
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.name = "SH3",
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.keepalive = false,
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.num_nodes = 1,
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.nodes = { &xm_apps_rdwr },
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};
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static struct qcom_icc_bcm bcm_sn0 = {
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.name = "SN0",
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.keepalive = true,
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.num_nodes = 1,
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.nodes = { &qns_snoc_memnoc },
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};
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static struct qcom_icc_bcm bcm_sn1 = {
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.name = "SN1",
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.keepalive = false,
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.num_nodes = 1,
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.nodes = { &qxs_imem },
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};
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static struct qcom_icc_bcm bcm_sn2 = {
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.name = "SN2",
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.keepalive = false,
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.num_nodes = 1,
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.nodes = { &xs_qdss_stm },
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};
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static struct qcom_icc_bcm bcm_sn3 = {
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.name = "SN3",
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.keepalive = false,
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.num_nodes = 1,
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.nodes = { &xs_sys_tcu_cfg },
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};
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static struct qcom_icc_bcm bcm_sn5 = {
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.name = "SN5",
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.keepalive = false,
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.num_nodes = 1,
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.nodes = { &xs_pcie },
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};
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static struct qcom_icc_bcm bcm_sn6 = {
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.name = "SN6",
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.keepalive = false,
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.num_nodes = 2,
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.nodes = { &qhm_qdss_bam, &xm_qdss_etr },
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};
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static struct qcom_icc_bcm bcm_sn7 = {
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.name = "SN7",
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.keepalive = false,
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.num_nodes = 4,
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.nodes = { &qnm_aggre_noc, &xm_pcie, &xm_usb3, &qns_aggre_noc },
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};
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static struct qcom_icc_bcm bcm_sn8 = {
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.name = "SN8",
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.keepalive = false,
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.num_nodes = 1,
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.nodes = { &qnm_memnoc },
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};
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static struct qcom_icc_bcm bcm_sn9 = {
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.name = "SN9",
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.keepalive = false,
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.num_nodes = 1,
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.nodes = { &qnm_memnoc_pcie },
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};
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static struct qcom_icc_bcm bcm_sn10 = {
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.name = "SN10",
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.keepalive = false,
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.num_nodes = 2,
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.nodes = { &qnm_ipa, &xm_ipa2pcie_slv },
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};
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static struct qcom_icc_bcm * const mc_virt_bcms[] = {
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&bcm_mc0,