Merge tag 'rtc-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux

-22

Documentation/devicetree/bindings/rtc/epson,rx8900.txt

··· 1 - Real Time Clock driver for: 2 - - Epson RX8900 3 - - Micro Crystal rv8803 4 - 5 - Required properties: 6 - - compatible: should be: "microcrystal,rv8803" or "epson,rx8900" 7 - - reg : the I2C address of the device for I2C 8 - 9 - Optional properties: 10 - - epson,vdet-disable : boolean, if present will disable voltage detector. 11 - Should be set if no backup battery is used. 12 - - trickle-diode-disable : boolean, if present will disable internal trickle 13 - charger diode 14 - 15 - Example: 16 - 17 - rtc: rtc@32 { 18 - compatible = "epson,rx8900" 19 - reg = <0x32>; 20 - epson,vdet-disable; 21 - trickle-diode-disable; 22 - };

+49

Documentation/devicetree/bindings/rtc/epson,rx8900.yaml

··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/rtc/epson,rx8900.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: EPSON RX8900 / Microcrystal RV8803 Real-Time Clock DT bindings 8 + 9 + maintainers: 10 + - Marek Vasut <marex@denx.de> 11 + 12 + allOf: 13 + - $ref: rtc.yaml# 14 + 15 + properties: 16 + compatible: 17 + enum: 18 + - epson,rx8900 19 + - microcrystal,rv8803 20 + 21 + reg: 22 + maxItems: 1 23 + 24 + epson,vdet-disable: 25 + type: boolean 26 + description: | 27 + Disable voltage detector. Should be set if no backup battery is used. 28 + 29 + trickle-diode-disable: true 30 + 31 + required: 32 + - compatible 33 + - reg 34 + 35 + additionalProperties: false 36 + 37 + examples: 38 + - | 39 + i2c { 40 + #address-cells = <1>; 41 + #size-cells = <0>; 42 + 43 + rtc@32 { 44 + compatible = "epson,rx8900"; 45 + reg = <0x32>; 46 + epson,vdet-disable; 47 + trickle-diode-disable; 48 + }; 49 + };

-28

Documentation/devicetree/bindings/rtc/faraday,ftrtc010.txt

··· 1 - * Faraday Technology FTRTC010 Real Time Clock 2 - 3 - This RTC appears in for example the Storlink Gemini family of 4 - SoCs. 5 - 6 - Required properties: 7 - - compatible : Should be one of: 8 - "faraday,ftrtc010" 9 - "cortina,gemini-rtc", "faraday,ftrtc010" 10 - 11 - Optional properties: 12 - - clocks: when present should contain clock references to the 13 - PCLK and EXTCLK clocks. Faraday calls the later CLK1HZ and 14 - says the clock should be 1 Hz, but implementers actually seem 15 - to choose different clocks here, like Cortina who chose 16 - 32768 Hz (a typical low-power clock). 17 - - clock-names: should name the clocks "PCLK" and "EXTCLK" 18 - respectively. 19 - 20 - Examples: 21 - 22 - rtc@45000000 { 23 - compatible = "cortina,gemini-rtc"; 24 - reg = <0x45000000 0x100>; 25 - interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; 26 - clocks = <&foo 0>, <&foo 1>; 27 - clock-names = "PCLK", "EXTCLK"; 28 - };

+59

Documentation/devicetree/bindings/rtc/faraday,ftrtc010.yaml

··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/rtc/faraday,ftrtc010.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Faraday Technology FTRTC010 Real Time Clock 8 + 9 + maintainers: 10 + - Linus Walleij <linus.walleij@linaro.org> 11 + 12 + description: | 13 + This RTC appears in for example the Storlink Gemini family of SoCs. 14 + 15 + properties: 16 + compatible: 17 + oneOf: 18 + - const: faraday,ftrtc010 19 + - items: 20 + - const: cortina,gemini-rtc 21 + - const: faraday,ftrtc010 22 + 23 + resets: 24 + maxItems: 1 25 + 26 + reg: 27 + maxItems: 1 28 + 29 + interrupts: 30 + maxItems: 1 31 + 32 + clocks: 33 + minItems: 2 34 + items: 35 + - description: PCLK clocks 36 + - description: EXTCLK clocks. Faraday calls it CLK1HZ and says the clock 37 + should be 1 Hz, but implementers actually seem to choose different 38 + clocks here, like Cortina who chose 32768 Hz (a typical low-power clock). 39 + 40 + clock-names: 41 + items: 42 + - const: "PCLK" 43 + - const: "EXTCLK" 44 + 45 + required: 46 + - compatible 47 + 48 + additionalProperties: false 49 + 50 + examples: 51 + - | 52 + #include <dt-bindings/interrupt-controller/irq.h> 53 + rtc@45000000 { 54 + compatible = "cortina,gemini-rtc", "faraday,ftrtc010"; 55 + reg = <0x45000000 0x100>; 56 + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; 57 + clocks = <&foo 0>, <&foo 1>; 58 + clock-names = "PCLK", "EXTCLK"; 59 + };

+9

Documentation/devicetree/bindings/rtc/rtc-m41t80.txt

··· 21 21 clock name 22 22 - wakeup-source: Enables wake up of host system on alarm 23 23 24 + Optional child node: 25 + - clock: Provide this if the square wave pin is used as boot-enabled fixed clock. 26 + 24 27 Example: 25 28 rtc@68 { 26 29 compatible = "st,m41t80"; 27 30 reg = <0x68>; 28 31 interrupt-parent = <&UIC0>; 29 32 interrupts = <0x9 0x8>; 33 + 34 + clock { 35 + compatible = "fixed-clock"; 36 + #clock-cells = <0>; 37 + clock-frequency = <32768>; 38 + }; 30 39 };

+49

Documentation/devicetree/bindings/rtc/ti,bq32000.yaml

··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/rtc/ti,bq32000.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: TI BQ32000 I2C Serial Real-Time Clock 8 + 9 + maintainers: 10 + - Alexandre Belloni <alexandre.belloni@bootlin.com> 11 + 12 + allOf: 13 + - $ref: rtc.yaml# 14 + 15 + properties: 16 + compatible: 17 + const: ti,bq32000 18 + 19 + reg: 20 + const: 0x68 21 + 22 + interrupts: 23 + maxItems: 1 24 + 25 + start-year: true 26 + 27 + trickle-resistor-ohms: 28 + enum: [ 1120, 20180 ] 29 + 30 + trickle-diode-disable: true 31 + 32 + required: 33 + - compatible 34 + - reg 35 + 36 + additionalProperties: false 37 + 38 + examples: 39 + - | 40 + i2c { 41 + #address-cells = <1>; 42 + #size-cells = <0>; 43 + 44 + bq32000: rtc@68 { 45 + compatible = "ti,bq32000"; 46 + reg = <0x68>; 47 + trickle-resistor-ohms = <1120>; 48 + }; 49 + };

-18

Documentation/devicetree/bindings/rtc/ti,bq32k.txt

··· 1 - * TI BQ32000 I2C Serial Real-Time Clock 2 - 3 - Required properties: 4 - - compatible: Should contain "ti,bq32000". 5 - - reg: I2C address for chip 6 - 7 - Optional properties: 8 - - trickle-resistor-ohms : Selected resistor for trickle charger 9 - Values usable are 1120 and 20180 10 - Should be given if trickle charger should be enabled 11 - - trickle-diode-disable : Do not use internal trickle charger diode 12 - Should be given if internal trickle charger diode should be disabled 13 - Example: 14 - bq32000: rtc@68 { 15 - compatible = "ti,bq32000"; 16 - trickle-resistor-ohms = <1120>; 17 - reg = <0x68>; 18 - };

+3 -3

drivers/rtc/Kconfig

··· 501 501 watchdog timer in the ST M41T60 and M41T80 RTC chips series. 502 502 503 503 config RTC_DRV_BD70528 504 - tristate "ROHM BD70528, BD71815 and BD71828 PMIC RTC" 505 - depends on MFD_ROHM_BD71828 || MFD_ROHM_BD70528 && (BD70528_WATCHDOG || !BD70528_WATCHDOG) 504 + tristate "ROHM BD71815 and BD71828 PMIC RTC" 505 + depends on MFD_ROHM_BD71828 506 506 help 507 507 If you say Y here you will get support for the RTC 508 - block on ROHM BD70528, BD71815 and BD71828 Power Management IC. 508 + block on ROHM BD71815 and BD71828 Power Management IC. 509 509 510 510 This driver can also be built as a module. If so, the module 511 511 will be called rtc-bd70528.

+2 -2

drivers/rtc/proc.c

··· 23 23 int size; 24 24 char name[NAME_SIZE]; 25 25 26 - size = scnprintf(name, NAME_SIZE, "rtc%d", rtc->id); 27 - if (size > NAME_SIZE) 26 + size = snprintf(name, NAME_SIZE, "rtc%d", rtc->id); 27 + if (size >= NAME_SIZE) 28 28 return false; 29 29 30 30 return !strncmp(name, CONFIG_RTC_HCTOSYS_DEVICE, NAME_SIZE);

+1 -1

drivers/rtc/rtc-at91sam9.c

··· 184 184 return -EILSEQ; 185 185 186 186 memset(alrm, 0, sizeof(*alrm)); 187 - if (alarm != ALARM_DISABLED && offset != 0) { 187 + if (alarm != ALARM_DISABLED) { 188 188 rtc_time64_to_tm(offset + alarm, tm); 189 189 190 190 dev_dbg(dev, "%s: %ptR\n", __func__, tm);

+1 -4

drivers/rtc/rtc-au1xxx.c

··· 1 + // SPDX-License-Identifier: GPL-2.0-only 1 2 /* 2 3 * Au1xxx counter0 (aka Time-Of-Year counter) RTC interface driver. 3 4 * 4 5 * Copyright (C) 2008 Manuel Lauss <mano@roarinelk.homelinux.net> 5 - * 6 - * This file is subject to the terms and conditions of the GNU General Public 7 - * License. See the file "COPYING" in the main directory of this archive 8 - * for more details. 9 6 */ 10 7 11 8 /* All current Au1xxx SoCs have 2 counters fed by an external 32.768 kHz

+11 -305

drivers/rtc/rtc-bd70528.c

··· 2 2 // 3 3 // Copyright (C) 2018 ROHM Semiconductors 4 4 // 5 - // RTC driver for ROHM BD70528 PMIC 5 + // RTC driver for ROHM BD71828 and BD71815 PMIC 6 6 7 7 #include <linux/bcd.h> 8 - #include <linux/mfd/rohm-bd70528.h> 9 8 #include <linux/mfd/rohm-bd71815.h> 10 9 #include <linux/mfd/rohm-bd71828.h> 11 10 #include <linux/module.h> ··· 38 39 u8 year; 39 40 } __packed; 40 41 41 - struct bd70528_rtc_wake { 42 - struct bd70528_rtc_day time; 43 - u8 ctrl; 44 - } __packed; 45 - 46 42 struct bd71828_rtc_alm { 47 43 struct bd70528_rtc_data alm0; 48 44 struct bd70528_rtc_data alm1; 49 45 u8 alm_mask; 50 46 u8 alm1_mask; 51 - } __packed; 52 - 53 - struct bd70528_rtc_alm { 54 - struct bd70528_rtc_data data; 55 - u8 alm_mask; 56 - u8 alm_repeat; 57 47 } __packed; 58 48 59 49 struct bd70528_rtc { ··· 51 63 struct device *dev; 52 64 u8 reg_time_start; 53 65 u8 bd718xx_alm_block_start; 54 - bool has_rtc_timers; 55 66 }; 56 - 57 - static int bd70528_set_wake(struct rohm_regmap_dev *bd70528, 58 - int enable, int *old_state) 59 - { 60 - int ret; 61 - unsigned int ctrl_reg; 62 - 63 - ret = regmap_read(bd70528->regmap, BD70528_REG_WAKE_EN, &ctrl_reg); 64 - if (ret) 65 - return ret; 66 - 67 - if (old_state) { 68 - if (ctrl_reg & BD70528_MASK_WAKE_EN) 69 - *old_state |= BD70528_WAKE_STATE_BIT; 70 - else 71 - *old_state &= ~BD70528_WAKE_STATE_BIT; 72 - 73 - if (!enable == !(*old_state & BD70528_WAKE_STATE_BIT)) 74 - return 0; 75 - } 76 - 77 - if (enable) 78 - ctrl_reg |= BD70528_MASK_WAKE_EN; 79 - else 80 - ctrl_reg &= ~BD70528_MASK_WAKE_EN; 81 - 82 - return regmap_write(bd70528->regmap, BD70528_REG_WAKE_EN, 83 - ctrl_reg); 84 - } 85 - 86 - static int bd70528_set_elapsed_tmr(struct rohm_regmap_dev *bd70528, 87 - int enable, int *old_state) 88 - { 89 - int ret; 90 - unsigned int ctrl_reg; 91 - 92 - /* 93 - * TBD 94 - * What is the purpose of elapsed timer ? 95 - * Is the timeout registers counting down, or is the disable - re-enable 96 - * going to restart the elapsed-time counting? If counting is restarted 97 - * the timeout should be decreased by the amount of time that has 98 - * elapsed since starting the timer. Maybe we should store the monotonic 99 - * clock value when timer is started so that if RTC is set while timer 100 - * is armed we could do the compensation. This is a hack if RTC/system 101 - * clk are drifting. OTOH, RTC controlled via I2C is in any case 102 - * inaccurate... 103 - */ 104 - ret = regmap_read(bd70528->regmap, BD70528_REG_ELAPSED_TIMER_EN, 105 - &ctrl_reg); 106 - if (ret) 107 - return ret; 108 - 109 - if (old_state) { 110 - if (ctrl_reg & BD70528_MASK_ELAPSED_TIMER_EN) 111 - *old_state |= BD70528_ELAPSED_STATE_BIT; 112 - else 113 - *old_state &= ~BD70528_ELAPSED_STATE_BIT; 114 - 115 - if ((!enable) == (!(*old_state & BD70528_ELAPSED_STATE_BIT))) 116 - return 0; 117 - } 118 - 119 - if (enable) 120 - ctrl_reg |= BD70528_MASK_ELAPSED_TIMER_EN; 121 - else 122 - ctrl_reg &= ~BD70528_MASK_ELAPSED_TIMER_EN; 123 - 124 - return regmap_write(bd70528->regmap, BD70528_REG_ELAPSED_TIMER_EN, 125 - ctrl_reg); 126 - } 127 - 128 - static int bd70528_set_rtc_based_timers(struct bd70528_rtc *r, int new_state, 129 - int *old_state) 130 - { 131 - int ret; 132 - 133 - ret = bd70528_wdt_set(r->parent, new_state & BD70528_WDT_STATE_BIT, 134 - old_state); 135 - if (ret) { 136 - dev_err(r->dev, 137 - "Failed to disable WDG for RTC setting (%d)\n", ret); 138 - return ret; 139 - } 140 - ret = bd70528_set_elapsed_tmr(r->parent, 141 - new_state & BD70528_ELAPSED_STATE_BIT, 142 - old_state); 143 - if (ret) { 144 - dev_err(r->dev, 145 - "Failed to disable 'elapsed timer' for RTC setting\n"); 146 - return ret; 147 - } 148 - ret = bd70528_set_wake(r->parent, new_state & BD70528_WAKE_STATE_BIT, 149 - old_state); 150 - if (ret) { 151 - dev_err(r->dev, 152 - "Failed to disable 'wake timer' for RTC setting\n"); 153 - return ret; 154 - } 155 - 156 - return ret; 157 - } 158 - 159 - static int bd70528_re_enable_rtc_based_timers(struct bd70528_rtc *r, 160 - int old_state) 161 - { 162 - if (!r->has_rtc_timers) 163 - return 0; 164 - 165 - return bd70528_set_rtc_based_timers(r, old_state, NULL); 166 - } 167 - 168 - static int bd70528_disable_rtc_based_timers(struct bd70528_rtc *r, 169 - int *old_state) 170 - { 171 - if (!r->has_rtc_timers) 172 - return 0; 173 - 174 - return bd70528_set_rtc_based_timers(r, 0, old_state); 175 - } 176 67 177 68 static inline void tmday2rtc(struct rtc_time *t, struct bd70528_rtc_day *d) 178 69 { ··· 134 267 135 268 } 136 269 137 - static int bd70528_set_alarm(struct device *dev, struct rtc_wkalrm *a) 138 - { 139 - struct bd70528_rtc_wake wake; 140 - struct bd70528_rtc_alm alm; 141 - int ret; 142 - struct bd70528_rtc *r = dev_get_drvdata(dev); 143 - 144 - ret = regmap_bulk_read(r->regmap, BD70528_REG_RTC_WAKE_START, &wake, 145 - sizeof(wake)); 146 - if (ret) { 147 - dev_err(dev, "Failed to read wake regs\n"); 148 - return ret; 149 - } 150 - 151 - ret = regmap_bulk_read(r->regmap, BD70528_REG_RTC_ALM_START, &alm, 152 - sizeof(alm)); 153 - if (ret) { 154 - dev_err(dev, "Failed to read alarm regs\n"); 155 - return ret; 156 - } 157 - 158 - tm2rtc(&a->time, &alm.data); 159 - tmday2rtc(&a->time, &wake.time); 160 - 161 - if (a->enabled) { 162 - alm.alm_mask &= ~BD70528_MASK_ALM_EN; 163 - wake.ctrl |= BD70528_MASK_WAKE_EN; 164 - } else { 165 - alm.alm_mask |= BD70528_MASK_ALM_EN; 166 - wake.ctrl &= ~BD70528_MASK_WAKE_EN; 167 - } 168 - 169 - ret = regmap_bulk_write(r->regmap, BD70528_REG_RTC_WAKE_START, &wake, 170 - sizeof(wake)); 171 - if (ret) { 172 - dev_err(dev, "Failed to set wake time\n"); 173 - return ret; 174 - } 175 - ret = regmap_bulk_write(r->regmap, BD70528_REG_RTC_ALM_START, &alm, 176 - sizeof(alm)); 177 - if (ret) 178 - dev_err(dev, "Failed to set alarm time\n"); 179 - 180 - return ret; 181 - } 182 - 183 270 static int bd71828_read_alarm(struct device *dev, struct rtc_wkalrm *a) 184 271 { 185 272 int ret; ··· 157 336 return 0; 158 337 } 159 338 160 - static int bd70528_read_alarm(struct device *dev, struct rtc_wkalrm *a) 339 + static int bd71828_set_time(struct device *dev, struct rtc_time *t) 161 340 { 162 - struct bd70528_rtc_alm alm; 163 341 int ret; 164 - struct bd70528_rtc *r = dev_get_drvdata(dev); 165 - 166 - ret = regmap_bulk_read(r->regmap, BD70528_REG_RTC_ALM_START, &alm, 167 - sizeof(alm)); 168 - if (ret) { 169 - dev_err(dev, "Failed to read alarm regs\n"); 170 - return ret; 171 - } 172 - 173 - rtc2tm(&alm.data, &a->time); 174 - a->time.tm_mday = -1; 175 - a->time.tm_mon = -1; 176 - a->time.tm_year = -1; 177 - a->enabled = !(alm.alm_mask & BD70528_MASK_ALM_EN); 178 - a->pending = 0; 179 - 180 - return 0; 181 - } 182 - 183 - static int bd70528_set_time_locked(struct device *dev, struct rtc_time *t) 184 - { 185 - int ret, tmpret, old_states; 186 342 struct bd70528_rtc_data rtc_data; 187 343 struct bd70528_rtc *r = dev_get_drvdata(dev); 188 344 189 - ret = bd70528_disable_rtc_based_timers(r, &old_states); 190 - if (ret) 191 - return ret; 192 - 193 - tmpret = regmap_bulk_read(r->regmap, r->reg_time_start, &rtc_data, 194 - sizeof(rtc_data)); 195 - if (tmpret) { 345 + ret = regmap_bulk_read(r->regmap, r->reg_time_start, &rtc_data, 346 + sizeof(rtc_data)); 347 + if (ret) { 196 348 dev_err(dev, "Failed to read RTC time registers\n"); 197 - goto renable_out; 349 + return ret; 198 350 } 199 351 tm2rtc(t, &rtc_data); 200 352 201 - tmpret = regmap_bulk_write(r->regmap, r->reg_time_start, &rtc_data, 202 - sizeof(rtc_data)); 203 - if (tmpret) { 353 + ret = regmap_bulk_write(r->regmap, r->reg_time_start, &rtc_data, 354 + sizeof(rtc_data)); 355 + if (ret) 204 356 dev_err(dev, "Failed to set RTC time\n"); 205 - goto renable_out; 206 - } 207 357 208 - renable_out: 209 - ret = bd70528_re_enable_rtc_based_timers(r, old_states); 210 - if (tmpret) 211 - ret = tmpret; 212 - 213 - return ret; 214 - } 215 - 216 - static int bd71828_set_time(struct device *dev, struct rtc_time *t) 217 - { 218 - return bd70528_set_time_locked(dev, t); 219 - } 220 - 221 - static int bd70528_set_time(struct device *dev, struct rtc_time *t) 222 - { 223 - int ret; 224 - struct bd70528_rtc *r = dev_get_drvdata(dev); 225 - 226 - bd70528_wdt_lock(r->parent); 227 - ret = bd70528_set_time_locked(dev, t); 228 - bd70528_wdt_unlock(r->parent); 229 358 return ret; 230 359 } 231 360 ··· 198 427 return 0; 199 428 } 200 429 201 - static int bd70528_alm_enable(struct device *dev, unsigned int enabled) 202 - { 203 - int ret; 204 - unsigned int enableval = BD70528_MASK_ALM_EN; 205 - struct bd70528_rtc *r = dev_get_drvdata(dev); 206 - 207 - if (enabled) 208 - enableval = 0; 209 - 210 - bd70528_wdt_lock(r->parent); 211 - ret = bd70528_set_wake(r->parent, enabled, NULL); 212 - if (ret) { 213 - dev_err(dev, "Failed to change wake state\n"); 214 - goto out_unlock; 215 - } 216 - ret = regmap_update_bits(r->regmap, BD70528_REG_RTC_ALM_MASK, 217 - BD70528_MASK_ALM_EN, enableval); 218 - if (ret) 219 - dev_err(dev, "Failed to change alarm state\n"); 220 - 221 - out_unlock: 222 - bd70528_wdt_unlock(r->parent); 223 - return ret; 224 - } 225 - 226 430 static int bd71828_alm_enable(struct device *dev, unsigned int enabled) 227 431 { 228 432 int ret; ··· 215 469 216 470 return ret; 217 471 } 218 - 219 - static const struct rtc_class_ops bd70528_rtc_ops = { 220 - .read_time = bd70528_get_time, 221 - .set_time = bd70528_set_time, 222 - .read_alarm = bd70528_read_alarm, 223 - .set_alarm = bd70528_set_alarm, 224 - .alarm_irq_enable = bd70528_alm_enable, 225 - }; 226 472 227 473 static const struct rtc_class_ops bd71828_rtc_ops = { 228 474 .read_time = bd70528_get_time, ··· 241 503 struct rtc_device *rtc; 242 504 int irq; 243 505 unsigned int hr; 244 - bool enable_main_irq = false; 245 506 u8 hour_reg; 246 507 enum rohm_chip_type chip = platform_get_device_id(pdev)->driver_data; 247 508 ··· 255 518 } 256 519 257 520 bd_rtc->dev = &pdev->dev; 521 + rtc_ops = &bd71828_rtc_ops; 258 522 259 523 switch (chip) { 260 - case ROHM_CHIP_TYPE_BD70528: 261 - bd_rtc->parent = dev_get_drvdata(pdev->dev.parent); 262 - if (!bd_rtc->parent) { 263 - dev_err(&pdev->dev, "No MFD data\n"); 264 - return -EINVAL; 265 - } 266 - irq_name = "bd70528-rtc-alm"; 267 - bd_rtc->has_rtc_timers = true; 268 - bd_rtc->reg_time_start = BD70528_REG_RTC_START; 269 - hour_reg = BD70528_REG_RTC_HOUR; 270 - enable_main_irq = true; 271 - rtc_ops = &bd70528_rtc_ops; 272 - break; 273 524 case ROHM_CHIP_TYPE_BD71815: 274 525 irq_name = "bd71815-rtc-alm-0"; 275 526 bd_rtc->reg_time_start = BD71815_REG_RTC_START; ··· 274 549 */ 275 550 bd_rtc->bd718xx_alm_block_start = BD71815_REG_RTC_ALM_START; 276 551 hour_reg = BD71815_REG_HOUR; 277 - rtc_ops = &bd71828_rtc_ops; 278 552 break; 279 553 case ROHM_CHIP_TYPE_BD71828: 280 554 irq_name = "bd71828-rtc-alm-0"; 281 555 bd_rtc->reg_time_start = BD71828_REG_RTC_START; 282 556 bd_rtc->bd718xx_alm_block_start = BD71828_REG_RTC_ALM_START; 283 557 hour_reg = BD71828_REG_RTC_HOUR; 284 - rtc_ops = &bd71828_rtc_ops; 285 558 break; 286 559 default: 287 560 dev_err(&pdev->dev, "Unknown chip\n"); ··· 334 611 if (ret) 335 612 return ret; 336 613 337 - /* 338 - * BD70528 irq controller is not touching the main mask register. 339 - * So enable the RTC block interrupts at main level. We can just 340 - * leave them enabled as irq-controller should disable irqs 341 - * from sub-registers when IRQ is disabled or freed. 342 - */ 343 - if (enable_main_irq) { 344 - ret = regmap_update_bits(bd_rtc->regmap, 345 - BD70528_REG_INT_MAIN_MASK, 346 - BD70528_INT_RTC_MASK, 0); 347 - if (ret) { 348 - dev_err(&pdev->dev, "Failed to enable RTC interrupts\n"); 349 - return ret; 350 - } 351 - } 352 - 353 614 return devm_rtc_register_device(rtc); 354 615 } 355 616 356 617 static const struct platform_device_id bd718x7_rtc_id[] = { 357 - { "bd70528-rtc", ROHM_CHIP_TYPE_BD70528 }, 358 618 { "bd71828-rtc", ROHM_CHIP_TYPE_BD71828 }, 359 619 { "bd71815-rtc", ROHM_CHIP_TYPE_BD71815 }, 360 620 { }, ··· 355 649 module_platform_driver(bd70528_rtc); 356 650 357 651 MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>"); 358 - MODULE_DESCRIPTION("ROHM BD70528 and BD71828 PMIC RTC driver"); 652 + MODULE_DESCRIPTION("ROHM BD71828 and BD71815 PMIC RTC driver"); 359 653 MODULE_LICENSE("GPL"); 360 654 MODULE_ALIAS("platform:bd70528-rtc");

+2 -5

drivers/rtc/rtc-ds1374.c

··· 1 + // SPDX-License-Identifier: GPL-2.0-only 1 2 /* 2 3 * RTC client/driver for the Maxim/Dallas DS1374 Real-Time Clock over I2C 3 4 * ··· 7 6 * 8 7 * Copyright (C) 2014 Rose Technology 9 8 * Copyright (C) 2006-2007 Freescale Semiconductor 10 - * 11 - * 2005 (c) MontaVista Software, Inc. This file is licensed under 12 - * the terms of the GNU General Public License version 2. This program 13 - * is licensed "as is" without any warranty of any kind, whether express 14 - * or implied. 9 + * Copyright (c) 2005 MontaVista Software, Inc. 15 10 */ 16 11 /* 17 12 * It would be more efficient to use i2c msgs/i2c_transfer directly but, as

-1

drivers/rtc/rtc-efi.c

··· 280 280 281 281 module_platform_driver_probe(efi_rtc_driver, efi_rtc_probe); 282 282 283 - MODULE_ALIAS("platform:rtc-efi"); 284 283 MODULE_AUTHOR("dann frazier <dannf@dannf.org>"); 285 284 MODULE_LICENSE("GPL"); 286 285 MODULE_DESCRIPTION("EFI RTC driver");

+4

drivers/rtc/rtc-imxdi.c

··· 24 24 #include <linux/delay.h> 25 25 #include <linux/module.h> 26 26 #include <linux/platform_device.h> 27 + #include <linux/pm_wakeirq.h> 27 28 #include <linux/rtc.h> 28 29 #include <linux/sched.h> 29 30 #include <linux/spinlock.h> ··· 811 810 } 812 811 813 812 platform_set_drvdata(pdev, imxdi); 813 + 814 + device_init_wakeup(&pdev->dev, true); 815 + dev_pm_set_wake_irq(&pdev->dev, norm_irq); 814 816 815 817 imxdi->rtc->ops = &dryice_rtc_ops; 816 818 imxdi->rtc->range_max = U32_MAX;

+20 -12

drivers/rtc/rtc-m41t80.c

··· 544 544 { 545 545 struct i2c_client *client = m41t80->client; 546 546 struct device_node *node = client->dev.of_node; 547 + struct device_node *fixed_clock; 547 548 struct clk *clk; 548 549 struct clk_init_data init; 549 550 int ret; 551 + 552 + fixed_clock = of_get_child_by_name(node, "clock"); 553 + if (fixed_clock) { 554 + /* 555 + * skip registering square wave clock when a fixed 556 + * clock has been registered. The fixed clock is 557 + * registered automatically when being referenced. 558 + */ 559 + of_node_put(fixed_clock); 560 + return 0; 561 + } 550 562 551 563 /* First disable the clock */ 552 564 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); ··· 611 599 static int boot_flag; 612 600 613 601 /** 614 - * wdt_ping: 615 - * 616 - * Reload counter one with the watchdog timeout. We don't bother reloading 617 - * the cascade counter. 602 + * wdt_ping - Reload counter one with the watchdog timeout. 603 + * We don't bother reloading the cascade counter. 618 604 */ 619 605 static void wdt_ping(void) 620 606 { ··· 648 638 } 649 639 650 640 /** 651 - * wdt_disable: 652 - * 653 - * disables watchdog. 641 + * wdt_disable - disables watchdog. 654 642 */ 655 643 static void wdt_disable(void) 656 644 { ··· 685 677 } 686 678 687 679 /** 688 - * wdt_write: 680 + * wdt_write - write to watchdog. 689 681 * @file: file handle to the watchdog 690 682 * @buf: buffer to write (unused as data does not matter here 691 683 * @count: count of bytes ··· 711 703 } 712 704 713 705 /** 714 - * wdt_ioctl: 706 + * wdt_ioctl - ioctl handler to set watchdog. 715 707 * @file: file handle to the device 716 708 * @cmd: watchdog command 717 709 * @arg: argument pointer ··· 786 778 } 787 779 788 780 /** 789 - * wdt_open: 781 + * wdt_open - open a watchdog. 790 782 * @inode: inode of device 791 783 * @file: file handle to device 792 784 * ··· 810 802 } 811 803 812 804 /** 813 - * wdt_close: 805 + * wdt_release - release a watchdog. 814 806 * @inode: inode to board 815 807 * @file: file handle to board 816 808 * ··· 823 815 } 824 816 825 817 /** 826 - * notify_sys: 818 + * wdt_notify_sys - notify to watchdog. 827 819 * @this: our notifier block 828 820 * @code: the event being reported 829 821 * @unused: unused

+3 -5

drivers/rtc/rtc-max6900.c

··· 1 + // SPDX-License-Identifier: GPL-2.0-only 1 2 /* 2 3 * rtc class driver for the Maxim MAX6900 chip 4 + * 5 + * Copyright (c) 2007 MontaVista, Software, Inc. 3 6 * 4 7 * Author: Dale Farnsworth <dale@farnsworth.org> 5 8 * 6 9 * based on previously existing rtc class drivers 7 - * 8 - * 2007 (c) MontaVista, Software, Inc. This file is licensed under 9 - * the terms of the GNU General Public License version 2. This program 10 - * is licensed "as is" without any warranty of any kind, whether express 11 - * or implied. 12 10 */ 13 11 14 12 #include <linux/module.h>

+2 -2

drivers/rtc/rtc-max77686.c

··· 717 717 718 718 add_rtc_irq: 719 719 ret = regmap_add_irq_chip(info->rtc_regmap, info->rtc_irq, 720 - IRQF_TRIGGER_FALLING | IRQF_ONESHOT | 721 - IRQF_SHARED, 0, info->drv_data->rtc_irq_chip, 720 + IRQF_ONESHOT | IRQF_SHARED, 721 + 0, info->drv_data->rtc_irq_chip, 722 722 &info->rtc_irq_data); 723 723 if (ret < 0) { 724 724 dev_err(info->dev, "Failed to add RTC irq chip: %d\n", ret);

+1

drivers/rtc/rtc-mxc_v2.c

··· 372 372 { .compatible = "fsl,imx53-rtc", }, 373 373 {} 374 374 }; 375 + MODULE_DEVICE_TABLE(of, mxc_ids); 375 376 376 377 static struct platform_driver mxc_rtc_driver = { 377 378 .driver = {

+1 -14

drivers/rtc/rtc-palmas.c

··· 1 + // SPDX-License-Identifier: GPL-2.0-only 1 2 /* 2 3 * rtc-palmas.c -- Palmas Real Time Clock driver. 3 4 ··· 8 7 * Copyright (c) 2012, NVIDIA Corporation. 9 8 * 10 9 * Author: Laxman Dewangan <ldewangan@nvidia.com> 11 - * 12 - * This program is free software; you can redistribute it and/or 13 - * modify it under the terms of the GNU General Public License as 14 - * published by the Free Software Foundation version 2. 15 - * 16 - * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, 17 - * whether express or implied; without even the implied warranty of 18 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 - * General Public License for more details. 20 - * 21 - * You should have received a copy of the GNU General Public License 22 - * along with this program; if not, write to the Free Software 23 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 24 - * 02111-1307, USA 25 10 */ 26 11 27 12 #include <linux/bcd.h>

+136 -62

drivers/rtc/rtc-pcf2127.c

··· 10 10 * 11 11 * based on the other drivers in this same directory. 12 12 * 13 - * Datasheet: http://cache.nxp.com/documents/data_sheet/PCF2127.pdf 13 + * Datasheet: https://www.nxp.com/docs/en/data-sheet/PCF2127.pdf 14 14 */ 15 15 16 16 #include <linux/i2c.h> ··· 94 94 #define PCF2127_WD_VAL_MAX 255 95 95 #define PCF2127_WD_VAL_DEFAULT 60 96 96 97 + /* Mask for currently enabled interrupts */ 98 + #define PCF2127_CTRL1_IRQ_MASK (PCF2127_BIT_CTRL1_TSF1) 99 + #define PCF2127_CTRL2_IRQ_MASK ( \ 100 + PCF2127_BIT_CTRL2_AF | \ 101 + PCF2127_BIT_CTRL2_WDTF | \ 102 + PCF2127_BIT_CTRL2_TSF2) 103 + 97 104 struct pcf2127 { 98 105 struct rtc_device *rtc; 99 106 struct watchdog_device wdd; 100 107 struct regmap *regmap; 108 + time64_t ts; 109 + bool ts_valid; 110 + bool irq_enabled; 101 111 }; 102 112 103 113 /* ··· 444 434 return pcf2127_rtc_alarm_irq_enable(dev, alrm->enabled); 445 435 } 446 436 437 + /* 438 + * This function reads ctrl2 register, caller is responsible for calling 439 + * pcf2127_wdt_active_ping() 440 + */ 441 + static int pcf2127_rtc_ts_read(struct device *dev, time64_t *ts) 442 + { 443 + struct pcf2127 *pcf2127 = dev_get_drvdata(dev); 444 + struct rtc_time tm; 445 + int ret; 446 + unsigned char data[25]; 447 + 448 + ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL1, data, 449 + sizeof(data)); 450 + if (ret) { 451 + dev_err(dev, "%s: read error ret=%d\n", __func__, ret); 452 + return ret; 453 + } 454 + 455 + dev_dbg(dev, 456 + "%s: raw data is cr1=%02x, cr2=%02x, cr3=%02x, ts_sc=%02x, ts_mn=%02x, ts_hr=%02x, ts_dm=%02x, ts_mo=%02x, ts_yr=%02x\n", 457 + __func__, data[PCF2127_REG_CTRL1], data[PCF2127_REG_CTRL2], 458 + data[PCF2127_REG_CTRL3], data[PCF2127_REG_TS_SC], 459 + data[PCF2127_REG_TS_MN], data[PCF2127_REG_TS_HR], 460 + data[PCF2127_REG_TS_DM], data[PCF2127_REG_TS_MO], 461 + data[PCF2127_REG_TS_YR]); 462 + 463 + tm.tm_sec = bcd2bin(data[PCF2127_REG_TS_SC] & 0x7F); 464 + tm.tm_min = bcd2bin(data[PCF2127_REG_TS_MN] & 0x7F); 465 + tm.tm_hour = bcd2bin(data[PCF2127_REG_TS_HR] & 0x3F); 466 + tm.tm_mday = bcd2bin(data[PCF2127_REG_TS_DM] & 0x3F); 467 + /* TS_MO register (month) value range: 1-12 */ 468 + tm.tm_mon = bcd2bin(data[PCF2127_REG_TS_MO] & 0x1F) - 1; 469 + tm.tm_year = bcd2bin(data[PCF2127_REG_TS_YR]); 470 + if (tm.tm_year < 70) 471 + tm.tm_year += 100; /* assume we are in 1970...2069 */ 472 + 473 + ret = rtc_valid_tm(&tm); 474 + if (ret) { 475 + dev_err(dev, "Invalid timestamp. ret=%d\n", ret); 476 + return ret; 477 + } 478 + 479 + *ts = rtc_tm_to_time64(&tm); 480 + return 0; 481 + }; 482 + 483 + static void pcf2127_rtc_ts_snapshot(struct device *dev) 484 + { 485 + struct pcf2127 *pcf2127 = dev_get_drvdata(dev); 486 + int ret; 487 + 488 + /* Let userspace read the first timestamp */ 489 + if (pcf2127->ts_valid) 490 + return; 491 + 492 + ret = pcf2127_rtc_ts_read(dev, &pcf2127->ts); 493 + if (!ret) 494 + pcf2127->ts_valid = true; 495 + } 496 + 447 497 static irqreturn_t pcf2127_rtc_irq(int irq, void *dev) 448 498 { 449 499 struct pcf2127 *pcf2127 = dev_get_drvdata(dev); 450 - unsigned int ctrl2 = 0; 500 + unsigned int ctrl1, ctrl2; 451 501 int ret = 0; 502 + 503 + ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL1, &ctrl1); 504 + if (ret) 505 + return IRQ_NONE; 452 506 453 507 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2); 454 508 if (ret) 455 509 return IRQ_NONE; 456 510 457 - if (!(ctrl2 & PCF2127_BIT_CTRL2_AF)) 511 + if (!(ctrl1 & PCF2127_CTRL1_IRQ_MASK || ctrl2 & PCF2127_CTRL2_IRQ_MASK)) 458 512 return IRQ_NONE; 459 513 460 - regmap_write(pcf2127->regmap, PCF2127_REG_CTRL2, 461 - ctrl2 & ~(PCF2127_BIT_CTRL2_AF | PCF2127_BIT_CTRL2_WDTF)); 514 + if (ctrl1 & PCF2127_BIT_CTRL1_TSF1 || ctrl2 & PCF2127_BIT_CTRL2_TSF2) 515 + pcf2127_rtc_ts_snapshot(dev); 462 516 463 - rtc_update_irq(pcf2127->rtc, 1, RTC_IRQF | RTC_AF); 517 + if (ctrl1 & PCF2127_CTRL1_IRQ_MASK) 518 + regmap_write(pcf2127->regmap, PCF2127_REG_CTRL1, 519 + ctrl1 & ~PCF2127_CTRL1_IRQ_MASK); 520 + 521 + if (ctrl2 & PCF2127_CTRL2_IRQ_MASK) 522 + regmap_write(pcf2127->regmap, PCF2127_REG_CTRL2, 523 + ctrl2 & ~PCF2127_CTRL2_IRQ_MASK); 524 + 525 + if (ctrl2 & PCF2127_BIT_CTRL2_AF) 526 + rtc_update_irq(pcf2127->rtc, 1, RTC_IRQF | RTC_AF); 464 527 465 528 pcf2127_wdt_active_ping(&pcf2127->wdd); 466 529 ··· 558 475 struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent); 559 476 int ret; 560 477 561 - ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL1, 562 - PCF2127_BIT_CTRL1_TSF1, 0); 563 - if (ret) { 564 - dev_err(dev, "%s: update ctrl1 ret=%d\n", __func__, ret); 565 - return ret; 566 - } 478 + if (pcf2127->irq_enabled) { 479 + pcf2127->ts_valid = false; 480 + } else { 481 + ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL1, 482 + PCF2127_BIT_CTRL1_TSF1, 0); 483 + if (ret) { 484 + dev_err(dev, "%s: update ctrl1 ret=%d\n", __func__, ret); 485 + return ret; 486 + } 567 487 568 - ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2, 569 - PCF2127_BIT_CTRL2_TSF2, 0); 570 - if (ret) { 571 - dev_err(dev, "%s: update ctrl2 ret=%d\n", __func__, ret); 572 - return ret; 573 - } 488 + ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2, 489 + PCF2127_BIT_CTRL2_TSF2, 0); 490 + if (ret) { 491 + dev_err(dev, "%s: update ctrl2 ret=%d\n", __func__, ret); 492 + return ret; 493 + } 574 494 575 - ret = pcf2127_wdt_active_ping(&pcf2127->wdd); 576 - if (ret) 577 - return ret; 495 + ret = pcf2127_wdt_active_ping(&pcf2127->wdd); 496 + if (ret) 497 + return ret; 498 + } 578 499 579 500 return count; 580 501 }; ··· 587 500 struct device_attribute *attr, char *buf) 588 501 { 589 502 struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent); 590 - struct rtc_time tm; 503 + unsigned int ctrl1, ctrl2; 591 504 int ret; 592 - unsigned char data[25]; 505 + time64_t ts; 593 506 594 - ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL1, data, 595 - sizeof(data)); 596 - if (ret) { 597 - dev_err(dev, "%s: read error ret=%d\n", __func__, ret); 598 - return ret; 507 + if (pcf2127->irq_enabled) { 508 + if (!pcf2127->ts_valid) 509 + return 0; 510 + ts = pcf2127->ts; 511 + } else { 512 + ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL1, &ctrl1); 513 + if (ret) 514 + return 0; 515 + 516 + ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2); 517 + if (ret) 518 + return 0; 519 + 520 + if (!(ctrl1 & PCF2127_BIT_CTRL1_TSF1) && 521 + !(ctrl2 & PCF2127_BIT_CTRL2_TSF2)) 522 + return 0; 523 + 524 + ret = pcf2127_rtc_ts_read(dev->parent, &ts); 525 + if (ret) 526 + return 0; 527 + 528 + ret = pcf2127_wdt_active_ping(&pcf2127->wdd); 529 + if (ret) 530 + return ret; 599 531 } 600 - 601 - dev_dbg(dev, 602 - "%s: raw data is cr1=%02x, cr2=%02x, cr3=%02x, ts_sc=%02x, " 603 - "ts_mn=%02x, ts_hr=%02x, ts_dm=%02x, ts_mo=%02x, ts_yr=%02x\n", 604 - __func__, data[PCF2127_REG_CTRL1], data[PCF2127_REG_CTRL2], 605 - data[PCF2127_REG_CTRL3], data[PCF2127_REG_TS_SC], 606 - data[PCF2127_REG_TS_MN], data[PCF2127_REG_TS_HR], 607 - data[PCF2127_REG_TS_DM], data[PCF2127_REG_TS_MO], 608 - data[PCF2127_REG_TS_YR]); 609 - 610 - ret = pcf2127_wdt_active_ping(&pcf2127->wdd); 611 - if (ret) 612 - return ret; 613 - 614 - if (!(data[PCF2127_REG_CTRL1] & PCF2127_BIT_CTRL1_TSF1) && 615 - !(data[PCF2127_REG_CTRL2] & PCF2127_BIT_CTRL2_TSF2)) 616 - return 0; 617 - 618 - tm.tm_sec = bcd2bin(data[PCF2127_REG_TS_SC] & 0x7F); 619 - tm.tm_min = bcd2bin(data[PCF2127_REG_TS_MN] & 0x7F); 620 - tm.tm_hour = bcd2bin(data[PCF2127_REG_TS_HR] & 0x3F); 621 - tm.tm_mday = bcd2bin(data[PCF2127_REG_TS_DM] & 0x3F); 622 - /* TS_MO register (month) value range: 1-12 */ 623 - tm.tm_mon = bcd2bin(data[PCF2127_REG_TS_MO] & 0x1F) - 1; 624 - tm.tm_year = bcd2bin(data[PCF2127_REG_TS_YR]); 625 - if (tm.tm_year < 70) 626 - tm.tm_year += 100; /* assume we are in 1970...2069 */ 627 - 628 - ret = rtc_valid_tm(&tm); 629 - if (ret) 630 - return ret; 631 - 632 - return sprintf(buf, "%llu\n", 633 - (unsigned long long)rtc_tm_to_time64(&tm)); 532 + return sprintf(buf, "%llu\n", (unsigned long long)ts); 634 533 }; 635 534 636 535 static DEVICE_ATTR_RW(timestamp0); ··· 667 594 dev_err(dev, "failed to request alarm irq\n"); 668 595 return ret; 669 596 } 597 + pcf2127->irq_enabled = true; 670 598 } 671 599 672 600 if (alarm_irq > 0 || device_property_read_bool(dev, "wakeup-source")) {

+3 -3

drivers/rtc/rtc-pcf85063.c

··· 21 21 /* 22 22 * Information for this driver was pulled from the following datasheets. 23 23 * 24 - * https://www.nxp.com/documents/data_sheet/PCF85063A.pdf 25 - * https://www.nxp.com/documents/data_sheet/PCF85063TP.pdf 24 + * https://www.nxp.com/docs/en/data-sheet/PCF85063A.pdf 25 + * https://www.nxp.com/docs/en/data-sheet/PCF85063TP.pdf 26 26 * 27 - * PCF85063A -- Rev. 6 — 18 November 2015 27 + * PCF85063A -- Rev. 7 — 30 March 2018 28 28 * PCF85063TP -- Rev. 4 — 6 May 2015 29 29 * 30 30 * https://www.microcrystal.com/fileadmin/Media/Products/RTC/App.Manual/RV-8263-C7_App-Manual.pdf

+68 -68

drivers/rtc/rtc-pcf8523.c

··· 10 10 #include <linux/of.h> 11 11 #include <linux/pm_wakeirq.h> 12 12 13 - #define REG_CONTROL1 0x00 14 - #define REG_CONTROL1_CAP_SEL BIT(7) 15 - #define REG_CONTROL1_STOP BIT(5) 16 - #define REG_CONTROL1_AIE BIT(1) 13 + #define PCF8523_REG_CONTROL1 0x00 14 + #define PCF8523_CONTROL1_CAP_SEL BIT(7) 15 + #define PCF8523_CONTROL1_STOP BIT(5) 16 + #define PCF8523_CONTROL1_AIE BIT(1) 17 17 18 - #define REG_CONTROL2 0x01 19 - #define REG_CONTROL2_AF BIT(3) 18 + #define PCF8523_REG_CONTROL2 0x01 19 + #define PCF8523_CONTROL2_AF BIT(3) 20 20 21 - #define REG_CONTROL3 0x02 22 - #define REG_CONTROL3_PM_BLD BIT(7) /* battery low detection disabled */ 23 - #define REG_CONTROL3_PM_VDD BIT(6) /* switch-over disabled */ 24 - #define REG_CONTROL3_PM_DSM BIT(5) /* direct switching mode */ 25 - #define REG_CONTROL3_PM_MASK 0xe0 26 - #define REG_CONTROL3_BLF BIT(2) /* battery low bit, read-only */ 21 + #define PCF8523_REG_CONTROL3 0x02 22 + #define PCF8523_CONTROL3_PM_BLD BIT(7) /* battery low detection disabled */ 23 + #define PCF8523_CONTROL3_PM_VDD BIT(6) /* switch-over disabled */ 24 + #define PCF8523_CONTROL3_PM_DSM BIT(5) /* direct switching mode */ 25 + #define PCF8523_CONTROL3_PM_MASK 0xe0 26 + #define PCF8523_CONTROL3_BLF BIT(2) /* battery low bit, read-only */ 27 27 28 - #define REG_SECONDS 0x03 29 - #define REG_SECONDS_OS BIT(7) 28 + #define PCF8523_REG_SECONDS 0x03 29 + #define PCF8523_SECONDS_OS BIT(7) 30 30 31 - #define REG_MINUTES 0x04 32 - #define REG_HOURS 0x05 33 - #define REG_DAYS 0x06 34 - #define REG_WEEKDAYS 0x07 35 - #define REG_MONTHS 0x08 36 - #define REG_YEARS 0x09 31 + #define PCF8523_REG_MINUTES 0x04 32 + #define PCF8523_REG_HOURS 0x05 33 + #define PCF8523_REG_DAYS 0x06 34 + #define PCF8523_REG_WEEKDAYS 0x07 35 + #define PCF8523_REG_MONTHS 0x08 36 + #define PCF8523_REG_YEARS 0x09 37 37 38 - #define REG_MINUTE_ALARM 0x0a 39 - #define REG_HOUR_ALARM 0x0b 40 - #define REG_DAY_ALARM 0x0c 41 - #define REG_WEEKDAY_ALARM 0x0d 38 + #define PCF8523_REG_MINUTE_ALARM 0x0a 39 + #define PCF8523_REG_HOUR_ALARM 0x0b 40 + #define PCF8523_REG_DAY_ALARM 0x0c 41 + #define PCF8523_REG_WEEKDAY_ALARM 0x0d 42 42 #define ALARM_DIS BIT(7) 43 43 44 - #define REG_OFFSET 0x0e 45 - #define REG_OFFSET_MODE BIT(7) 44 + #define PCF8523_REG_OFFSET 0x0e 45 + #define PCF8523_OFFSET_MODE BIT(7) 46 46 47 - #define REG_TMR_CLKOUT_CTRL 0x0f 47 + #define PCF8523_TMR_CLKOUT_CTRL 0x0f 48 48 49 49 struct pcf8523 { 50 50 struct rtc_device *rtc; ··· 99 99 u8 value; 100 100 int err; 101 101 102 - err = pcf8523_read(client, REG_CONTROL3, &value); 102 + err = pcf8523_read(client, PCF8523_REG_CONTROL3, &value); 103 103 if (err < 0) 104 104 return err; 105 105 106 - return !!(value & REG_CONTROL3_BLF); 106 + return !!(value & PCF8523_CONTROL3_BLF); 107 107 } 108 108 109 109 static int pcf8523_load_capacitance(struct i2c_client *client) ··· 112 112 u8 value; 113 113 int err; 114 114 115 - err = pcf8523_read(client, REG_CONTROL1, &value); 115 + err = pcf8523_read(client, PCF8523_REG_CONTROL1, &value); 116 116 if (err < 0) 117 117 return err; 118 118 ··· 126 126 load); 127 127 fallthrough; 128 128 case 12500: 129 - value |= REG_CONTROL1_CAP_SEL; 129 + value |= PCF8523_CONTROL1_CAP_SEL; 130 130 break; 131 131 case 7000: 132 - value &= ~REG_CONTROL1_CAP_SEL; 132 + value &= ~PCF8523_CONTROL1_CAP_SEL; 133 133 break; 134 134 } 135 135 136 - err = pcf8523_write(client, REG_CONTROL1, value); 136 + err = pcf8523_write(client, PCF8523_REG_CONTROL1, value); 137 137 138 138 return err; 139 139 } ··· 143 143 u8 value; 144 144 int err; 145 145 146 - err = pcf8523_read(client, REG_CONTROL3, &value); 146 + err = pcf8523_read(client, PCF8523_REG_CONTROL3, &value); 147 147 if (err < 0) 148 148 return err; 149 149 150 - value = (value & ~REG_CONTROL3_PM_MASK) | pm; 150 + value = (value & ~PCF8523_CONTROL3_PM_MASK) | pm; 151 151 152 - err = pcf8523_write(client, REG_CONTROL3, value); 152 + err = pcf8523_write(client, PCF8523_REG_CONTROL3, value); 153 153 if (err < 0) 154 154 return err; 155 155 ··· 162 162 u8 value; 163 163 int err; 164 164 165 - err = pcf8523_read(pcf8523->client, REG_CONTROL2, &value); 165 + err = pcf8523_read(pcf8523->client, PCF8523_REG_CONTROL2, &value); 166 166 if (err < 0) 167 167 return IRQ_HANDLED; 168 168 169 - if (value & REG_CONTROL2_AF) { 170 - value &= ~REG_CONTROL2_AF; 171 - pcf8523_write(pcf8523->client, REG_CONTROL2, value); 169 + if (value & PCF8523_CONTROL2_AF) { 170 + value &= ~PCF8523_CONTROL2_AF; 171 + pcf8523_write(pcf8523->client, PCF8523_REG_CONTROL2, value); 172 172 rtc_update_irq(pcf8523->rtc, 1, RTC_IRQF | RTC_AF); 173 173 174 174 return IRQ_HANDLED; ··· 182 182 u8 value; 183 183 int err; 184 184 185 - err = pcf8523_read(client, REG_CONTROL1, &value); 185 + err = pcf8523_read(client, PCF8523_REG_CONTROL1, &value); 186 186 if (err < 0) 187 187 return err; 188 188 189 - value |= REG_CONTROL1_STOP; 189 + value |= PCF8523_CONTROL1_STOP; 190 190 191 - err = pcf8523_write(client, REG_CONTROL1, value); 191 + err = pcf8523_write(client, PCF8523_REG_CONTROL1, value); 192 192 if (err < 0) 193 193 return err; 194 194 ··· 200 200 u8 value; 201 201 int err; 202 202 203 - err = pcf8523_read(client, REG_CONTROL1, &value); 203 + err = pcf8523_read(client, PCF8523_REG_CONTROL1, &value); 204 204 if (err < 0) 205 205 return err; 206 206 207 - value &= ~REG_CONTROL1_STOP; 207 + value &= ~PCF8523_CONTROL1_STOP; 208 208 209 - err = pcf8523_write(client, REG_CONTROL1, value); 209 + err = pcf8523_write(client, PCF8523_REG_CONTROL1, value); 210 210 if (err < 0) 211 211 return err; 212 212 ··· 216 216 static int pcf8523_rtc_read_time(struct device *dev, struct rtc_time *tm) 217 217 { 218 218 struct i2c_client *client = to_i2c_client(dev); 219 - u8 start = REG_SECONDS, regs[7]; 219 + u8 start = PCF8523_REG_SECONDS, regs[7]; 220 220 struct i2c_msg msgs[2]; 221 221 int err; 222 222 ··· 242 242 if (err < 0) 243 243 return err; 244 244 245 - if (regs[0] & REG_SECONDS_OS) 245 + if (regs[0] & PCF8523_SECONDS_OS) 246 246 return -EINVAL; 247 247 248 248 tm->tm_sec = bcd2bin(regs[0] & 0x7f); ··· 267 267 if (err < 0) 268 268 return err; 269 269 270 - regs[0] = REG_SECONDS; 271 - /* This will purposely overwrite REG_SECONDS_OS */ 270 + regs[0] = PCF8523_REG_SECONDS; 271 + /* This will purposely overwrite PCF8523_SECONDS_OS */ 272 272 regs[1] = bin2bcd(tm->tm_sec); 273 273 regs[2] = bin2bcd(tm->tm_min); 274 274 regs[3] = bin2bcd(tm->tm_hour); ··· 299 299 static int pcf8523_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *tm) 300 300 { 301 301 struct i2c_client *client = to_i2c_client(dev); 302 - u8 start = REG_MINUTE_ALARM, regs[4]; 302 + u8 start = PCF8523_REG_MINUTE_ALARM, regs[4]; 303 303 struct i2c_msg msgs[2]; 304 304 u8 value; 305 305 int err; ··· 324 324 tm->time.tm_mday = bcd2bin(regs[2] & 0x3F); 325 325 tm->time.tm_wday = bcd2bin(regs[3] & 0x7); 326 326 327 - err = pcf8523_read(client, REG_CONTROL1, &value); 327 + err = pcf8523_read(client, PCF8523_REG_CONTROL1, &value); 328 328 if (err < 0) 329 329 return err; 330 - tm->enabled = !!(value & REG_CONTROL1_AIE); 330 + tm->enabled = !!(value & PCF8523_CONTROL1_AIE); 331 331 332 - err = pcf8523_read(client, REG_CONTROL2, &value); 332 + err = pcf8523_read(client, PCF8523_REG_CONTROL2, &value); 333 333 if (err < 0) 334 334 return err; 335 - tm->pending = !!(value & REG_CONTROL2_AF); 335 + tm->pending = !!(value & PCF8523_CONTROL2_AF); 336 336 337 337 return 0; 338 338 } ··· 343 343 u8 value; 344 344 int err; 345 345 346 - err = pcf8523_read(client, REG_CONTROL1, &value); 346 + err = pcf8523_read(client, PCF8523_REG_CONTROL1, &value); 347 347 if (err < 0) 348 348 return err; 349 349 350 - value &= REG_CONTROL1_AIE; 350 + value &= PCF8523_CONTROL1_AIE; 351 351 352 352 if (enabled) 353 - value |= REG_CONTROL1_AIE; 353 + value |= PCF8523_CONTROL1_AIE; 354 354 355 - err = pcf8523_write(client, REG_CONTROL1, value); 355 + err = pcf8523_write(client, PCF8523_REG_CONTROL1, value); 356 356 if (err < 0) 357 357 return err; 358 358 ··· 370 370 if (err) 371 371 return err; 372 372 373 - err = pcf8523_write(client, REG_CONTROL2, 0); 373 + err = pcf8523_write(client, PCF8523_REG_CONTROL2, 0); 374 374 if (err < 0) 375 375 return err; 376 376 ··· 382 382 rtc_time64_to_tm(alarm_time, &tm->time); 383 383 } 384 384 385 - regs[0] = REG_MINUTE_ALARM; 385 + regs[0] = PCF8523_REG_MINUTE_ALARM; 386 386 regs[1] = bin2bcd(tm->time.tm_min); 387 387 regs[2] = bin2bcd(tm->time.tm_hour); 388 388 regs[3] = bin2bcd(tm->time.tm_mday); ··· 418 418 if (ret) 419 419 flags |= RTC_VL_BACKUP_LOW; 420 420 421 - ret = pcf8523_read(client, REG_SECONDS, &value); 421 + ret = pcf8523_read(client, PCF8523_REG_SECONDS, &value); 422 422 if (ret < 0) 423 423 return ret; 424 424 425 - if (value & REG_SECONDS_OS) 425 + if (value & PCF8523_SECONDS_OS) 426 426 flags |= RTC_VL_DATA_INVALID; 427 427 428 428 return put_user(flags, (unsigned int __user *)arg); ··· 442 442 u8 value; 443 443 s8 val; 444 444 445 - err = pcf8523_read(client, REG_OFFSET, &value); 445 + err = pcf8523_read(client, PCF8523_REG_OFFSET, &value); 446 446 if (err < 0) 447 447 return err; 448 448 449 449 /* sign extend the 7-bit offset value */ 450 450 val = value << 1; 451 - *offset = (value & REG_OFFSET_MODE ? 4069 : 4340) * (val >> 1); 451 + *offset = (value & PCF8523_OFFSET_MODE ? 4069 : 4340) * (val >> 1); 452 452 453 453 return 0; 454 454 } ··· 465 465 if (abs(reg_m0 * 4340 - offset) < abs(reg_m1 * 4069 - offset)) 466 466 value = reg_m0 & 0x7f; 467 467 else 468 - value = (reg_m1 & 0x7f) | REG_OFFSET_MODE; 468 + value = (reg_m1 & 0x7f) | PCF8523_OFFSET_MODE; 469 469 470 - return pcf8523_write(client, REG_OFFSET, value); 470 + return pcf8523_write(client, PCF8523_REG_OFFSET, value); 471 471 } 472 472 473 473 static const struct rtc_class_ops pcf8523_rtc_ops = { ··· 519 519 rtc->uie_unsupported = 1; 520 520 521 521 if (client->irq > 0) { 522 - err = pcf8523_write(client, REG_TMR_CLKOUT_CTRL, 0x38); 522 + err = pcf8523_write(client, PCF8523_TMR_CLKOUT_CTRL, 0x38); 523 523 if (err < 0) 524 524 return err; 525 525

+1 -1

drivers/rtc/rtc-pcf8563.c

··· 8 8 * 9 9 * based on the other drivers in this same directory. 10 10 * 11 - * http://www.semiconductors.philips.com/acrobat/datasheets/PCF8563-04.pdf 11 + * https://www.nxp.com/docs/en/data-sheet/PCF8563.pdf 12 12 */ 13 13 14 14 #include <linux/clk-provider.h>

+1 -2

drivers/rtc/rtc-rtd119x.c

··· 1 + // SPDX-License-Identifier: GPL-2.0+ 1 2 /* 2 3 * Realtek RTD129x RTC 3 4 * 4 5 * Copyright (c) 2017 Andreas Färber 5 - * 6 - * SPDX-License-Identifier: GPL-2.0+ 7 6 */ 8 7 9 8 #include <linux/clk.h>

+1 -3

drivers/rtc/rtc-s5m.c

··· 488 488 489 489 dev_dbg(dev, "%s: %ptR(%d)\n", __func__, &alrm->time, alrm->time.tm_wday); 490 490 491 - ret = s5m_check_peding_alarm_interrupt(info, alrm); 492 - 493 - return 0; 491 + return s5m_check_peding_alarm_interrupt(info, alrm); 494 492 } 495 493 496 494 static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)

+1 -1

drivers/rtc/rtc-sc27xx.c

+1 -4

drivers/rtc/rtc-spear.c

··· 1 + // SPDX-License-Identifier: GPL-2.0-only 1 2 /* 2 3 * drivers/rtc/rtc-spear.c 3 4 * 4 5 * Copyright (C) 2010 ST Microelectronics 5 6 * Rajeev Kumar<rajeev-dlh.kumar@st.com> 6 - * 7 - * This file is licensed under the terms of the GNU General Public 8 - * License version 2. This program is licensed "as is" without any 9 - * warranty of any kind, whether express or implied. 10 7 */ 11 8 12 9 #include <linux/bcd.h>

+4 -2

drivers/rtc/rtc-stm32.c

··· 754 754 755 755 ret = clk_prepare_enable(rtc->rtc_ck); 756 756 if (ret) 757 - goto err; 757 + goto err_no_rtc_ck; 758 758 759 759 if (rtc->data->need_dbp) 760 760 regmap_update_bits(rtc->dbp, rtc->dbp_reg, ··· 830 830 } 831 831 832 832 return 0; 833 + 833 834 err: 835 + clk_disable_unprepare(rtc->rtc_ck); 836 + err_no_rtc_ck: 834 837 if (rtc->data->has_pclk) 835 838 clk_disable_unprepare(rtc->pclk); 836 - clk_disable_unprepare(rtc->rtc_ck); 837 839 838 840 if (rtc->data->need_dbp) 839 841 regmap_update_bits(rtc->dbp, rtc->dbp_reg, rtc->dbp_mask, 0);

+1 -14

drivers/rtc/rtc-tps6586x.c

··· 1 + // SPDX-License-Identifier: GPL-2.0-only 1 2 /* 2 3 * rtc-tps6586x.c: RTC driver for TI PMIC TPS6586X 3 4 * 4 5 * Copyright (c) 2012, NVIDIA Corporation. 5 6 * 6 7 * Author: Laxman Dewangan <ldewangan@nvidia.com> 7 - * 8 - * This program is free software; you can redistribute it and/or 9 - * modify it under the terms of the GNU General Public License as 10 - * published by the Free Software Foundation version 2. 11 - * 12 - * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, 13 - * whether express or implied; without even the implied warranty of 14 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 - * General Public License for more details. 16 - * 17 - * You should have received a copy of the GNU General Public License 18 - * along with this program; if not, write to the Free Software 19 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 20 - * 02111-1307, USA 21 8 */ 22 9 23 10 #include <linux/device.h>

+1 -14

drivers/rtc/rtc-tps80031.c

··· 1 + // SPDX-License-Identifier: GPL-2.0-only 1 2 /* 2 3 * rtc-tps80031.c -- TI TPS80031/TPS80032 RTC driver 3 4 * ··· 8 7 * Copyright (c) 2012, NVIDIA Corporation. 9 8 * 10 9 * Author: Laxman Dewangan <ldewangan@nvidia.com> 11 - * 12 - * This program is free software; you can redistribute it and/or 13 - * modify it under the terms of the GNU General Public License as 14 - * published by the Free Software Foundation version 2. 15 - * 16 - * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, 17 - * whether express or implied; without even the implied warranty of 18 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 - * General Public License for more details. 20 - * 21 - * You should have received a copy of the GNU General Public License 22 - * along with this program; if not, write to the Free Software 23 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 24 - * 02111-1307, USA 25 10 */ 26 11 27 12 #include <linux/bcd.h>

+1 -1

drivers/rtc/rtc-v3020.c

··· 282 282 { 283 283 struct v3020_platform_data *pdata = dev_get_platdata(&pdev->dev); 284 284 struct v3020 *chip; 285 - int retval = -EBUSY; 285 + int retval; 286 286 int i; 287 287 288 288 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);

+1 -1

drivers/rtc/sysfs.c

··· 102 102 static DEVICE_ATTR_RW(max_user_freq); 103 103 104 104 /** 105 - * rtc_sysfs_show_hctosys - indicate if the given RTC set the system time 105 + * hctosys_show - indicate if the given RTC set the system time 106 106 * @dev: The device that the attribute belongs to. 107 107 * @attr: The attribute being read. 108 108 * @buf: The result buffer.

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