Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
ASoC: fsl: fix mixer-test failures
Shengjiu Wang <shengjiu.wang@nxp.com> says:
Fix mixer-test failures. Mostly the issues are that event is not
generated in put operation.
+168
-49
+88
-35
sound/soc/fsl/fsl_easrc.c
+88
-35
sound/soc/fsl/fsl_easrc.c
···
54
54
unsigned int regval = ucontrol->value.integer.value[0];
55
55
int ret;
56
56
57
+
if (regval < EASRC_WIDTH_16_BIT || regval > EASRC_WIDTH_24_BIT)
58
+
return -EINVAL;
59
+
57
60
ret = (easrc_priv->bps_iec958[mc->regbase] != regval);
58
61
59
62
easrc_priv->bps_iec958[mc->regbase] = regval;
···
73
70
struct soc_mreg_control *mc =
74
71
(struct soc_mreg_control *)kcontrol->private_value;
75
72
76
-
ucontrol->value.enumerated.item[0] = easrc_priv->bps_iec958[mc->regbase];
73
+
ucontrol->value.integer.value[0] = easrc_priv->bps_iec958[mc->regbase];
77
74
75
+
return 0;
76
+
}
77
+
78
+
static int fsl_easrc_iec958_info(struct snd_kcontrol *kcontrol,
79
+
struct snd_ctl_elem_info *uinfo)
80
+
{
81
+
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
82
+
uinfo->count = 1;
78
83
return 0;
79
84
}
80
85
···
92
81
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
93
82
struct soc_mreg_control *mc =
94
83
(struct soc_mreg_control *)kcontrol->private_value;
95
-
unsigned int regval;
84
+
struct fsl_asrc *easrc = snd_soc_component_get_drvdata(component);
85
+
unsigned int *regval = (unsigned int *)ucontrol->value.iec958.status;
86
+
int ret;
96
87
97
-
regval = snd_soc_component_read(component, mc->regbase);
88
+
ret = regmap_read(easrc->regmap, REG_EASRC_CS0(mc->regbase), ®val[0]);
89
+
if (ret)
90
+
return ret;
98
91
99
-
ucontrol->value.integer.value[0] = regval;
92
+
ret = regmap_read(easrc->regmap, REG_EASRC_CS1(mc->regbase), ®val[1]);
93
+
if (ret)
94
+
return ret;
95
+
96
+
ret = regmap_read(easrc->regmap, REG_EASRC_CS2(mc->regbase), ®val[2]);
97
+
if (ret)
98
+
return ret;
99
+
100
+
ret = regmap_read(easrc->regmap, REG_EASRC_CS3(mc->regbase), ®val[3]);
101
+
if (ret)
102
+
return ret;
103
+
104
+
ret = regmap_read(easrc->regmap, REG_EASRC_CS4(mc->regbase), ®val[4]);
105
+
if (ret)
106
+
return ret;
107
+
108
+
ret = regmap_read(easrc->regmap, REG_EASRC_CS5(mc->regbase), ®val[5]);
109
+
if (ret)
110
+
return ret;
100
111
101
112
return 0;
102
113
}
···
130
97
struct soc_mreg_control *mc =
131
98
(struct soc_mreg_control *)kcontrol->private_value;
132
99
struct fsl_asrc *easrc = snd_soc_component_get_drvdata(component);
133
-
unsigned int regval = ucontrol->value.integer.value[0];
134
-
bool changed;
100
+
unsigned int *regval = (unsigned int *)ucontrol->value.iec958.status;
101
+
bool changed, changed_all = false;
135
102
int ret;
136
103
137
-
ret = regmap_update_bits_check(easrc->regmap, mc->regbase,
138
-
GENMASK(31, 0), regval, &changed);
139
-
if (ret != 0)
104
+
ret = pm_runtime_resume_and_get(component->dev);
105
+
if (ret)
140
106
return ret;
141
107
142
-
return changed;
108
+
ret = regmap_update_bits_check(easrc->regmap, REG_EASRC_CS0(mc->regbase),
109
+
GENMASK(31, 0), regval[0], &changed);
110
+
if (ret != 0)
111
+
goto err;
112
+
changed_all |= changed;
113
+
114
+
ret = regmap_update_bits_check(easrc->regmap, REG_EASRC_CS1(mc->regbase),
115
+
GENMASK(31, 0), regval[1], &changed);
116
+
if (ret != 0)
117
+
goto err;
118
+
changed_all |= changed;
119
+
120
+
ret = regmap_update_bits_check(easrc->regmap, REG_EASRC_CS2(mc->regbase),
121
+
GENMASK(31, 0), regval[2], &changed);
122
+
if (ret != 0)
123
+
goto err;
124
+
changed_all |= changed;
125
+
126
+
ret = regmap_update_bits_check(easrc->regmap, REG_EASRC_CS3(mc->regbase),
127
+
GENMASK(31, 0), regval[3], &changed);
128
+
if (ret != 0)
129
+
goto err;
130
+
changed_all |= changed;
131
+
132
+
ret = regmap_update_bits_check(easrc->regmap, REG_EASRC_CS4(mc->regbase),
133
+
GENMASK(31, 0), regval[4], &changed);
134
+
if (ret != 0)
135
+
goto err;
136
+
changed_all |= changed;
137
+
138
+
ret = regmap_update_bits_check(easrc->regmap, REG_EASRC_CS5(mc->regbase),
139
+
GENMASK(31, 0), regval[5], &changed);
140
+
if (ret != 0)
141
+
goto err;
142
+
changed_all |= changed;
143
+
err:
144
+
pm_runtime_put_autosuspend(component->dev);
145
+
146
+
if (ret != 0)
147
+
return ret;
148
+
else
149
+
return changed_all;
143
150
}
144
151
145
152
#define SOC_SINGLE_REG_RW(xname, xreg) \
146
153
{ .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = (xname), \
147
154
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE, \
148
-
.info = snd_soc_info_xr_sx, .get = fsl_easrc_get_reg, \
155
+
.info = fsl_easrc_iec958_info, .get = fsl_easrc_get_reg, \
149
156
.put = fsl_easrc_set_reg, \
150
157
.private_value = (unsigned long)&(struct soc_mreg_control) \
151
158
{ .regbase = xreg, .regcount = 1, .nbits = 32, \
···
216
143
SOC_SINGLE_VAL_RW("Context 2 IEC958 Bits Per Sample", 2),
217
144
SOC_SINGLE_VAL_RW("Context 3 IEC958 Bits Per Sample", 3),
218
145
219
-
SOC_SINGLE_REG_RW("Context 0 IEC958 CS0", REG_EASRC_CS0(0)),
220
-
SOC_SINGLE_REG_RW("Context 1 IEC958 CS0", REG_EASRC_CS0(1)),
221
-
SOC_SINGLE_REG_RW("Context 2 IEC958 CS0", REG_EASRC_CS0(2)),
222
-
SOC_SINGLE_REG_RW("Context 3 IEC958 CS0", REG_EASRC_CS0(3)),
223
-
SOC_SINGLE_REG_RW("Context 0 IEC958 CS1", REG_EASRC_CS1(0)),
224
-
SOC_SINGLE_REG_RW("Context 1 IEC958 CS1", REG_EASRC_CS1(1)),
225
-
SOC_SINGLE_REG_RW("Context 2 IEC958 CS1", REG_EASRC_CS1(2)),
226
-
SOC_SINGLE_REG_RW("Context 3 IEC958 CS1", REG_EASRC_CS1(3)),
227
-
SOC_SINGLE_REG_RW("Context 0 IEC958 CS2", REG_EASRC_CS2(0)),
228
-
SOC_SINGLE_REG_RW("Context 1 IEC958 CS2", REG_EASRC_CS2(1)),
229
-
SOC_SINGLE_REG_RW("Context 2 IEC958 CS2", REG_EASRC_CS2(2)),
230
-
SOC_SINGLE_REG_RW("Context 3 IEC958 CS2", REG_EASRC_CS2(3)),
231
-
SOC_SINGLE_REG_RW("Context 0 IEC958 CS3", REG_EASRC_CS3(0)),
232
-
SOC_SINGLE_REG_RW("Context 1 IEC958 CS3", REG_EASRC_CS3(1)),
233
-
SOC_SINGLE_REG_RW("Context 2 IEC958 CS3", REG_EASRC_CS3(2)),
234
-
SOC_SINGLE_REG_RW("Context 3 IEC958 CS3", REG_EASRC_CS3(3)),
235
-
SOC_SINGLE_REG_RW("Context 0 IEC958 CS4", REG_EASRC_CS4(0)),
236
-
SOC_SINGLE_REG_RW("Context 1 IEC958 CS4", REG_EASRC_CS4(1)),
237
-
SOC_SINGLE_REG_RW("Context 2 IEC958 CS4", REG_EASRC_CS4(2)),
238
-
SOC_SINGLE_REG_RW("Context 3 IEC958 CS4", REG_EASRC_CS4(3)),
239
-
SOC_SINGLE_REG_RW("Context 0 IEC958 CS5", REG_EASRC_CS5(0)),
240
-
SOC_SINGLE_REG_RW("Context 1 IEC958 CS5", REG_EASRC_CS5(1)),
241
-
SOC_SINGLE_REG_RW("Context 2 IEC958 CS5", REG_EASRC_CS5(2)),
242
-
SOC_SINGLE_REG_RW("Context 3 IEC958 CS5", REG_EASRC_CS5(3)),
146
+
SOC_SINGLE_REG_RW("Context 0 IEC958 CS", 0),
147
+
SOC_SINGLE_REG_RW("Context 1 IEC958 CS", 1),
148
+
SOC_SINGLE_REG_RW("Context 2 IEC958 CS", 2),
149
+
SOC_SINGLE_REG_RW("Context 3 IEC958 CS", 3),
243
150
};
244
151
245
152
/*
+62
-10
sound/soc/fsl/fsl_micfil.c
+62
-10
sound/soc/fsl/fsl_micfil.c
···
210
210
(struct soc_mixer_control *)kcontrol->private_value;
211
211
unsigned int shift = mc->shift;
212
212
int max_range, new_range;
213
+
int ret;
213
214
214
215
new_range = ucontrol->value.integer.value[0];
215
216
max_range = micfil_get_max_range(micfil);
216
217
if (new_range > max_range)
217
218
dev_warn(&micfil->pdev->dev, "range makes channel %d data unreliable\n", shift / 4);
218
219
219
-
regmap_update_bits(micfil->regmap, REG_MICFIL_OUT_CTRL, 0xF << shift, new_range << shift);
220
+
ret = pm_runtime_resume_and_get(cmpnt->dev);
221
+
if (ret)
222
+
return ret;
220
223
221
-
return 0;
224
+
ret = snd_soc_component_update_bits(cmpnt, REG_MICFIL_OUT_CTRL, 0xF << shift,
225
+
new_range << shift);
226
+
227
+
pm_runtime_put_autosuspend(cmpnt->dev);
228
+
229
+
return ret;
222
230
}
223
231
224
232
static int micfil_set_quality(struct fsl_micfil *micfil)
···
289
281
{
290
282
struct snd_soc_component *cmpnt = snd_kcontrol_chip(kcontrol);
291
283
struct fsl_micfil *micfil = snd_soc_component_get_drvdata(cmpnt);
284
+
int val = ucontrol->value.integer.value[0];
285
+
bool change = false;
286
+
int old_val;
287
+
int ret;
292
288
293
-
micfil->quality = ucontrol->value.integer.value[0];
289
+
if (val < QUALITY_HIGH || val > QUALITY_VLOW2)
290
+
return -EINVAL;
294
291
295
-
return micfil_set_quality(micfil);
292
+
if (micfil->quality != val) {
293
+
ret = pm_runtime_resume_and_get(cmpnt->dev);
294
+
if (ret)
295
+
return ret;
296
+
297
+
old_val = micfil->quality;
298
+
micfil->quality = val;
299
+
ret = micfil_set_quality(micfil);
300
+
301
+
pm_runtime_put_autosuspend(cmpnt->dev);
302
+
303
+
if (ret) {
304
+
micfil->quality = old_val;
305
+
return ret;
306
+
}
307
+
308
+
change = true;
309
+
}
310
+
311
+
return change;
296
312
}
297
313
298
314
static const char * const micfil_hwvad_enable[] = {
···
375
343
if (val < 0 || val > 3)
376
344
return -EINVAL;
377
345
346
+
ret = pm_runtime_resume_and_get(comp->dev);
347
+
if (ret)
348
+
return ret;
349
+
378
350
micfil->dc_remover = val;
379
351
380
352
/* Calculate total value for all channels */
···
388
352
/* Update DC Remover mode for all channels */
389
353
ret = snd_soc_component_update_bits(comp, REG_MICFIL_DC_CTRL,
390
354
MICFIL_DC_CTRL_CONFIG, reg_val);
391
-
if (ret < 0)
392
-
return ret;
393
355
394
-
return 0;
356
+
pm_runtime_put_autosuspend(comp->dev);
357
+
358
+
return ret;
395
359
}
396
360
397
361
static int micfil_get_dc_remover_state(struct snd_kcontrol *kcontrol,
···
413
377
unsigned int *item = ucontrol->value.enumerated.item;
414
378
struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp);
415
379
int val = snd_soc_enum_item_to_val(e, item[0]);
380
+
bool change = false;
416
381
382
+
if (val < 0 || val > 1)
383
+
return -EINVAL;
384
+
385
+
change = (micfil->vad_enabled != val);
417
386
micfil->vad_enabled = val;
418
387
419
-
return 0;
388
+
return change;
420
389
}
421
390
422
391
static int hwvad_get_enable(struct snd_kcontrol *kcontrol,
···
443
402
unsigned int *item = ucontrol->value.enumerated.item;
444
403
struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp);
445
404
int val = snd_soc_enum_item_to_val(e, item[0]);
405
+
bool change = false;
406
+
407
+
if (val < MICFIL_HWVAD_ENVELOPE_MODE || val > MICFIL_HWVAD_ENERGY_MODE)
408
+
return -EINVAL;
446
409
447
410
/* 0 - Envelope-based Mode
448
411
* 1 - Energy-based Mode
449
412
*/
413
+
change = (micfil->vad_init_mode != val);
450
414
micfil->vad_init_mode = val;
451
415
452
-
return 0;
416
+
return change;
453
417
}
454
418
455
419
static int hwvad_get_init_mode(struct snd_kcontrol *kcontrol,
···
549
503
SOC_SINGLE("HWVAD ZCD Adjustment", REG_MICFIL_VAD0_ZCD, 8, 15, 0),
550
504
SOC_SINGLE("HWVAD ZCD And Behavior Switch",
551
505
REG_MICFIL_VAD0_ZCD, 4, 1, 0),
552
-
SOC_SINGLE_BOOL_EXT("VAD Detected", 0, hwvad_detected, NULL),
506
+
{
507
+
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
508
+
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
509
+
.name = "VAD Detected",
510
+
.info = snd_soc_info_bool_ext,
511
+
.get = hwvad_detected,
512
+
},
553
513
};
554
514
555
515
static int fsl_micfil_use_verid(struct device *dev)
+18
-4
sound/soc/fsl/fsl_xcvr.c
+18
-4
sound/soc/fsl/fsl_xcvr.c
···
167
167
struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai);
168
168
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
169
169
unsigned int *item = ucontrol->value.enumerated.item;
170
+
int val = snd_soc_enum_item_to_val(e, item[0]);
171
+
int ret;
170
172
171
-
xcvr->arc_mode = snd_soc_enum_item_to_val(e, item[0]);
173
+
if (val < 0 || val > 1)
174
+
return -EINVAL;
172
175
173
-
return 0;
176
+
ret = (xcvr->arc_mode != val);
177
+
178
+
xcvr->arc_mode = val;
179
+
180
+
return ret;
174
181
}
175
182
176
183
static int fsl_xcvr_arc_mode_get(struct snd_kcontrol *kcontrol,
···
277
270
struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai);
278
271
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
279
272
unsigned int *item = ucontrol->value.enumerated.item;
273
+
int val = snd_soc_enum_item_to_val(e, item[0]);
280
274
struct snd_soc_card *card = dai->component->card;
281
275
struct snd_soc_pcm_runtime *rtd;
276
+
int ret;
282
277
283
-
xcvr->mode = snd_soc_enum_item_to_val(e, item[0]);
278
+
if (val < FSL_XCVR_MODE_SPDIF || val > FSL_XCVR_MODE_EARC)
279
+
return -EINVAL;
280
+
281
+
ret = (xcvr->mode != val);
282
+
283
+
xcvr->mode = val;
284
284
285
285
fsl_xcvr_activate_ctl(dai, fsl_xcvr_arc_mode_kctl.name,
286
286
(xcvr->mode == FSL_XCVR_MODE_ARC));
···
297
283
rtd = snd_soc_get_pcm_runtime(card, card->dai_link);
298
284
rtd->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream_count =
299
285
(xcvr->mode == FSL_XCVR_MODE_SPDIF ? 1 : 0);
300
-
return 0;
286
+
return ret;
301
287
}
302
288
303
289
static int fsl_xcvr_mode_get(struct snd_kcontrol *kcontrol,