Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amd/display: refactor HPD to increase flexibility
Currently all dcn revisions have to follow the same codepath for
hotplug detection. This change allows per dcn hpd handling consolidating
hpd code in link_encoder.
Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Dmytro Laktyushkin
and committed by
Alex Deucher
def3488e
6afc422e
+316
-273
-1
drivers/gpu/drm/amd/display/dc/dc.h
-1
drivers/gpu/drm/amd/display/dc/dc.h
+46
-1
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
+46
-1
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
···
117
117
.destroy = dce110_link_encoder_destroy,
118
118
.get_max_link_cap = dce110_link_encoder_get_max_link_cap,
119
119
.get_dig_frontend = dce110_get_dig_frontend,
120
+
.get_hpd_state = dce110_get_hpd_state,
121
+
.program_hpd_filter = dce110_program_hpd_filter,
120
122
};
121
123
122
124
static enum bp_result link_transmitter_control(
···
853
851
enc110->base.ctx = init_data->ctx;
854
852
enc110->base.id = init_data->encoder;
855
853
854
+
enc110->base.hpd_gpio = init_data->hpd_gpio;
856
855
enc110->base.hpd_source = init_data->hpd_source;
857
856
enc110->base.connector = init_data->connector;
858
857
···
1056
1053
1057
1054
void dce110_link_encoder_destroy(struct link_encoder **enc)
1058
1055
{
1056
+
if ((*enc)->hpd_gpio) {
1057
+
dal_gpio_destroy_irq(&(*enc)->hpd_gpio);
1058
+
(*enc)->hpd_gpio = NULL;
1059
+
}
1060
+
1059
1061
kfree(TO_DCE110_LINK_ENC(*enc));
1060
1062
*enc = NULL;
1061
1063
}
···
1759
1751
*link_settings = max_link_cap;
1760
1752
}
1761
1753
1754
+
bool dce110_get_hpd_state(struct link_encoder *enc)
1755
+
{
1756
+
uint32_t state = 0;
1757
+
1758
+
if (!enc->hpd_gpio)
1759
+
return false;
1760
+
1761
+
dal_gpio_lock_pin(enc->hpd_gpio);
1762
+
dal_gpio_get_value(enc->hpd_gpio, &state);
1763
+
dal_gpio_unlock_pin(enc->hpd_gpio);
1764
+
1765
+
return state;
1766
+
}
1767
+
1768
+
bool dce110_program_hpd_filter(struct link_encoder *enc, int delay_on_connect_in_ms, int delay_on_disconnect_in_ms)
1769
+
{
1770
+
/* Setup HPD filtering */
1771
+
if (enc->hpd_gpio && dal_gpio_lock_pin(enc->hpd_gpio) == GPIO_RESULT_OK) {
1772
+
struct gpio_hpd_config config;
1773
+
1774
+
config.delay_on_connect = delay_on_connect_in_ms;
1775
+
config.delay_on_disconnect = delay_on_disconnect_in_ms;
1776
+
1777
+
dal_irq_setup_hpd_filter(enc->hpd_gpio, &config);
1778
+
1779
+
dal_gpio_unlock_pin(enc->hpd_gpio);
1780
+
1781
+
return true;
1782
+
} else {
1783
+
ASSERT(0);
1784
+
return false;
1785
+
}
1786
+
}
1787
+
1762
1788
#if defined(CONFIG_DRM_AMD_DC_SI)
1763
1789
static const struct link_encoder_funcs dce60_lnk_enc_funcs = {
1764
1790
.validate_output_with_stream =
···
1817
1775
.is_dig_enabled = dce110_is_dig_enabled,
1818
1776
.destroy = dce110_link_encoder_destroy,
1819
1777
.get_max_link_cap = dce110_link_encoder_get_max_link_cap,
1820
-
.get_dig_frontend = dce110_get_dig_frontend
1778
+
.get_dig_frontend = dce110_get_dig_frontend,
1779
+
.get_hpd_state = dce110_get_hpd_state,
1780
+
.program_hpd_filter = dce110_program_hpd_filter,
1821
1781
};
1822
1782
1823
1783
void dce60_link_encoder_construct(
···
1838
1794
enc110->base.ctx = init_data->ctx;
1839
1795
enc110->base.id = init_data->encoder;
1840
1796
1797
+
enc110->base.hpd_gpio = init_data->hpd_gpio;
1841
1798
enc110->base.hpd_source = init_data->hpd_source;
1842
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enc110->base.connector = init_data->connector;
1843
1800
+3
-5
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h
+3
-5
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h
···
130
130
SRI(DP_DPHY_HBR2_PATTERN_CONTROL, DP, id), \
131
131
SR(DCI_MEM_PWR_STATUS)
132
132
133
-
#define LE_DCN10_REG_LIST(id)\
134
-
LE_COMMON_REG_LIST_BASE(id), \
135
-
SRI(DP_DPHY_BS_SR_SWAP_CNTL, DP, id), \
136
-
SRI(DP_DPHY_INTERNAL_CTRL, DP, id), \
137
-
SRI(DP_DPHY_HBR2_PATTERN_CONTROL, DP, id)
138
133
139
134
struct dce110_link_enc_aux_registers {
140
135
uint32_t AUX_CONTROL;
···
313
318
314
319
void dce110_link_encoder_get_max_link_cap(struct link_encoder *enc,
315
320
struct dc_link_settings *link_settings);
321
+
322
+
bool dce110_get_hpd_state(struct link_encoder *enc);
323
+
bool dce110_program_hpd_filter(struct link_encoder *enc, int delay_on_connect_in_ms, int delay_on_disconnect_in_ms);
316
324
317
325
#endif /* __DC_LINK_ENCODER__DCE110_H__ */
+3
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.c
+3
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.c
···
104
104
.fec_is_active = enc2_fec_is_active,
105
105
.is_in_alt_mode = dcn201_link_encoder_is_in_alt_mode,
106
106
.get_max_link_cap = dcn201_link_encoder_get_max_link_cap,
107
+
.get_hpd_state = dcn10_get_hpd_state,
108
+
.program_hpd_filter = dcn10_program_hpd_filter,
107
109
};
108
110
109
111
void dcn201_link_encoder_construct(
···
127
125
enc10->base.ctx = init_data->ctx;
128
126
enc10->base.id = init_data->encoder;
129
127
128
+
enc10->base.hpd_gpio = init_data->hpd_gpio;
130
129
enc10->base.hpd_source = init_data->hpd_source;
131
130
enc10->base.connector = init_data->connector;
132
131
+3
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c
+3
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c
···
325
325
.get_dig_frontend = dcn10_get_dig_frontend,
326
326
.is_in_alt_mode = dcn20_link_encoder_is_in_alt_mode,
327
327
.get_max_link_cap = dcn20_link_encoder_get_max_link_cap,
328
+
.get_hpd_state = dcn10_get_hpd_state,
329
+
.program_hpd_filter = dcn10_program_hpd_filter,
328
330
};
329
331
330
332
void dcn21_link_encoder_construct(
···
348
346
enc10->base.ctx = init_data->ctx;
349
347
enc10->base.id = init_data->encoder;
350
348
349
+
enc10->base.hpd_gpio = init_data->hpd_gpio;
351
350
enc10->base.hpd_source = init_data->hpd_source;
352
351
enc10->base.connector = init_data->connector;
353
352
+43
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
+43
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
···
88
88
.get_dig_mode = dcn10_get_dig_mode,
89
89
.destroy = dcn10_link_encoder_destroy,
90
90
.get_max_link_cap = dcn10_link_encoder_get_max_link_cap,
91
+
.get_hpd_state = dcn10_get_hpd_state,
92
+
.program_hpd_filter = dcn10_program_hpd_filter,
91
93
};
94
+
92
95
93
96
static enum bp_result link_transmitter_control(
94
97
struct dcn10_link_encoder *enc10,
···
685
682
enc10->base.ctx = init_data->ctx;
686
683
enc10->base.id = init_data->encoder;
687
684
685
+
enc10->base.hpd_gpio = init_data->hpd_gpio;
688
686
enc10->base.hpd_source = init_data->hpd_source;
689
687
enc10->base.connector = init_data->connector;
690
688
···
877
873
878
874
void dcn10_link_encoder_destroy(struct link_encoder **enc)
879
875
{
876
+
if ((*enc)->hpd_gpio) {
877
+
dal_gpio_destroy_irq(&(*enc)->hpd_gpio);
878
+
(*enc)->hpd_gpio = NULL;
879
+
}
880
+
880
881
kfree(TO_DCN10_LINK_ENC(*enc));
881
882
*enc = NULL;
882
883
}
···
1480
1471
max_link_cap.link_rate = LINK_RATE_UHBR20;
1481
1472
1482
1473
*link_settings = max_link_cap;
1474
+
}
1475
+
1476
+
bool dcn10_get_hpd_state(struct link_encoder *enc)
1477
+
{
1478
+
uint32_t state = 0;
1479
+
1480
+
if (!enc->hpd_gpio)
1481
+
return false;
1482
+
1483
+
dal_gpio_lock_pin(enc->hpd_gpio);
1484
+
dal_gpio_get_value(enc->hpd_gpio, &state);
1485
+
dal_gpio_unlock_pin(enc->hpd_gpio);
1486
+
1487
+
return state;
1488
+
}
1489
+
1490
+
bool dcn10_program_hpd_filter(struct link_encoder *enc, int delay_on_connect_in_ms, int delay_on_disconnect_in_ms)
1491
+
{
1492
+
/* Setup HPD filtering */
1493
+
if (enc->hpd_gpio && dal_gpio_lock_pin(enc->hpd_gpio) == GPIO_RESULT_OK) {
1494
+
struct gpio_hpd_config config;
1495
+
1496
+
config.delay_on_connect = delay_on_connect_in_ms;
1497
+
config.delay_on_disconnect = delay_on_disconnect_in_ms;
1498
+
1499
+
dal_irq_setup_hpd_filter(enc->hpd_gpio, &config);
1500
+
1501
+
dal_gpio_unlock_pin(enc->hpd_gpio);
1502
+
1503
+
return true;
1504
+
} else {
1505
+
ASSERT(0);
1506
+
return false;
1507
+
}
1483
1508
}
+10
-1
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h
+10
-1
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h
···
79
79
80
80
struct dcn10_link_enc_hpd_registers {
81
81
uint32_t DC_HPD_CONTROL;
82
+
uint32_t DC_HPD_INT_STATUS;
83
+
uint32_t DC_HPD_TOGGLE_FILT_CNTL;
82
84
};
83
85
84
86
struct dcn10_link_enc_registers {
···
276
274
type TMDS_CTL0;\
277
275
type AUX_HPD_SEL;\
278
276
type AUX_LS_READ_EN;\
279
-
type AUX_RX_RECEIVE_WINDOW
277
+
type AUX_RX_RECEIVE_WINDOW;\
278
+
type DC_HPD_SENSE;\
279
+
type DC_HPD_CONNECT_INT_DELAY;\
280
+
type DC_HPD_DISCONNECT_INT_DELAY
280
281
281
282
282
283
#define DCN20_LINK_ENCODER_DPCS_REG_FIELD_LIST(type) \
···
661
656
662
657
void dcn10_link_encoder_get_max_link_cap(struct link_encoder *enc,
663
658
struct dc_link_settings *link_settings);
659
+
660
+
bool dcn10_get_hpd_state(struct link_encoder *enc);
661
+
bool dcn10_program_hpd_filter(struct link_encoder *enc, int delay_on_connect_in_ms, int delay_on_disconnect_in_ms);
662
+
664
663
#endif /* __DC_LINK_ENCODER__DCN10_H__ */
+3
drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.c
+3
drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.c
···
384
384
.get_dig_frontend = dcn10_get_dig_frontend,
385
385
.is_in_alt_mode = dcn20_link_encoder_is_in_alt_mode,
386
386
.get_max_link_cap = dcn20_link_encoder_get_max_link_cap,
387
+
.get_hpd_state = dcn10_get_hpd_state,
388
+
.program_hpd_filter = dcn10_program_hpd_filter,
387
389
};
388
390
389
391
void dcn20_link_encoder_construct(
···
407
405
enc10->base.ctx = init_data->ctx;
408
406
enc10->base.id = init_data->encoder;
409
407
408
+
enc10->base.hpd_gpio = init_data->hpd_gpio;
410
409
enc10->base.hpd_source = init_data->hpd_source;
411
410
enc10->base.connector = init_data->connector;
412
411
+3
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
+3
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
···
84
84
.get_dig_mode = dcn10_get_dig_mode,
85
85
.is_in_alt_mode = dcn20_link_encoder_is_in_alt_mode,
86
86
.get_max_link_cap = dcn20_link_encoder_get_max_link_cap,
87
+
.get_hpd_state = dcn10_get_hpd_state,
88
+
.program_hpd_filter = dcn10_program_hpd_filter,
87
89
};
88
90
89
91
void dcn30_link_encoder_construct(
···
107
105
enc10->base.ctx = init_data->ctx;
108
106
enc10->base.id = init_data->encoder;
109
107
108
+
enc10->base.hpd_gpio = init_data->hpd_gpio;
110
109
enc10->base.hpd_source = init_data->hpd_source;
111
110
enc10->base.connector = init_data->connector;
112
111
+3
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
+3
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
···
73
73
.get_dig_mode = dcn10_get_dig_mode,
74
74
.is_in_alt_mode = dcn20_link_encoder_is_in_alt_mode,
75
75
.get_max_link_cap = dcn20_link_encoder_get_max_link_cap,
76
+
.get_hpd_state = dcn10_get_hpd_state,
77
+
.program_hpd_filter = dcn10_program_hpd_filter,
76
78
};
77
79
78
80
void dcn301_link_encoder_construct(
···
96
94
enc10->base.ctx = init_data->ctx;
97
95
enc10->base.id = init_data->encoder;
98
96
97
+
enc10->base.hpd_gpio = init_data->hpd_gpio;
99
98
enc10->base.hpd_source = init_data->hpd_source;
100
99
enc10->base.connector = init_data->connector;
101
100
+3
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
+3
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
···
276
276
.is_in_alt_mode = dcn31_link_encoder_is_in_alt_mode,
277
277
.get_max_link_cap = dcn31_link_encoder_get_max_link_cap,
278
278
.set_dio_phy_mux = dcn31_link_encoder_set_dio_phy_mux,
279
+
.get_hpd_state = dcn10_get_hpd_state,
280
+
.program_hpd_filter = dcn10_program_hpd_filter,
279
281
};
280
282
281
283
void dcn31_link_encoder_construct(
···
299
297
enc10->base.ctx = init_data->ctx;
300
298
enc10->base.id = init_data->encoder;
301
299
300
+
enc10->base.hpd_gpio = init_data->hpd_gpio;
302
301
enc10->base.hpd_source = init_data->hpd_source;
303
302
enc10->base.connector = init_data->connector;
304
303
+3
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
+3
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
···
224
224
.is_in_alt_mode = dcn32_link_encoder_is_in_alt_mode,
225
225
.get_max_link_cap = dcn32_link_encoder_get_max_link_cap,
226
226
.set_dio_phy_mux = dcn31_link_encoder_set_dio_phy_mux,
227
+
.get_hpd_state = dcn10_get_hpd_state,
228
+
.program_hpd_filter = dcn10_program_hpd_filter,
227
229
};
228
230
229
231
void dcn32_link_encoder_construct(
···
247
245
enc10->base.ctx = init_data->ctx;
248
246
enc10->base.id = init_data->encoder;
249
247
248
+
enc10->base.hpd_gpio = init_data->hpd_gpio;
250
249
enc10->base.hpd_source = init_data->hpd_source;
251
250
enc10->base.connector = init_data->connector;
252
251
+3
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
+3
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
···
89
89
.is_in_alt_mode = dcn20_link_encoder_is_in_alt_mode,
90
90
.get_max_link_cap = dcn20_link_encoder_get_max_link_cap,
91
91
.set_dio_phy_mux = dcn31_link_encoder_set_dio_phy_mux,
92
+
.get_hpd_state = dcn10_get_hpd_state,
93
+
.program_hpd_filter = dcn10_program_hpd_filter,
92
94
};
93
95
94
96
void dcn321_link_encoder_construct(
···
112
110
enc10->base.ctx = init_data->ctx;
113
111
enc10->base.id = init_data->encoder;
114
112
113
+
enc10->base.hpd_gpio = init_data->hpd_gpio;
115
114
enc10->base.hpd_source = init_data->hpd_source;
116
115
enc10->base.connector = init_data->connector;
117
116
+3
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
+3
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
···
162
162
.set_dio_phy_mux = dcn31_link_encoder_set_dio_phy_mux,
163
163
.enable_dpia_output = dcn35_link_encoder_enable_dpia_output,
164
164
.disable_dpia_output = dcn35_link_encoder_disable_dpia_output,
165
+
.get_hpd_state = dcn10_get_hpd_state,
166
+
.program_hpd_filter = dcn10_program_hpd_filter,
165
167
};
166
168
167
169
void dcn35_link_encoder_construct(
···
185
183
enc10->base.ctx = init_data->ctx;
186
184
enc10->base.id = init_data->encoder;
187
185
186
+
enc10->base.hpd_gpio = init_data->hpd_gpio;
188
187
enc10->base.hpd_source = init_data->hpd_source;
189
188
enc10->base.connector = init_data->connector;
190
189
+3
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
+3
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
···
215
215
.is_in_alt_mode = dcn32_link_encoder_is_in_alt_mode,
216
216
.get_max_link_cap = dcn32_link_encoder_get_max_link_cap,
217
217
.set_dio_phy_mux = dcn31_link_encoder_set_dio_phy_mux,
218
+
.get_hpd_state = dcn10_get_hpd_state,
219
+
.program_hpd_filter = dcn10_program_hpd_filter,
218
220
};
219
221
220
222
void dcn401_link_encoder_construct(
···
238
236
enc10->base.ctx = init_data->ctx;
239
237
enc10->base.id = init_data->encoder;
240
238
239
+
enc10->base.hpd_gpio = init_data->hpd_gpio;
241
240
enc10->base.hpd_source = init_data->hpd_source;
242
241
enc10->base.connector = init_data->connector;
243
242
+1
-21
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
+1
-21
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
···
728
728
{
729
729
struct dc_context *ctx = link->ctx;
730
730
struct graphics_object_id connector = link->link_enc->connector;
731
-
struct gpio *hpd;
732
731
bool edp_hpd_high = false;
733
732
uint32_t time_elapsed = 0;
734
733
uint32_t timeout = power_up ?
···
751
752
* we need to wait until SENSE bit is high/low.
752
753
*/
753
754
754
-
/* obtain HPD */
755
-
/* TODO what to do with this? */
756
-
hpd = ctx->dc->link_srv->get_hpd_gpio(ctx->dc_bios, connector, ctx->gpio_service);
757
-
758
-
if (!hpd) {
759
-
BREAK_TO_DEBUGGER();
760
-
return;
761
-
}
762
-
763
755
if (link->panel_config.pps.extra_t3_ms > 0) {
764
756
int extra_t3_in_ms = link->panel_config.pps.extra_t3_ms;
765
757
766
758
msleep(extra_t3_in_ms);
767
759
}
768
760
769
-
dal_gpio_open(hpd, GPIO_MODE_INTERRUPT);
770
-
771
761
/* wait until timeout or panel detected */
772
762
773
763
do {
774
-
uint32_t detected = 0;
775
-
776
-
dal_gpio_get_value(hpd, &detected);
777
-
778
-
if (!(detected ^ power_up)) {
764
+
if (!(link->dc->link_srv->get_hpd_state(link) ^ power_up)) {
779
765
edp_hpd_high = true;
780
766
break;
781
767
}
···
769
785
770
786
time_elapsed += HPD_CHECK_INTERVAL;
771
787
} while (time_elapsed < timeout);
772
-
773
-
dal_gpio_close(hpd);
774
-
775
-
dal_gpio_destroy_irq(&hpd);
776
788
777
789
/* ensure that the panel is detected */
778
790
if (!edp_hpd_high)
+4
drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
+4
drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
···
44
44
struct encoder_init_data {
45
45
enum channel_id channel;
46
46
struct graphics_object_id connector;
47
+
struct gpio *hpd_gpio;
47
48
enum hpd_source_id hpd_source;
48
49
/* TODO: in DAL2, here was pointer to EventManagerInterface */
49
50
struct graphics_object_id encoder;
···
88
87
enum engine_id analog_engine;
89
88
struct encoder_feature_support features;
90
89
enum transmitter transmitter;
90
+
struct gpio *hpd_gpio;
91
91
enum hpd_source_id hpd_source;
92
92
bool usbc_combo_phy;
93
93
};
···
180
178
void (*disable_dpia_output)(struct link_encoder *link_enc,
181
179
uint8_t dpia_id,
182
180
uint8_t digmode);
181
+
bool (*get_hpd_state)(struct link_encoder *enc);
182
+
bool (*program_hpd_filter)(struct link_encoder *enc, int delay_on_connect_in_ms, int delay_on_disconnect_in_ms);
183
183
};
184
184
185
185
/*
-3
drivers/gpu/drm/amd/display/dc/inc/link_service.h
-3
drivers/gpu/drm/amd/display/dc/inc/link_service.h
···
114
114
struct dc_sink_init_data *init_data);
115
115
void (*remove_remote_sink)(struct dc_link *link, struct dc_sink *sink);
116
116
bool (*get_hpd_state)(struct dc_link *link);
117
-
struct gpio *(*get_hpd_gpio)(struct dc_bios *dcb,
118
-
struct graphics_object_id link_id,
119
-
struct gpio_service *gpio_service);
120
117
void (*enable_hpd)(const struct dc_link *link);
121
118
void (*disable_hpd)(const struct dc_link *link);
122
119
void (*enable_hpd_filter)(struct dc_link *link, bool enable);
+1
-9
drivers/gpu/drm/amd/display/dc/link/link_detection.c
+1
-9
drivers/gpu/drm/amd/display/dc/link/link_detection.c
···
1400
1400
*/
1401
1401
bool link_detect_connection_type(struct dc_link *link, enum dc_connection_type *type)
1402
1402
{
1403
-
uint32_t is_hpd_high = 0;
1404
-
1405
1403
if (link->connector_signal == SIGNAL_TYPE_LVDS) {
1406
1404
*type = dc_connection_single;
1407
1405
return true;
···
1434
1436
}
1435
1437
1436
1438
1437
-
if (!query_hpd_status(link, &is_hpd_high))
1438
-
goto hpd_gpio_failure;
1439
-
1440
-
if (is_hpd_high) {
1439
+
if (link_get_hpd_state(link)) {
1441
1440
*type = dc_connection_single;
1442
1441
/* TODO: need to do the actual detection */
1443
1442
} else {
···
1447
1452
}
1448
1453
1449
1454
return true;
1450
-
1451
-
hpd_gpio_failure:
1452
-
return false;
1453
1455
}
1454
1456
1455
1457
bool link_detect(struct dc_link *link, enum dc_detect_reason reason)
+123
-110
drivers/gpu/drm/amd/display/dc/link/link_factory.c
+123
-110
drivers/gpu/drm/amd/display/dc/link/link_factory.c
···
73
73
link_srv->add_remote_sink = link_add_remote_sink;
74
74
link_srv->remove_remote_sink = link_remove_remote_sink;
75
75
link_srv->get_hpd_state = link_get_hpd_state;
76
-
link_srv->get_hpd_gpio = link_get_hpd_gpio;
77
76
link_srv->enable_hpd = link_enable_hpd;
78
77
link_srv->disable_hpd = link_disable_hpd;
79
78
link_srv->enable_hpd_filter = link_enable_hpd_filter;
···
362
363
{
363
364
int i;
364
365
365
-
if (link->hpd_gpio) {
366
-
dal_gpio_destroy_irq(&link->hpd_gpio);
367
-
link->hpd_gpio = NULL;
368
-
}
369
-
370
366
if (link->ddc)
371
367
link_destroy_ddc_service(&link->ddc);
372
368
···
530
536
if (link->dc->res_pool->funcs->link_init)
531
537
link->dc->res_pool->funcs->link_init(link);
532
538
533
-
link->hpd_gpio = link_get_hpd_gpio(link->ctx->dc_bios, link->link_id,
534
-
link->ctx->gpio_service);
535
-
536
-
if (link->hpd_gpio) {
537
-
dal_gpio_open(link->hpd_gpio, GPIO_MODE_INTERRUPT);
538
-
dal_gpio_unlock_pin(link->hpd_gpio);
539
-
link->irq_source_hpd = dal_irq_get_source(link->hpd_gpio);
540
-
541
-
DC_LOG_DC("BIOS object table - hpd_gpio id: %d", link->hpd_gpio->id);
542
-
DC_LOG_DC("BIOS object table - hpd_gpio en: %d", link->hpd_gpio->en);
543
-
}
544
-
545
-
switch (link->link_id.id) {
546
-
case CONNECTOR_ID_HDMI_TYPE_A:
547
-
link->connector_signal = SIGNAL_TYPE_HDMI_TYPE_A;
548
-
549
-
if (link->hpd_gpio)
550
-
link->irq_source_read_request =
551
-
dal_irq_get_read_request(link->hpd_gpio);
552
-
break;
553
-
case CONNECTOR_ID_SINGLE_LINK_DVID:
554
-
case CONNECTOR_ID_SINGLE_LINK_DVII:
555
-
link->connector_signal = SIGNAL_TYPE_DVI_SINGLE_LINK;
556
-
break;
557
-
case CONNECTOR_ID_DUAL_LINK_DVID:
558
-
case CONNECTOR_ID_DUAL_LINK_DVII:
559
-
link->connector_signal = SIGNAL_TYPE_DVI_DUAL_LINK;
560
-
break;
561
-
case CONNECTOR_ID_VGA:
562
-
link->connector_signal = SIGNAL_TYPE_RGB;
563
-
break;
564
-
case CONNECTOR_ID_DISPLAY_PORT:
565
-
case CONNECTOR_ID_MXM:
566
-
case CONNECTOR_ID_USBC:
567
-
link->connector_signal = SIGNAL_TYPE_DISPLAY_PORT;
568
-
569
-
if (link->hpd_gpio)
570
-
link->irq_source_hpd_rx =
571
-
dal_irq_get_rx_source(link->hpd_gpio);
572
-
573
-
break;
574
-
case CONNECTOR_ID_EDP:
575
-
// If smartmux is supported, only create the link on the primary eDP.
576
-
// Dual eDP is not supported with smartmux.
577
-
if (!(!link->dc->config.smart_mux_version || dc_ctx->dc_edp_id_count == 0))
578
-
goto create_fail;
579
-
580
-
link->connector_signal = SIGNAL_TYPE_EDP;
581
-
582
-
if (link->hpd_gpio) {
583
-
if (!link->dc->config.allow_edp_hotplug_detection
584
-
&& !is_smartmux_suported(link))
585
-
link->irq_source_hpd = DC_IRQ_SOURCE_INVALID;
586
-
587
-
switch (link->dc->config.allow_edp_hotplug_detection) {
588
-
case HPD_EN_FOR_ALL_EDP:
589
-
link->irq_source_hpd_rx =
590
-
dal_irq_get_rx_source(link->hpd_gpio);
591
-
break;
592
-
case HPD_EN_FOR_PRIMARY_EDP_ONLY:
593
-
if (link->link_index == 0)
594
-
link->irq_source_hpd_rx =
595
-
dal_irq_get_rx_source(link->hpd_gpio);
596
-
else
597
-
link->irq_source_hpd = DC_IRQ_SOURCE_INVALID;
598
-
break;
599
-
case HPD_EN_FOR_SECONDARY_EDP_ONLY:
600
-
if (link->link_index == 1)
601
-
link->irq_source_hpd_rx =
602
-
dal_irq_get_rx_source(link->hpd_gpio);
603
-
else
604
-
link->irq_source_hpd = DC_IRQ_SOURCE_INVALID;
605
-
break;
606
-
default:
607
-
link->irq_source_hpd = DC_IRQ_SOURCE_INVALID;
608
-
break;
609
-
}
610
-
}
611
-
612
-
break;
613
-
case CONNECTOR_ID_LVDS:
614
-
link->connector_signal = SIGNAL_TYPE_LVDS;
615
-
break;
616
-
default:
617
-
DC_LOG_WARNING("Unsupported Connector type:%d!\n",
618
-
link->link_id.id);
619
-
goto create_fail;
620
-
}
621
-
622
-
LINK_INFO("Connector[%d] description: signal: %s\n",
623
-
init_params->connector_index,
624
-
signal_type_to_string(link->connector_signal));
625
-
626
539
ddc_service_init_data.ctx = link->ctx;
627
540
ddc_service_init_data.id = link->link_id;
628
541
ddc_service_init_data.link = link;
···
551
650
enc_init_data.ctx = dc_ctx;
552
651
enc_init_data.connector = link->link_id;
553
652
enc_init_data.channel = get_ddc_line(link);
554
-
enc_init_data.hpd_source = get_hpd_line(link);
555
653
enc_init_data.transmitter = transmitter_from_encoder;
556
654
enc_init_data.encoder = link_encoder;
557
655
enc_init_data.analog_engine = link_analog_engine;
656
+
enc_init_data.hpd_gpio = link_get_hpd_gpio(link->ctx->dc_bios, link->link_id,
657
+
link->ctx->gpio_service);
558
658
559
-
link->hpd_src = enc_init_data.hpd_source;
659
+
if (enc_init_data.hpd_gpio) {
660
+
dal_gpio_open(enc_init_data.hpd_gpio, GPIO_MODE_INTERRUPT);
661
+
dal_gpio_unlock_pin(enc_init_data.hpd_gpio);
662
+
link->irq_source_hpd = dal_irq_get_source(enc_init_data.hpd_gpio);
663
+
enc_init_data.hpd_source = get_hpd_line(link);
664
+
link->hpd_src = enc_init_data.hpd_source;
665
+
666
+
DC_LOG_DC("BIOS object table - hpd_gpio id: %d", enc_init_data.hpd_gpio->id);
667
+
DC_LOG_DC("BIOS object table - hpd_gpio en: %d", enc_init_data.hpd_gpio->en);
668
+
} else {
669
+
struct graphics_object_hpd_info hpd_info;
670
+
671
+
if (link->ctx->dc_bios->funcs->get_hpd_info(link->ctx->dc_bios, link->link_id, &hpd_info) == BP_RESULT_OK) {
672
+
link->hpd_src = hpd_info.hpd_int_gpio_uid - 1;
673
+
link->irq_source_hpd = DC_IRQ_SOURCE_HPD1 + link->hpd_src;
674
+
enc_init_data.hpd_source = link->hpd_src;
675
+
DC_LOG_DC("BIOS object table - hpd_int_gpio_uid id: %d", hpd_info.hpd_int_gpio_uid);
676
+
} else {
677
+
ASSERT(0);
678
+
enc_init_data.hpd_source = HPD_SOURCEID_UNKNOWN;
679
+
}
680
+
}
560
681
561
682
link->link_enc =
562
683
link->dc->res_pool->funcs->link_enc_create(dc_ctx, &enc_init_data);
···
590
667
591
668
DC_LOG_DC("BIOS object table - DP_IS_USB_C: %d", link->link_enc->features.flags.bits.DP_IS_USB_C);
592
669
DC_LOG_DC("BIOS object table - IS_DP2_CAPABLE: %d", link->link_enc->features.flags.bits.IS_DP2_CAPABLE);
670
+
671
+
switch (link->link_id.id) {
672
+
case CONNECTOR_ID_HDMI_TYPE_A:
673
+
link->connector_signal = SIGNAL_TYPE_HDMI_TYPE_A;
674
+
675
+
if (link->link_enc->hpd_gpio)
676
+
link->irq_source_read_request =
677
+
dal_irq_get_read_request(link->link_enc->hpd_gpio);
678
+
else if (link->hpd_src != HPD_SOURCEID_UNKNOWN)
679
+
link->irq_source_read_request = DC_IRQ_SOURCE_DCI2C_RR_DDC1 + link->hpd_src;
680
+
break;
681
+
case CONNECTOR_ID_SINGLE_LINK_DVID:
682
+
case CONNECTOR_ID_SINGLE_LINK_DVII:
683
+
link->connector_signal = SIGNAL_TYPE_DVI_SINGLE_LINK;
684
+
break;
685
+
case CONNECTOR_ID_DUAL_LINK_DVID:
686
+
case CONNECTOR_ID_DUAL_LINK_DVII:
687
+
link->connector_signal = SIGNAL_TYPE_DVI_DUAL_LINK;
688
+
break;
689
+
case CONNECTOR_ID_VGA:
690
+
link->connector_signal = SIGNAL_TYPE_RGB;
691
+
break;
692
+
case CONNECTOR_ID_DISPLAY_PORT:
693
+
case CONNECTOR_ID_MXM:
694
+
case CONNECTOR_ID_USBC:
695
+
link->connector_signal = SIGNAL_TYPE_DISPLAY_PORT;
696
+
697
+
if (link->link_enc->hpd_gpio)
698
+
link->irq_source_hpd_rx =
699
+
dal_irq_get_rx_source(link->link_enc->hpd_gpio);
700
+
else if (link->hpd_src != HPD_SOURCEID_UNKNOWN)
701
+
link->irq_source_hpd_rx = DC_IRQ_SOURCE_HPD1RX + link->hpd_src;
702
+
703
+
break;
704
+
case CONNECTOR_ID_EDP:
705
+
// If smartmux is supported, only create the link on the primary eDP.
706
+
// Dual eDP is not supported with smartmux.
707
+
if (!(!link->dc->config.smart_mux_version || dc_ctx->dc_edp_id_count == 0))
708
+
goto create_fail;
709
+
710
+
link->connector_signal = SIGNAL_TYPE_EDP;
711
+
if (!link->dc->config.allow_edp_hotplug_detection
712
+
&& !is_smartmux_suported(link))
713
+
link->irq_source_hpd = DC_IRQ_SOURCE_INVALID;
714
+
715
+
switch (link->dc->config.allow_edp_hotplug_detection) {
716
+
case HPD_EN_FOR_ALL_EDP:
717
+
if (link->link_enc->hpd_gpio) {
718
+
link->irq_source_hpd_rx =
719
+
dal_irq_get_rx_source(link->link_enc->hpd_gpio);
720
+
} else if (link->hpd_src != HPD_SOURCEID_UNKNOWN) {
721
+
link->irq_source_hpd_rx = DC_IRQ_SOURCE_HPD1RX + link->hpd_src;
722
+
}
723
+
break;
724
+
case HPD_EN_FOR_PRIMARY_EDP_ONLY:
725
+
if (link->link_index == 0) {
726
+
if (link->link_enc->hpd_gpio) {
727
+
link->irq_source_hpd_rx =
728
+
dal_irq_get_rx_source(link->link_enc->hpd_gpio);
729
+
} else if (link->hpd_src != HPD_SOURCEID_UNKNOWN) {
730
+
link->irq_source_hpd_rx = DC_IRQ_SOURCE_HPD1RX + link->hpd_src;
731
+
}
732
+
} else
733
+
link->irq_source_hpd = DC_IRQ_SOURCE_INVALID;
734
+
break;
735
+
case HPD_EN_FOR_SECONDARY_EDP_ONLY:
736
+
if (link->link_index == 1) {
737
+
if (link->link_enc->hpd_gpio) {
738
+
link->irq_source_hpd_rx =
739
+
dal_irq_get_rx_source(link->link_enc->hpd_gpio);
740
+
} else if (link->hpd_src != HPD_SOURCEID_UNKNOWN) {
741
+
link->irq_source_hpd_rx = DC_IRQ_SOURCE_HPD1RX + link->hpd_src;
742
+
}
743
+
} else
744
+
link->irq_source_hpd = DC_IRQ_SOURCE_INVALID;
745
+
break;
746
+
default:
747
+
link->irq_source_hpd = DC_IRQ_SOURCE_INVALID;
748
+
break;
749
+
}
750
+
break;
751
+
case CONNECTOR_ID_LVDS:
752
+
link->connector_signal = SIGNAL_TYPE_LVDS;
753
+
break;
754
+
default:
755
+
DC_LOG_WARNING("Unsupported Connector type:%d!\n",
756
+
link->link_id.id);
757
+
goto create_fail;
758
+
}
759
+
760
+
LINK_INFO("Connector[%d] description: signal: %s\n",
761
+
init_params->connector_index,
762
+
signal_type_to_string(link->connector_signal));
593
763
594
764
/* Update link encoder tracking variables. These are used for the dynamic
595
765
* assignment of link encoders to streams.
···
792
776
DC_LOG_DC("BIOS object table - %s finished successfully.\n", __func__);
793
777
return true;
794
778
device_tag_fail:
795
-
link->link_enc->funcs->destroy(&link->link_enc);
796
779
link_enc_create_fail:
797
-
if (link->panel_cntl != NULL)
798
-
link->panel_cntl->funcs->destroy(&link->panel_cntl);
799
780
panel_cntl_create_fail:
800
-
link_destroy_ddc_service(&link->ddc);
801
781
ddc_create_fail:
802
782
create_fail:
803
-
804
-
if (link->hpd_gpio) {
805
-
dal_gpio_destroy_irq(&link->hpd_gpio);
806
-
link->hpd_gpio = NULL;
807
-
}
783
+
if (link->ddc)
784
+
link_destroy_ddc_service(&link->ddc);
785
+
if (link->panel_cntl)
786
+
link->panel_cntl->funcs->destroy(&link->panel_cntl);
787
+
if (link->link_enc)
788
+
link->link_enc->funcs->destroy(&link->link_enc);
808
789
809
790
DC_LOG_DC("BIOS object table - %s failed.\n", __func__);
810
791
return false;
+51
-120
drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c
+51
-120
drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c
···
35
35
36
36
bool link_get_hpd_state(struct dc_link *link)
37
37
{
38
-
uint32_t state = 0;
39
-
40
-
dal_gpio_lock_pin(link->hpd_gpio);
41
-
dal_gpio_get_value(link->hpd_gpio, &state);
42
-
dal_gpio_unlock_pin(link->hpd_gpio);
43
-
44
-
return state;
38
+
if (link->link_enc)
39
+
return link->link_enc->funcs->get_hpd_state(link->link_enc);
40
+
else
41
+
return false;
45
42
}
46
43
47
44
void link_enable_hpd(const struct dc_link *link)
48
45
{
49
-
struct link_encoder *encoder = link->link_enc;
50
-
51
-
if (encoder != NULL && encoder->funcs->enable_hpd != NULL)
52
-
encoder->funcs->enable_hpd(encoder);
46
+
if (link->link_enc)
47
+
link->link_enc->funcs->enable_hpd(link->link_enc);
53
48
}
54
49
55
50
void link_disable_hpd(const struct dc_link *link)
56
51
{
57
-
struct link_encoder *encoder = link->link_enc;
58
-
59
-
if (encoder != NULL && encoder->funcs->enable_hpd != NULL)
60
-
encoder->funcs->disable_hpd(encoder);
52
+
if (link->link_enc)
53
+
link->link_enc->funcs->disable_hpd(link->link_enc);
61
54
}
62
55
63
56
void link_enable_hpd_filter(struct dc_link *link, bool enable)
64
57
{
65
-
struct gpio *hpd;
66
-
67
58
if (enable) {
68
59
link->is_hpd_filter_disabled = false;
69
60
program_hpd_filter(link);
70
61
} else {
71
62
link->is_hpd_filter_disabled = true;
72
-
/* Obtain HPD handle */
73
-
hpd = link_get_hpd_gpio(link->ctx->dc_bios, link->link_id, link->ctx->gpio_service);
74
-
75
-
if (!hpd)
76
-
return;
77
-
78
-
/* Setup HPD filtering */
79
-
if (dal_gpio_open(hpd, GPIO_MODE_INTERRUPT) == GPIO_RESULT_OK) {
80
-
struct gpio_hpd_config config;
81
-
82
-
config.delay_on_connect = 0;
83
-
config.delay_on_disconnect = 0;
84
-
85
-
dal_irq_setup_hpd_filter(hpd, &config);
86
-
87
-
dal_gpio_close(hpd);
88
-
} else {
89
-
ASSERT_CRITICAL(false);
90
-
}
91
-
/* Release HPD handle */
92
-
dal_gpio_destroy_irq(&hpd);
63
+
if (link->link_enc)
64
+
link->link_enc->funcs->program_hpd_filter(link->link_enc, 0, 0);
93
65
}
66
+
}
67
+
68
+
bool program_hpd_filter(const struct dc_link *link)
69
+
{
70
+
int delay_on_connect_in_ms = 0;
71
+
int delay_on_disconnect_in_ms = 0;
72
+
73
+
if (link->is_hpd_filter_disabled || !link->link_enc) {
74
+
ASSERT(link->link_enc);
75
+
return false;
76
+
}
77
+
78
+
/* Verify feature is supported */
79
+
switch (link->connector_signal) {
80
+
case SIGNAL_TYPE_DVI_SINGLE_LINK:
81
+
case SIGNAL_TYPE_DVI_DUAL_LINK:
82
+
case SIGNAL_TYPE_HDMI_TYPE_A:
83
+
/* Program hpd filter */
84
+
delay_on_connect_in_ms = 500;
85
+
delay_on_disconnect_in_ms = 100;
86
+
break;
87
+
case SIGNAL_TYPE_DISPLAY_PORT:
88
+
case SIGNAL_TYPE_DISPLAY_PORT_MST:
89
+
/* Program hpd filter to allow DP signal to settle */
90
+
/* 500: not able to detect MST <-> SST switch as HPD is low for
91
+
* only 100ms on DELL U2413
92
+
* 0: some passive dongle still show aux mode instead of i2c
93
+
* 20-50: not enough to hide bouncing HPD with passive dongle.
94
+
* also see intermittent i2c read issues.
95
+
*/
96
+
delay_on_connect_in_ms = 80;
97
+
delay_on_disconnect_in_ms = 0;
98
+
break;
99
+
case SIGNAL_TYPE_LVDS:
100
+
case SIGNAL_TYPE_EDP:
101
+
default:
102
+
/* Don't program hpd filter */
103
+
return false;
104
+
}
105
+
106
+
return link->link_enc->funcs->program_hpd_filter(link->link_enc, delay_on_connect_in_ms, delay_on_disconnect_in_ms);
94
107
}
95
108
96
109
struct gpio *link_get_hpd_gpio(struct dc_bios *dcb,
···
121
108
hpd_info.hpd_int_gpio_uid, &pin_info);
122
109
123
110
if (bp_result != BP_RESULT_OK) {
124
-
ASSERT(bp_result == BP_RESULT_NORECORD);
125
111
return NULL;
126
112
}
127
113
128
114
return dal_gpio_service_create_irq(gpio_service,
129
115
pin_info.offset,
130
116
pin_info.mask);
131
-
}
132
-
133
-
bool query_hpd_status(struct dc_link *link, uint32_t *is_hpd_high)
134
-
{
135
-
struct gpio *hpd_pin = link_get_hpd_gpio(
136
-
link->ctx->dc_bios, link->link_id,
137
-
link->ctx->gpio_service);
138
-
if (!hpd_pin)
139
-
return false;
140
-
141
-
dal_gpio_open(hpd_pin, GPIO_MODE_INTERRUPT);
142
-
dal_gpio_get_value(hpd_pin, is_hpd_high);
143
-
dal_gpio_close(hpd_pin);
144
-
dal_gpio_destroy_irq(&hpd_pin);
145
-
return true;
146
117
}
147
118
148
119
enum hpd_source_id get_hpd_line(struct dc_link *link)
···
168
171
}
169
172
170
173
return hpd_id;
171
-
}
172
-
173
-
bool program_hpd_filter(const struct dc_link *link)
174
-
{
175
-
bool result = false;
176
-
struct gpio *hpd;
177
-
int delay_on_connect_in_ms = 0;
178
-
int delay_on_disconnect_in_ms = 0;
179
-
180
-
if (link->is_hpd_filter_disabled)
181
-
return false;
182
-
/* Verify feature is supported */
183
-
switch (link->connector_signal) {
184
-
case SIGNAL_TYPE_DVI_SINGLE_LINK:
185
-
case SIGNAL_TYPE_DVI_DUAL_LINK:
186
-
case SIGNAL_TYPE_HDMI_TYPE_A:
187
-
/* Program hpd filter */
188
-
delay_on_connect_in_ms = 500;
189
-
delay_on_disconnect_in_ms = 100;
190
-
break;
191
-
case SIGNAL_TYPE_DISPLAY_PORT:
192
-
case SIGNAL_TYPE_DISPLAY_PORT_MST:
193
-
/* Program hpd filter to allow DP signal to settle */
194
-
/* 500: not able to detect MST <-> SST switch as HPD is low for
195
-
* only 100ms on DELL U2413
196
-
* 0: some passive dongle still show aux mode instead of i2c
197
-
* 20-50: not enough to hide bouncing HPD with passive dongle.
198
-
* also see intermittent i2c read issues.
199
-
*/
200
-
delay_on_connect_in_ms = 80;
201
-
delay_on_disconnect_in_ms = 0;
202
-
break;
203
-
case SIGNAL_TYPE_LVDS:
204
-
case SIGNAL_TYPE_EDP:
205
-
default:
206
-
/* Don't program hpd filter */
207
-
return false;
208
-
}
209
-
210
-
/* Obtain HPD handle */
211
-
hpd = link_get_hpd_gpio(link->ctx->dc_bios, link->link_id,
212
-
link->ctx->gpio_service);
213
-
214
-
if (!hpd)
215
-
return result;
216
-
217
-
/* Setup HPD filtering */
218
-
if (dal_gpio_open(hpd, GPIO_MODE_INTERRUPT) == GPIO_RESULT_OK) {
219
-
struct gpio_hpd_config config;
220
-
221
-
config.delay_on_connect = delay_on_connect_in_ms;
222
-
config.delay_on_disconnect = delay_on_disconnect_in_ms;
223
-
224
-
dal_irq_setup_hpd_filter(hpd, &config);
225
-
226
-
dal_gpio_close(hpd);
227
-
228
-
result = true;
229
-
} else {
230
-
ASSERT_CRITICAL(false);
231
-
}
232
-
233
-
/* Release HPD handle */
234
-
dal_gpio_destroy_irq(&hpd);
235
-
236
-
return result;
237
174
}
-1
drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.h
-1
drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.h
···
43
43
* Returns true if HPD high.
44
44
*/
45
45
bool dpia_query_hpd_status(struct dc_link *link);
46
-
bool query_hpd_status(struct dc_link *link, uint32_t *is_hpd_high);
47
46
bool link_get_hpd_state(struct dc_link *link);
48
47
struct gpio *link_get_hpd_gpio(struct dc_bios *dcb,
49
48
struct graphics_object_id link_id,
+4
-1
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
+4
-1
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
···
317
317
AUX_REG_LIST_RI(id), SRI_ARR(AUX_DPHY_TX_CONTROL, DP_AUX, id)
318
318
319
319
/* HDP */
320
-
#define HPD_REG_LIST_RI(id) SRI_ARR(DC_HPD_CONTROL, HPD, id)
320
+
#define HPD_REG_LIST_RI(id) \
321
+
(SRI_ARR(DC_HPD_CONTROL, HPD, id), \
322
+
SRI_ARR(DC_HPD_INT_STATUS, HPD, id), \
323
+
SRI_ARR(DC_HPD_TOGGLE_FILT_CNTL, HPD, id))
321
324
322
325
/* Link encoder */
323
326
#define LE_DCN3_REG_LIST_RI(id) \