Merge tag 'riscv/for-v5.4-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Paul Walmsley:
"Some RISC-V fixes:

- Fix the virtual memory layout so the fixaddr region doesn't overlap
with other regions. (This was originally intended to go in as part
of an earlier patch, but I inadvertently dropped it during a
rebase)

- Add the DT chosen/stdout-path property to the HiFive Unleashed DT
file. This is so "earlycon" can be specified with no arguments on
the kernel command line, and the correct UART will be automatically
selected.

And two cleanup patches:

- Simplify the code in our breakpoint trap handler.

- Drop a comment in our TLB flush code that has caused some
confusion"

* tag 'riscv/for-v5.4-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
RISC-V: fix virtual address overlapped in FIXADDR_START and VMEMMAP_START
riscv: tlbflush: remove confusing comment on local_flush_tlb_all()
riscv: dts: HiFive Unleashed: add default chosen/stdout-path
riscv: remove the switch statement in do_trap_break()

Linus Torvalds 6 years ago dfdcff32 b9959c7a

+20 -23

4 changed files

expand all

arch

riscv

boot

dts

sifive

hifive-unleashed-a00.dts

include

asm

pgtable.h

tlbflush.h

kernel

traps.c

arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts

··· 13 13 compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000"; 14 14 15 15 chosen { 16 + stdout-path = "serial0"; 16 17 }; 17 18 18 19 cpus {

+8 -8

arch/riscv/include/asm/pgtable.h

··· 87 87 #define VMALLOC_END (PAGE_OFFSET - 1) 88 88 #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE) 89 89 90 - #define FIXADDR_TOP VMALLOC_START 91 - #ifdef CONFIG_64BIT 92 - #define FIXADDR_SIZE PMD_SIZE 93 - #else 94 - #define FIXADDR_SIZE PGDIR_SIZE 95 - #endif 96 - #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) 97 - 98 90 /* 99 91 * Roughly size the vmemmap space to be large enough to fit enough 100 92 * struct pages to map half the virtual address space. Then ··· 99 107 #define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE) 100 108 101 109 #define vmemmap ((struct page *)VMEMMAP_START) 110 + 111 + #define FIXADDR_TOP (VMEMMAP_START) 112 + #ifdef CONFIG_64BIT 113 + #define FIXADDR_SIZE PMD_SIZE 114 + #else 115 + #define FIXADDR_SIZE PGDIR_SIZE 116 + #endif 117 + #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) 102 118 103 119 /* 104 120 * ZERO_PAGE is a global shared page that is always zero,

-4

arch/riscv/include/asm/tlbflush.h

··· 10 10 #include <linux/mm_types.h> 11 11 #include <asm/smp.h> 12 12 13 - /* 14 - * Flush entire local TLB. 'sfence.vma' implicitly fences with the instruction 15 - * cache as well, so a 'fence.i' is not necessary. 16 - */ 17 13 static inline void local_flush_tlb_all(void) 18 14 { 19 15 __asm__ __volatile__ ("sfence.vma" : : : "memory");

+11 -11

arch/riscv/kernel/traps.c

··· 124 124 125 125 asmlinkage void do_trap_break(struct pt_regs *regs) 126 126 { 127 - if (!user_mode(regs)) { 127 + if (user_mode(regs)) { 128 + force_sig_fault(SIGTRAP, TRAP_BRKPT, 129 + (void __user *)(regs->sepc)); 130 + return; 131 + } 132 + #ifdef CONFIG_GENERIC_BUG 133 + { 128 134 enum bug_trap_type type; 129 135 130 136 type = report_bug(regs->sepc, regs); 131 - switch (type) { 132 - #ifdef CONFIG_GENERIC_BUG 133 - case BUG_TRAP_TYPE_WARN: 137 + if (type == BUG_TRAP_TYPE_WARN) { 134 138 regs->sepc += get_break_insn_length(regs->sepc); 135 139 return; 136 - case BUG_TRAP_TYPE_BUG: 137 - #endif /* CONFIG_GENERIC_BUG */ 138 - default: 139 - die(regs, "Kernel BUG"); 140 140 } 141 - } else { 142 - force_sig_fault(SIGTRAP, TRAP_BRKPT, 143 - (void __user *)(regs->sepc)); 144 141 } 142 + #endif /* CONFIG_GENERIC_BUG */ 143 + 144 + die(regs, "Kernel BUG"); 145 145 } 146 146 147 147 #ifdef CONFIG_GENERIC_BUG

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