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drm/i915/uncore: Do GT FIFO checks in early sanitize and forcewake get

We're mixing up the GT FIFO debug checks (overflows and such)
with RMbus unclaimed register checks. The two are quite different
things as RMbus is only relevant for display registers, and the
GT FIFO only relevant for GT registers.

Split the GT FIFO debugs out from the unclaimed register logic
and just do the checks during forcewake_get() and early init.
That is still sufficient to detect if any errors have happened.

Any errors would anyway be caused by overflowing the FIFO
rather than accessing specific registers, so trying to figure
out exactly when the error happened isn't particularly useful.
To fix such issues we'd rather have to do something to slow down
the rate at which registers are accessed (eg. increase
GT_FIFO_NUM_RESERVED_ENTRIES or something).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260323101609.8391-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

+50 -22
+50 -22
drivers/gpu/drm/i915/intel_uncore.c
··· 399 399 __gen6_gt_wait_for_thread_c0(uncore); 400 400 } 401 401 402 + static void 403 + gen6_check_for_fifo_debug(struct intel_uncore *uncore) 404 + { 405 + u32 fifodbg; 406 + 407 + fifodbg = __raw_uncore_read32(uncore, GTFIFODBG); 408 + 409 + if (unlikely(fifodbg)) { 410 + drm_dbg(&uncore->i915->drm, "GTFIFODBG = 0x08%x\n", fifodbg); 411 + __raw_uncore_write32(uncore, GTFIFODBG, fifodbg); 412 + } 413 + } 414 + 415 + static void 416 + fw_domains_get_normal_fifo(struct intel_uncore *uncore, 417 + enum forcewake_domains fw_domains) 418 + { 419 + gen6_check_for_fifo_debug(uncore); 420 + fw_domains_get_normal(uncore, fw_domains); 421 + } 422 + 423 + static void 424 + fw_domains_get_with_thread_status_fifo(struct intel_uncore *uncore, 425 + enum forcewake_domains fw_domains) 426 + { 427 + gen6_check_for_fifo_debug(uncore); 428 + fw_domains_get_with_thread_status(uncore, fw_domains); 429 + } 430 + 402 431 static inline u32 fifo_free_entries(struct intel_uncore *uncore) 403 432 { 404 433 u32 count = __raw_uncore_read32(uncore, GTFIFOCTL); ··· 591 562 } 592 563 593 564 static bool 594 - gen6_check_for_fifo_debug(struct intel_uncore *uncore) 595 - { 596 - u32 fifodbg; 597 - 598 - fifodbg = __raw_uncore_read32(uncore, GTFIFODBG); 599 - 600 - if (unlikely(fifodbg)) { 601 - drm_dbg(&uncore->i915->drm, "GTFIFODBG = 0x08%x\n", fifodbg); 602 - __raw_uncore_write32(uncore, GTFIFODBG, fifodbg); 603 - } 604 - 605 - return fifodbg; 606 - } 607 - 608 - static bool 609 565 check_for_unclaimed_mmio(struct intel_uncore *uncore) 610 566 { 611 567 bool ret = false; ··· 605 591 606 592 if (intel_uncore_has_dbg_unclaimed(uncore)) 607 593 ret |= vlv_check_for_unclaimed_mmio(uncore); 608 - 609 - if (intel_uncore_has_fifo(uncore)) 610 - ret |= gen6_check_for_fifo_debug(uncore); 611 594 612 595 return ret; 613 596 } ··· 621 610 GT_FIFO_CTL_BLOCK_ALL_POLICY_STALL | 622 611 GT_FIFO_CTL_RC6_POLICY_STALL); 623 612 } 613 + 614 + if (intel_uncore_has_fifo(uncore)) 615 + gen6_check_for_fifo_debug(uncore); 624 616 625 617 iosf_mbi_punit_acquire(); 626 618 intel_uncore_forcewake_reset(uncore); ··· 2169 2155 .force_wake_get = fw_domains_get_with_thread_status 2170 2156 }; 2171 2157 2158 + static const struct intel_uncore_fw_get uncore_get_normal_fifo = { 2159 + .force_wake_get = fw_domains_get_normal_fifo, 2160 + }; 2161 + 2162 + static const struct intel_uncore_fw_get uncore_get_thread_status_fifo = { 2163 + .force_wake_get = fw_domains_get_with_thread_status_fifo 2164 + }; 2165 + 2172 2166 static int intel_uncore_fw_domains_init(struct intel_uncore *uncore) 2173 2167 { 2174 2168 struct drm_i915_private *i915 = uncore->i915; ··· 2240 2218 fw_domain_init(uncore, FW_DOMAIN_ID_MEDIA, 2241 2219 FORCEWAKE_MEDIA_GEN9, FORCEWAKE_ACK_MEDIA_GEN9); 2242 2220 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { 2243 - uncore->fw_get_funcs = &uncore_get_normal; 2221 + if (intel_uncore_has_fifo(uncore)) 2222 + uncore->fw_get_funcs = &uncore_get_normal_fifo; 2223 + else 2224 + uncore->fw_get_funcs = &uncore_get_normal; 2244 2225 fw_domain_init(uncore, FW_DOMAIN_ID_RENDER, 2245 2226 FORCEWAKE_VLV, FORCEWAKE_ACK_VLV); 2246 2227 fw_domain_init(uncore, FW_DOMAIN_ID_MEDIA, 2247 2228 FORCEWAKE_MEDIA_VLV, FORCEWAKE_ACK_MEDIA_VLV); 2248 2229 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { 2249 - uncore->fw_get_funcs = &uncore_get_thread_status; 2230 + if (intel_uncore_has_fifo(uncore)) 2231 + uncore->fw_get_funcs = &uncore_get_thread_status_fifo; 2232 + else 2233 + uncore->fw_get_funcs = &uncore_get_thread_status; 2250 2234 fw_domain_init(uncore, FW_DOMAIN_ID_RENDER, 2251 2235 FORCEWAKE_MT, FORCEWAKE_ACK_HSW); 2252 2236 } else if (IS_IVYBRIDGE(i915)) { ··· 2267 2239 * (correctly) interpreted by the test below as MT 2268 2240 * forcewake being disabled. 2269 2241 */ 2270 - uncore->fw_get_funcs = &uncore_get_thread_status; 2242 + uncore->fw_get_funcs = &uncore_get_thread_status_fifo; 2271 2243 2272 2244 /* We need to init first for ECOBUS access and then 2273 2245 * determine later if we want to reinit, in case of MT access is ··· 2298 2270 FORCEWAKE, FORCEWAKE_ACK); 2299 2271 } 2300 2272 } else if (GRAPHICS_VER(i915) == 6) { 2301 - uncore->fw_get_funcs = &uncore_get_thread_status; 2273 + uncore->fw_get_funcs = &uncore_get_thread_status_fifo; 2302 2274 fw_domain_init(uncore, FW_DOMAIN_ID_RENDER, 2303 2275 FORCEWAKE, FORCEWAKE_ACK); 2304 2276 }