Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
dt-bindings: display: imx: Add i.MX8qxp Display Controller AXI performance counter
i.MX8qxp Display Controller contains a AXI performance counter which allows
measurement of average bandwidth and latency during operation.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250414035028.1561475-6-victor.liu@nxp.com
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Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-axi-performance-counter.yaml
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Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-axi-performance-counter.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-axi-performance-counter.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX8qxp Display Controller AXI Performance Counter
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description: |
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Performance counters are provided to allow measurement of average bandwidth
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and latency during operation. The following features are supported:
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* Manual and timer controlled measurement mode.
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* Measurement counters:
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- GLOBAL_COUNTER for overall measurement time
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- BUSY_COUNTER for number of data bus busy cycles
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- DATA_COUNTER for number of data transfer cycles
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- TRANSFER_COUNTER for number of transfers
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- ADDRBUSY_COUNTER for number of address bus busy cycles
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- LATENCY_COUNTER for average latency
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* Counter overflow detection.
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* Outstanding Transfer Counters (OTC) which are used for latency measurement
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have to run immediately after reset, but can be disabled by software when
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there is no need for latency measurement.
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maintainers:
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- Liu Ying <victor.liu@nxp.com>
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properties:
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compatible:
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const: fsl,imx8qxp-dc-axi-performance-counter
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx8-lpcg.h>
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pmu@5618f000 {
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compatible = "fsl,imx8qxp-dc-axi-performance-counter";
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reg = <0x5618f000 0x90>;
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clocks = <&dc0_lpcg IMX_LPCG_CLK_5>;
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};