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Merge tag 'spi-fix-v4.6-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi fixes from Mark Brown:
"A bunch of small driver specific fixes that have come up, none of them
remarkable in themselves. One fixes a regression introduced in the
merge window and another two are targetted at stable"

* tag 'spi-fix-v4.6-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
spi: pxa2xx: Do not detect number of enabled chip selects on Intel SPT
spi: spi-ti-qspi: Handle truncated frames properly
spi: spi-ti-qspi: Fix FLEN and WLEN settings if bits_per_word is overridden
spi: omap2-mcspi: Undo broken fix for dma transfer of vmalloced buffer
spi: spi-fsl-dspi: Fix cs_change handling in message transfer

+76 -37
+2 -2
drivers/spi/spi-fsl-dspi.c
··· 385 385 dspi->cur_chip = spi_get_ctldata(spi); 386 386 dspi->cs = spi->chip_select; 387 387 dspi->cs_change = 0; 388 - if (dspi->cur_transfer->transfer_list.next 389 - == &dspi->cur_msg->transfers) 388 + if (list_is_last(&dspi->cur_transfer->transfer_list, 389 + &dspi->cur_msg->transfers) || transfer->cs_change) 390 390 dspi->cs_change = 1; 391 391 dspi->void_write_data = dspi->cur_chip->void_write_data; 392 392
+45 -17
drivers/spi/spi-omap2-mcspi.c
··· 423 423 424 424 if (mcspi_dma->dma_tx) { 425 425 struct dma_async_tx_descriptor *tx; 426 + struct scatterlist sg; 426 427 427 428 dmaengine_slave_config(mcspi_dma->dma_tx, &cfg); 428 429 429 - tx = dmaengine_prep_slave_sg(mcspi_dma->dma_tx, xfer->tx_sg.sgl, 430 - xfer->tx_sg.nents, DMA_MEM_TO_DEV, 431 - DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 430 + sg_init_table(&sg, 1); 431 + sg_dma_address(&sg) = xfer->tx_dma; 432 + sg_dma_len(&sg) = xfer->len; 433 + 434 + tx = dmaengine_prep_slave_sg(mcspi_dma->dma_tx, &sg, 1, 435 + DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 432 436 if (tx) { 433 437 tx->callback = omap2_mcspi_tx_callback; 434 438 tx->callback_param = spi; ··· 478 474 479 475 if (mcspi_dma->dma_rx) { 480 476 struct dma_async_tx_descriptor *tx; 477 + struct scatterlist sg; 481 478 482 479 dmaengine_slave_config(mcspi_dma->dma_rx, &cfg); 483 480 484 481 if ((l & OMAP2_MCSPI_CHCONF_TURBO) && mcspi->fifo_depth == 0) 485 482 dma_count -= es; 486 483 487 - tx = dmaengine_prep_slave_sg(mcspi_dma->dma_rx, xfer->rx_sg.sgl, 488 - xfer->rx_sg.nents, DMA_DEV_TO_MEM, 489 - DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 484 + sg_init_table(&sg, 1); 485 + sg_dma_address(&sg) = xfer->rx_dma; 486 + sg_dma_len(&sg) = dma_count; 487 + 488 + tx = dmaengine_prep_slave_sg(mcspi_dma->dma_rx, &sg, 1, 489 + DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | 490 + DMA_CTRL_ACK); 490 491 if (tx) { 491 492 tx->callback = omap2_mcspi_rx_callback; 492 493 tx->callback_param = spi; ··· 505 496 omap2_mcspi_set_dma_req(spi, 1, 1); 506 497 507 498 wait_for_completion(&mcspi_dma->dma_rx_completion); 499 + dma_unmap_single(mcspi->dev, xfer->rx_dma, count, 500 + DMA_FROM_DEVICE); 508 501 509 502 if (mcspi->fifo_depth > 0) 510 503 return count; ··· 619 608 620 609 if (tx != NULL) { 621 610 wait_for_completion(&mcspi_dma->dma_tx_completion); 611 + dma_unmap_single(mcspi->dev, xfer->tx_dma, xfer->len, 612 + DMA_TO_DEVICE); 622 613 623 614 if (mcspi->fifo_depth > 0) { 624 615 irqstat_reg = mcspi->base + OMAP2_MCSPI_IRQSTATUS; ··· 1087 1074 gpio_free(spi->cs_gpio); 1088 1075 } 1089 1076 1090 - static bool omap2_mcspi_can_dma(struct spi_master *master, 1091 - struct spi_device *spi, 1092 - struct spi_transfer *xfer) 1093 - { 1094 - if (xfer->len < DMA_MIN_BYTES) 1095 - return false; 1096 - 1097 - return true; 1098 - } 1099 - 1100 1077 static int omap2_mcspi_work_one(struct omap2_mcspi *mcspi, 1101 1078 struct spi_device *spi, struct spi_transfer *t) 1102 1079 { ··· 1268 1265 return -EINVAL; 1269 1266 } 1270 1267 1268 + if (len < DMA_MIN_BYTES) 1269 + goto skip_dma_map; 1270 + 1271 + if (mcspi_dma->dma_tx && tx_buf != NULL) { 1272 + t->tx_dma = dma_map_single(mcspi->dev, (void *) tx_buf, 1273 + len, DMA_TO_DEVICE); 1274 + if (dma_mapping_error(mcspi->dev, t->tx_dma)) { 1275 + dev_dbg(mcspi->dev, "dma %cX %d bytes error\n", 1276 + 'T', len); 1277 + return -EINVAL; 1278 + } 1279 + } 1280 + if (mcspi_dma->dma_rx && rx_buf != NULL) { 1281 + t->rx_dma = dma_map_single(mcspi->dev, rx_buf, t->len, 1282 + DMA_FROM_DEVICE); 1283 + if (dma_mapping_error(mcspi->dev, t->rx_dma)) { 1284 + dev_dbg(mcspi->dev, "dma %cX %d bytes error\n", 1285 + 'R', len); 1286 + if (tx_buf != NULL) 1287 + dma_unmap_single(mcspi->dev, t->tx_dma, 1288 + len, DMA_TO_DEVICE); 1289 + return -EINVAL; 1290 + } 1291 + } 1292 + 1293 + skip_dma_map: 1271 1294 return omap2_mcspi_work_one(mcspi, spi, t); 1272 1295 } 1273 1296 ··· 1377 1348 master->transfer_one = omap2_mcspi_transfer_one; 1378 1349 master->set_cs = omap2_mcspi_set_cs; 1379 1350 master->cleanup = omap2_mcspi_cleanup; 1380 - master->can_dma = omap2_mcspi_can_dma; 1381 1351 master->dev.of_node = node; 1382 1352 master->max_speed_hz = OMAP2_MCSPI_MAX_FREQ; 1383 1353 master->min_speed_hz = OMAP2_MCSPI_MAX_FREQ >> 15;
+1 -1
drivers/spi/spi-pxa2xx.c
··· 126 126 .reg_general = -1, 127 127 .reg_ssp = 0x20, 128 128 .reg_cs_ctrl = 0x24, 129 - .reg_capabilities = 0xfc, 129 + .reg_capabilities = -1, 130 130 .rx_threshold = 1, 131 131 .tx_threshold_lo = 32, 132 132 .tx_threshold_hi = 56,
+28 -17
drivers/spi/spi-ti-qspi.c
··· 94 94 #define QSPI_FLEN(n) ((n - 1) << 0) 95 95 #define QSPI_WLEN_MAX_BITS 128 96 96 #define QSPI_WLEN_MAX_BYTES 16 97 + #define QSPI_WLEN_MASK QSPI_WLEN(QSPI_WLEN_MAX_BITS) 97 98 98 99 /* STATUS REGISTER */ 99 100 #define BUSY 0x01 ··· 236 235 return -ETIMEDOUT; 237 236 } 238 237 239 - static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t) 238 + static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t, 239 + int count) 240 240 { 241 - int wlen, count, xfer_len; 241 + int wlen, xfer_len; 242 242 unsigned int cmd; 243 243 const u8 *txbuf; 244 244 u32 data; 245 245 246 246 txbuf = t->tx_buf; 247 247 cmd = qspi->cmd | QSPI_WR_SNGL; 248 - count = t->len; 249 248 wlen = t->bits_per_word >> 3; /* in bytes */ 250 249 xfer_len = wlen; 251 250 ··· 305 304 return 0; 306 305 } 307 306 308 - static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t) 307 + static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t, 308 + int count) 309 309 { 310 - int wlen, count; 310 + int wlen; 311 311 unsigned int cmd; 312 312 u8 *rxbuf; 313 313 ··· 325 323 cmd |= QSPI_RD_SNGL; 326 324 break; 327 325 } 328 - count = t->len; 329 326 wlen = t->bits_per_word >> 3; /* in bytes */ 330 327 331 328 while (count) { ··· 355 354 return 0; 356 355 } 357 356 358 - static int qspi_transfer_msg(struct ti_qspi *qspi, struct spi_transfer *t) 357 + static int qspi_transfer_msg(struct ti_qspi *qspi, struct spi_transfer *t, 358 + int count) 359 359 { 360 360 int ret; 361 361 362 362 if (t->tx_buf) { 363 - ret = qspi_write_msg(qspi, t); 363 + ret = qspi_write_msg(qspi, t, count); 364 364 if (ret) { 365 365 dev_dbg(qspi->dev, "Error while writing\n"); 366 366 return ret; ··· 369 367 } 370 368 371 369 if (t->rx_buf) { 372 - ret = qspi_read_msg(qspi, t); 370 + ret = qspi_read_msg(qspi, t, count); 373 371 if (ret) { 374 372 dev_dbg(qspi->dev, "Error while reading\n"); 375 373 return ret; ··· 452 450 struct spi_device *spi = m->spi; 453 451 struct spi_transfer *t; 454 452 int status = 0, ret; 455 - int frame_length; 453 + unsigned int frame_len_words, transfer_len_words; 454 + int wlen; 456 455 457 456 /* setup device control reg */ 458 457 qspi->dc = 0; ··· 465 462 if (spi->mode & SPI_CS_HIGH) 466 463 qspi->dc |= QSPI_CSPOL(spi->chip_select); 467 464 468 - frame_length = (m->frame_length << 3) / spi->bits_per_word; 469 - 470 - frame_length = clamp(frame_length, 0, QSPI_FRAME); 465 + frame_len_words = 0; 466 + list_for_each_entry(t, &m->transfers, transfer_list) 467 + frame_len_words += t->len / (t->bits_per_word >> 3); 468 + frame_len_words = min_t(unsigned int, frame_len_words, QSPI_FRAME); 471 469 472 470 /* setup command reg */ 473 471 qspi->cmd = 0; 474 472 qspi->cmd |= QSPI_EN_CS(spi->chip_select); 475 - qspi->cmd |= QSPI_FLEN(frame_length); 473 + qspi->cmd |= QSPI_FLEN(frame_len_words); 476 474 477 475 ti_qspi_write(qspi, qspi->dc, QSPI_SPI_DC_REG); 478 476 ··· 483 479 ti_qspi_disable_memory_map(spi); 484 480 485 481 list_for_each_entry(t, &m->transfers, transfer_list) { 486 - qspi->cmd |= QSPI_WLEN(t->bits_per_word); 482 + qspi->cmd = ((qspi->cmd & ~QSPI_WLEN_MASK) | 483 + QSPI_WLEN(t->bits_per_word)); 487 484 488 - ret = qspi_transfer_msg(qspi, t); 485 + wlen = t->bits_per_word >> 3; 486 + transfer_len_words = min(t->len / wlen, frame_len_words); 487 + 488 + ret = qspi_transfer_msg(qspi, t, transfer_len_words * wlen); 489 489 if (ret) { 490 490 dev_dbg(qspi->dev, "transfer message failed\n"); 491 491 mutex_unlock(&qspi->list_lock); 492 492 return -EINVAL; 493 493 } 494 494 495 - m->actual_length += t->len; 495 + m->actual_length += transfer_len_words * wlen; 496 + frame_len_words -= transfer_len_words; 497 + if (frame_len_words == 0) 498 + break; 496 499 } 497 500 498 501 mutex_unlock(&qspi->list_lock);