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drm/amd/display: Mask DPCD field to avoid reading unsupported field value

[Why]
DSC will be disabled if DPCD 0006F[6:3] is set to a non-zero value
because bits 6:3 are not currently supported. When 6:3 is populated, an
unsupported INCREMENT OF bits_per_pixel value is read (DPCD 0006F[2:0])

[How]
Mask the INCREMENT OF bits_per_pixel field so that values in the
unsupported field are ignored.

Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Jaehyun Chung and committed by
Alex Deucher e0f7ff99 5ab79431

+3 -1
+3 -1
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
··· 192 192 } 193 193 194 194 195 - static bool dsc_bpp_increment_div_from_dpcd(int bpp_increment_dpcd, uint32_t *bpp_increment_div) 195 + static bool dsc_bpp_increment_div_from_dpcd(uint8_t bpp_increment_dpcd, uint32_t *bpp_increment_div) 196 196 { 197 + // Mask bpp increment dpcd field to avoid reading other fields 198 + bpp_increment_dpcd &= 0x7; 197 199 198 200 switch (bpp_increment_dpcd) { 199 201 case 0: