Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
gpu: nova-core: firmware: gsp: use dma::Coherent for level0 table
Replace the nova-core local `DmaObject` with a `CoherentBox` that can
fulfill the same role.
Since `CoherentBox` is more flexible than `DmaObject`, we can use the
native `u64` type for page table entries instead of messing with bytes.
The `dma` module becomes unused with that change, so remove it as well.
Reviewed-by: Gary Guo <gary@garyguo.net>
Reviewed-by: Danilo Krummrich <dakr@kernel.org>
Link: https://patch.msgid.link/20260327-b4-nova-dma-removal-v2-7-616e1d0b5cb3@nvidia.com
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
+12
-64
-53
drivers/gpu/nova-core/dma.rs
-53
drivers/gpu/nova-core/dma.rs
···
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-
// SPDX-License-Identifier: GPL-2.0
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-
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//! Simple DMA object wrapper.
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-
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use core::ops::{
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Deref,
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DerefMut, //
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};
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-
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use kernel::{
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device,
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dma::Coherent,
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page::PAGE_SIZE,
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prelude::*, //
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};
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pub(crate) struct DmaObject {
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dma: Coherent<[u8]>,
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}
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impl DmaObject {
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pub(crate) fn new(dev: &device::Device<device::Bound>, len: usize) -> Result<Self> {
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let len = core::alloc::Layout::from_size_align(len, PAGE_SIZE)
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.map_err(|_| EINVAL)?
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.pad_to_align()
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.size();
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let dma = Coherent::zeroed_slice(dev, len, GFP_KERNEL)?;
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-
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Ok(Self { dma })
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}
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-
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pub(crate) fn from_data(dev: &device::Device<device::Bound>, data: &[u8]) -> Result<Self> {
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let dma_obj = Self::new(dev, data.len())?;
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// SAFETY: We have just allocated the DMA memory, we are the only users and
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// we haven't made the device aware of the handle yet.
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unsafe { dma_obj.as_mut()[..data.len()].copy_from_slice(data) };
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Ok(dma_obj)
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}
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}
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-
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impl Deref for DmaObject {
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type Target = Coherent<[u8]>;
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-
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fn deref(&self) -> &Self::Target {
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&self.dma
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}
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}
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-
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impl DerefMut for DmaObject {
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.dma
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}
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}
+12
-10
drivers/gpu/nova-core/firmware/gsp.rs
+12
-10
drivers/gpu/nova-core/firmware/gsp.rs
···
4
4
device,
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dma::{
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Coherent,
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+
CoherentBox,
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DataDirection,
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DmaAddress, //
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},
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kvec,
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prelude::*,
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scatterlist::{
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Owned,
···
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};
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use crate::{
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dma::DmaObject,
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firmware::riscv::RiscvFirmware,
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gpu::{
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Architecture,
···
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#[pin]
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level1: SGTable<Owned<VVec<u8>>>,
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/// Level 0 page table (single 4KB page) with one entry: DMA address of first level 1 page.
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-
level0: DmaObject,
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+
level0: Coherent<[u64]>,
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/// Size in bytes of the firmware contained in [`Self::fw`].
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pub(crate) size: usize,
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/// Device-mapped GSP signatures matching the GPU's [`Chipset`].
···
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// Allocate the level 0 page table as a device-visible DMA object, and map the
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// level 1 page table onto it.
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// Level 0 page table data.
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let mut level0_data = kvec![0u8; GSP_PAGE_SIZE]?;
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// Fill level 1 page entry.
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let level1_entry = level1.iter().next().ok_or(EINVAL)?;
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let level1_entry_addr = level1_entry.dma_address();
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let dst = &mut level0_data[..size_of_val(&level1_entry_addr)];
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dst.copy_from_slice(&level1_entry_addr.to_le_bytes());
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// Turn the level0 page table into a [`DmaObject`].
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DmaObject::from_data(dev, &level0_data)?
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+
// Create level 0 page table data and fill its first entry with the level 1
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+
// table.
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+
let mut level0 = CoherentBox::<[u64]>::zeroed_slice(
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+
dev,
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+
GSP_PAGE_SIZE / size_of::<u64>(),
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+
GFP_KERNEL
211
+
)?;
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+
level0[0] = level1_entry_addr.to_le();
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+
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+
level0.into()
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},
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size,
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signatures: {