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drm/amdgpu: Add secure display v2 command

Add secure display v2 command to support multiple ROI instances per
display.

v2: fix typo and coding style issue

Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Signed-off-by: Jinzhou Su <jinzhou.su@amd.com>
Reviewed-by: Lang Yu <lang.yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Jinzhou Su and committed by
Alex Deucher
e1a34ed9 c2ee5c2f

+24 -3
+2 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
··· 2264 2264 return -EINVAL; 2265 2265 2266 2266 if (ta_cmd_id != TA_SECUREDISPLAY_COMMAND__QUERY_TA && 2267 - ta_cmd_id != TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC) 2267 + ta_cmd_id != TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC && 2268 + ta_cmd_id != TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC_V2) 2268 2269 return -EINVAL; 2269 2270 2270 2271 ret = psp_ta_invoke(psp, ta_cmd_id, &psp->securedisplay_context.context);
+22 -2
drivers/gpu/drm/amd/amdgpu/ta_secureDisplay_if.h
··· 31 31 * Secure Display Command ID 32 32 */ 33 33 enum ta_securedisplay_command { 34 - /* Query whether TA is responding used only for validation purpose */ 34 + /* Query whether TA is responding. It is used only for validation purpose */ 35 35 TA_SECUREDISPLAY_COMMAND__QUERY_TA = 1, 36 36 /* Send region of Interest and CRC value to I2C */ 37 37 TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC = 2, 38 + /* V2 to send multiple regions of Interest and CRC value to I2C */ 39 + TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC_V2 = 3, 38 40 /* Maximum Command ID */ 39 41 TA_SECUREDISPLAY_COMMAND__MAX_ID = 0x7FFFFFFF, 40 42 }; ··· 85 83 enum ta_securedisplay_buffer_size { 86 84 /* 15 bytes = 8 byte (ROI) + 6 byte(CRC) + 1 byte(phy_id) */ 87 85 TA_SECUREDISPLAY_I2C_BUFFER_SIZE = 15, 86 + /* 16 bytes = 8 byte (ROI) + 6 byte(CRC) + 1 byte(phy_id) + 1 byte(roi_idx) */ 87 + TA_SECUREDISPLAY_V2_I2C_BUFFER_SIZE = 16, 88 88 }; 89 89 90 90 /** Input/output structures for Secure Display commands */ ··· 99 95 * Physical ID to determine which DIO scratch register should be used to get ROI 100 96 */ 101 97 struct ta_securedisplay_send_roi_crc_input { 102 - uint32_t phy_id; /* Physical ID */ 98 + /* Physical ID */ 99 + uint32_t phy_id; 100 + }; 101 + 102 + struct ta_securedisplay_send_roi_crc_v2_input { 103 + /* Physical ID */ 104 + uint32_t phy_id; 105 + /* Region of interest index */ 106 + uint8_t roi_idx; 103 107 }; 104 108 105 109 /** @union ta_securedisplay_cmd_input ··· 116 104 union ta_securedisplay_cmd_input { 117 105 /* send ROI and CRC input buffer format */ 118 106 struct ta_securedisplay_send_roi_crc_input send_roi_crc; 107 + /* send ROI and CRC input buffer format, v2 adds a ROI index */ 108 + struct ta_securedisplay_send_roi_crc_v2_input send_roi_crc_v2; 119 109 uint32_t reserved[4]; 120 110 }; 121 111 ··· 142 128 uint8_t reserved; 143 129 }; 144 130 131 + struct ta_securedisplay_send_roi_crc_v2_output { 132 + uint8_t i2c_buf[TA_SECUREDISPLAY_V2_I2C_BUFFER_SIZE]; /* I2C buffer */ 133 + }; 134 + 145 135 /** @union ta_securedisplay_cmd_output 146 136 * Output buffer 147 137 */ ··· 154 136 struct ta_securedisplay_query_ta_output query_ta; 155 137 /* Send ROI CRC output buffer format used only for validation purpose */ 156 138 struct ta_securedisplay_send_roi_crc_output send_roi_crc; 139 + /* Send ROI CRC output buffer format used only for validation purpose */ 140 + struct ta_securedisplay_send_roi_crc_v2_output send_roi_crc_v2; 157 141 uint32_t reserved[4]; 158 142 }; 159 143