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dt-bindings: phy: rockchip-emmc-phy: Convert to dtschema

Convert txt bindings of Rockchip EMMC PHY to dtschema to allow
for validation.

Signed-off-by: Shresth Prasad <shresthprasad7@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240620212806.3011-2-shresthprasad7@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Shresth Prasad and committed by
Vinod Koul
e245c725 3d83abca

+77 -46
+64
Documentation/devicetree/bindings/phy/rockchip,rk3399-emmc-phy.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0-only 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/phy/rockchip,rk3399-emmc-phy.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Rockchip EMMC PHY 8 + 9 + maintainers: 10 + - Heiko Stuebner <heiko@sntech.de> 11 + 12 + properties: 13 + compatible: 14 + const: rockchip,rk3399-emmc-phy 15 + 16 + reg: 17 + maxItems: 1 18 + 19 + clocks: 20 + maxItems: 1 21 + 22 + clock-names: 23 + const: emmcclk 24 + 25 + drive-impedance-ohm: 26 + $ref: /schemas/types.yaml#/definitions/uint32 27 + description: 28 + Specifies the drive impedance in Ohm. 29 + enum: [33, 40, 50, 66, 100] 30 + default: 50 31 + 32 + rockchip,enable-strobe-pulldown: 33 + type: boolean 34 + description: | 35 + Enable internal pull-down for the strobe 36 + line. If not set, pull-down is not used. 37 + 38 + rockchip,output-tapdelay-select: 39 + $ref: /schemas/types.yaml#/definitions/uint32 40 + description: 41 + Specifies the phyctrl_otapdlysec register. 42 + default: 0x4 43 + maximum: 0xf 44 + 45 + "#phy-cells": 46 + const: 0 47 + 48 + required: 49 + - compatible 50 + - reg 51 + - "#phy-cells" 52 + 53 + additionalProperties: false 54 + 55 + examples: 56 + - | 57 + phy@f780 { 58 + compatible = "rockchip,rk3399-emmc-phy"; 59 + reg = <0xf780 0x20>; 60 + clocks = <&sdhci>; 61 + clock-names = "emmcclk"; 62 + drive-impedance-ohm = <50>; 63 + #phy-cells = <0>; 64 + };
-43
Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
··· 1 - Rockchip EMMC PHY 2 - ----------------------- 3 - 4 - Required properties: 5 - - compatible: rockchip,rk3399-emmc-phy 6 - - #phy-cells: must be 0 7 - - reg: PHY register address offset and length in "general 8 - register files" 9 - 10 - Optional properties: 11 - - clock-names: Should contain "emmcclk". Although this is listed as optional 12 - (because most boards can get basic functionality without having 13 - access to it), it is strongly suggested. 14 - See ../clock/clock-bindings.txt for details. 15 - - clocks: Should have a phandle to the card clock exported by the SDHCI driver. 16 - - drive-impedance-ohm: Specifies the drive impedance in Ohm. 17 - Possible values are 33, 40, 50, 66 and 100. 18 - If not set, the default value of 50 will be applied. 19 - - rockchip,enable-strobe-pulldown: Enable internal pull-down for the strobe 20 - line. If not set, pull-down is not used. 21 - - rockchip,output-tapdelay-select: Specifies the phyctrl_otapdlysec register. 22 - If not set, the register defaults to 0x4. 23 - Maximum value 0xf. 24 - 25 - Example: 26 - 27 - 28 - grf: syscon@ff770000 { 29 - compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; 30 - #address-cells = <1>; 31 - #size-cells = <1>; 32 - 33 - ... 34 - 35 - emmcphy: phy@f780 { 36 - compatible = "rockchip,rk3399-emmc-phy"; 37 - reg = <0xf780 0x20>; 38 - clocks = <&sdhci>; 39 - clock-names = "emmcclk"; 40 - drive-impedance-ohm = <50>; 41 - #phy-cells = <0>; 42 - }; 43 - };
+13 -3
Documentation/devicetree/bindings/soc/rockchip/grf.yaml
··· 176 176 Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt 177 177 178 178 patternProperties: 179 - "phy@[0-9a-f]+$": 180 - description: 181 - Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt 179 + "^phy@[0-9a-f]+$": 180 + type: object 181 + $ref: /schemas/phy/rockchip,rk3399-emmc-phy.yaml# 182 + unevaluatedProperties: false 182 183 183 184 - if: 184 185 properties: ··· 290 289 <&cru PCLK_VIO_GRF>; 291 290 clock-names = "dphy-ref", "dphy-cfg", "grf"; 292 291 power-domains = <&power RK3399_PD_VIO>; 292 + #phy-cells = <0>; 293 + }; 294 + 295 + phy@f780 { 296 + compatible = "rockchip,rk3399-emmc-phy"; 297 + reg = <0xf780 0x20>; 298 + clocks = <&sdhci>; 299 + clock-names = "emmcclk"; 300 + drive-impedance-ohm = <50>; 293 301 #phy-cells = <0>; 294 302 }; 295 303