Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

iommupt: Do not set C-bit on MMIO backed PTEs

AMD Secure Memory Encryption (SME) marks individual memory pages as
encrypted by setting the C-bit in page table entries. According to the
AMD APM,any pages corresponding to MMIO addresses must be configured
with the C-bit clear.

The current *_iommu_set_prot() implementation sets the C-bit on all PTEs
in the IOMMU page tables. This is incorrect for PTEs backed by MMIO, and
can break PCIe peer-to-peer communication when IOVA is used. Fix this by
avoiding the C-bit for MMIO-backed mappings.

For amdv2 IOMMU page tables, there is a usage scenario for GVA->GPA
mappings, and for the trusted MMIO in the TEE-IO case, the C-bit will need
to be added to GPA. However, SNP guests do not yet support vIOMMU, and the
trusted MMIO support is not ready in upstream. Adding the C-bit for trusted
MMIO can be considered once those features land.

Fixes: 879ced2bab1b ("iommupt: Add the AMD IOMMU v1 page table format")
Fixes: aef5de756ea8 ("iommupt: Add the x86 64 bit page table format")
Suggested-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Wei Wang <wei.w.wang@hotmail.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>

authored by

Wei Wang and committed by
Joerg Roedel
e2692c4e 16e3423f

+4 -2
+2 -1
drivers/iommu/generic_pt/fmt/amdv1.h
··· 354 354 * Ideally we'd have an IOMMU_ENCRYPTED flag set by higher levels to 355 355 * control this. For now if the tables use sme_set then so do the ptes. 356 356 */ 357 - if (pt_feature(common, PT_FEAT_AMDV1_ENCRYPT_TABLES)) 357 + if (pt_feature(common, PT_FEAT_AMDV1_ENCRYPT_TABLES) && 358 + !(iommu_prot & IOMMU_MMIO)) 358 359 pte = __sme_set(pte); 359 360 360 361 attrs->descriptor_bits = pte;
+2 -1
drivers/iommu/generic_pt/fmt/x86_64.h
··· 227 227 * Ideally we'd have an IOMMU_ENCRYPTED flag set by higher levels to 228 228 * control this. For now if the tables use sme_set then so do the ptes. 229 229 */ 230 - if (pt_feature(common, PT_FEAT_X86_64_AMD_ENCRYPT_TABLES)) 230 + if (pt_feature(common, PT_FEAT_X86_64_AMD_ENCRYPT_TABLES) && 231 + !(iommu_prot & IOMMU_MMIO)) 231 232 pte = __sme_set(pte); 232 233 233 234 attrs->descriptor_bits = pte;