+1

drivers/pci/dwc/pci-exynos.c

reviewed

··· 668 668 pci->dev = dev; 669 669 pci->ops = &dw_pcie_ops; 670 670 671 671 + ep->pci = pci; 671 672 ep->ops = (const struct exynos_pcie_ops *) 672 673 of_device_get_match_data(dev); 673 674

+1

drivers/pci/dwc/pci-imx6.c

reviewed

··· 605 605 pci->dev = dev; 606 606 pci->ops = &dw_pcie_ops; 607 607 608 608 + imx6_pcie->pci = pci; 608 609 imx6_pcie->variant = 609 610 (enum imx6_pcie_variants)of_device_get_match_data(dev); 610 611

+2

drivers/pci/dwc/pci-keystone.c

reviewed

··· 401 401 pci->dev = dev; 402 402 pci->ops = &dw_pcie_ops; 403 403 404 404 + ks_pcie->pci = pci; 405 405 + 404 406 /* initialize SerDes Phy if present */ 405 407 phy = devm_phy_get(dev, "pcie-phy"); 406 408 if (PTR_ERR_OR_ZERO(phy) == -EPROBE_DEFER)

+2

drivers/pci/dwc/pci-layerscape.c

reviewed

··· 280 280 pci->dev = dev; 281 281 pci->ops = pcie->drvdata->dw_pcie_ops; 282 282 283 283 + pcie->pci = pci; 284 284 + 283 285 dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); 284 286 pci->dbi_base = devm_ioremap_resource(dev, dbi_base); 285 287 if (IS_ERR(pci->dbi_base))

+2

drivers/pci/dwc/pcie-armada8k.c

reviewed

··· 220 220 pci->dev = dev; 221 221 pci->ops = &dw_pcie_ops; 222 222 223 223 + pcie->pci = pci; 224 224 + 223 225 pcie->clk = devm_clk_get(dev, NULL); 224 226 if (IS_ERR(pcie->clk)) 225 227 return PTR_ERR(pcie->clk);

+2

drivers/pci/dwc/pcie-artpec6.c

reviewed

··· 253 253 254 254 pci->dev = dev; 255 255 256 256 + artpec6_pcie->pci = pci; 257 257 + 256 258 dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi"); 257 259 pci->dbi_base = devm_ioremap_resource(dev, dbi_base); 258 260 if (IS_ERR(pci->dbi_base))

+2

drivers/pci/dwc/pcie-designware-plat.c

reviewed

··· 104 104 105 105 pci->dev = dev; 106 106 107 107 + dw_plat_pcie->pci = pci; 108 108 + 107 109 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 108 110 pci->dbi_base = devm_ioremap_resource(dev, res); 109 111 if (IS_ERR(pci->dbi_base))

+2

drivers/pci/dwc/pcie-hisi.c

reviewed

··· 284 284 285 285 driver = dev->driver; 286 286 287 287 + hisi_pcie->pci = pci; 288 288 + 287 289 hisi_pcie->soc_ops = of_device_get_match_data(dev); 288 290 289 291 hisi_pcie->subctrl =

+2

drivers/pci/dwc/pcie-qcom.c

reviewed

··· 686 686 pci->ops = &dw_pcie_ops; 687 687 pp = &pci->pp; 688 688 689 689 + pcie->pci = pci; 690 690 + 689 691 pcie->ops = (struct qcom_pcie_ops *)of_device_get_match_data(dev); 690 692 691 693 pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_LOW);

+2

drivers/pci/dwc/pcie-spear13xx.c

reviewed

··· 247 247 pci->dev = dev; 248 248 pci->ops = &dw_pcie_ops; 249 249 250 250 + spear13xx_pcie->pci = pci; 251 251 + 250 252 spear13xx_pcie->phy = devm_phy_get(dev, "pcie-phy"); 251 253 if (IS_ERR(spear13xx_pcie->phy)) { 252 254 ret = PTR_ERR(spear13xx_pcie->phy);

+7 -3

drivers/pci/host/pcie-altera.c

reviewed

··· 57 57 #define TLP_WRITE_TAG 0x10 58 58 #define RP_DEVFN 0 59 59 #define TLP_REQ_ID(bus, devfn) (((bus) << 8) | (devfn)) 60 60 - #define TLP_CFG_DW0(pcie, bus) \ 60 60 + #define TLP_CFGRD_DW0(pcie, bus) \ 61 61 ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGRD0 \ 62 62 : TLP_FMTTYPE_CFGRD1) << 24) | \ 63 63 + TLP_PAYLOAD_SIZE) 64 64 + #define TLP_CFGWR_DW0(pcie, bus) \ 65 65 + ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGWR0 \ 66 66 + : TLP_FMTTYPE_CFGWR1) << 24) | \ 63 67 TLP_PAYLOAD_SIZE) 64 68 #define TLP_CFG_DW1(pcie, tag, be) \ 65 69 (((TLP_REQ_ID(pcie->root_bus_nr, RP_DEVFN)) << 16) | (tag << 8) | (be)) ··· 226 222 { 227 223 u32 headers[TLP_HDR_SIZE]; 228 224 229 229 - headers[0] = TLP_CFG_DW0(pcie, bus); 225 225 + headers[0] = TLP_CFGRD_DW0(pcie, bus); 230 226 headers[1] = TLP_CFG_DW1(pcie, TLP_READ_TAG, byte_en); 231 227 headers[2] = TLP_CFG_DW2(bus, devfn, where); 232 228 ··· 241 237 u32 headers[TLP_HDR_SIZE]; 242 238 int ret; 243 239 244 244 - headers[0] = TLP_CFG_DW0(pcie, bus); 240 240 + headers[0] = TLP_CFGWR_DW0(pcie, bus); 245 241 headers[1] = TLP_CFG_DW1(pcie, TLP_WRITE_TAG, byte_en); 246 242 headers[2] = TLP_CFG_DW2(bus, devfn, where); 247 243