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drm/i915/edram: extract i915_edram.[ch] for edram detection

While edram detection ostensibly belongs with the rest of the dram stuff
in soc/intel_dram.c, it's only required by i915 core, not
display. Extract it to a separate i915_edram.[ch] file.

This allows us to drop the edram_size_mb member from struct xe_device.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/612edb7b70755655fbf193ba8af1c539fb93b698.1763578288.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

+58 -44
+1
drivers/gpu/drm/i915/Makefile
··· 27 27 i915_config.o \ 28 28 i915_driver.o \ 29 29 i915_drm_client.o \ 30 + i915_edram.o \ 30 31 i915_getparam.o \ 31 32 i915_ioctl.o \ 32 33 i915_irq.o \
+2 -1
drivers/gpu/drm/i915/i915_driver.c
··· 94 94 #include "i915_driver.h" 95 95 #include "i915_drm_client.h" 96 96 #include "i915_drv.h" 97 + #include "i915_edram.h" 97 98 #include "i915_file_private.h" 98 99 #include "i915_getparam.h" 99 100 #include "i915_hwmon.h" ··· 494 493 } 495 494 496 495 /* needs to be done before ggtt probe */ 497 - intel_dram_edram_detect(dev_priv); 496 + i915_edram_detect(dev_priv); 498 497 499 498 ret = i915_set_dma_info(dev_priv); 500 499 if (ret)
+44
drivers/gpu/drm/i915/i915_edram.c
··· 1 + // SPDX-License-Identifier: MIT 2 + /* Copyright © 2025 Intel Corporation */ 3 + 4 + #include <drm/drm_print.h> 5 + 6 + #include "i915_drv.h" 7 + #include "i915_edram.h" 8 + #include "i915_reg.h" 9 + 10 + static u32 gen9_edram_size_mb(struct drm_i915_private *i915, u32 cap) 11 + { 12 + static const u8 ways[8] = { 4, 8, 12, 16, 16, 16, 16, 16 }; 13 + static const u8 sets[4] = { 1, 1, 2, 2 }; 14 + 15 + return EDRAM_NUM_BANKS(cap) * 16 + ways[EDRAM_WAYS_IDX(cap)] * 17 + sets[EDRAM_SETS_IDX(cap)]; 18 + } 19 + 20 + void i915_edram_detect(struct drm_i915_private *i915) 21 + { 22 + u32 edram_cap = 0; 23 + 24 + if (!(IS_HASWELL(i915) || IS_BROADWELL(i915) || GRAPHICS_VER(i915) >= 9)) 25 + return; 26 + 27 + edram_cap = intel_uncore_read_fw(&i915->uncore, HSW_EDRAM_CAP); 28 + 29 + /* NB: We can't write IDICR yet because we don't have gt funcs set up */ 30 + 31 + if (!(edram_cap & EDRAM_ENABLED)) 32 + return; 33 + 34 + /* 35 + * The needed capability bits for size calculation are not there with 36 + * pre gen9 so return 128MB always. 37 + */ 38 + if (GRAPHICS_VER(i915) < 9) 39 + i915->edram_size_mb = 128; 40 + else 41 + i915->edram_size_mb = gen9_edram_size_mb(i915, edram_cap); 42 + 43 + drm_info(&i915->drm, "Found %uMB of eDRAM\n", i915->edram_size_mb); 44 + }
+11
drivers/gpu/drm/i915/i915_edram.h
··· 1 + /* SPDX-License-Identifier: MIT */ 2 + /* Copyright © 2025 Intel Corporation */ 3 + 4 + #ifndef __I915_DRAM_H__ 5 + #define __I915_DRAM_H__ 6 + 7 + struct drm_i915_private; 8 + 9 + void i915_edram_detect(struct drm_i915_private *i915); 10 + 11 + #endif /* __I915_DRAM_H__ */
-36
drivers/gpu/drm/i915/soc/intel_dram.c
··· 861 861 862 862 return i915->dram_info; 863 863 } 864 - 865 - static u32 gen9_edram_size_mb(struct drm_i915_private *i915, u32 cap) 866 - { 867 - static const u8 ways[8] = { 4, 8, 12, 16, 16, 16, 16, 16 }; 868 - static const u8 sets[4] = { 1, 1, 2, 2 }; 869 - 870 - return EDRAM_NUM_BANKS(cap) * 871 - ways[EDRAM_WAYS_IDX(cap)] * 872 - sets[EDRAM_SETS_IDX(cap)]; 873 - } 874 - 875 - void intel_dram_edram_detect(struct drm_i915_private *i915) 876 - { 877 - u32 edram_cap = 0; 878 - 879 - if (!(IS_HASWELL(i915) || IS_BROADWELL(i915) || GRAPHICS_VER(i915) >= 9)) 880 - return; 881 - 882 - edram_cap = intel_uncore_read_fw(&i915->uncore, HSW_EDRAM_CAP); 883 - 884 - /* NB: We can't write IDICR yet because we don't have gt funcs set up */ 885 - 886 - if (!(edram_cap & EDRAM_ENABLED)) 887 - return; 888 - 889 - /* 890 - * The needed capability bits for size calculation are not there with 891 - * pre gen9 so return 128MB always. 892 - */ 893 - if (GRAPHICS_VER(i915) < 9) 894 - i915->edram_size_mb = 128; 895 - else 896 - i915->edram_size_mb = gen9_edram_size_mb(i915, edram_cap); 897 - 898 - drm_info(&i915->drm, "Found %uMB of eDRAM\n", i915->edram_size_mb); 899 - }
-1
drivers/gpu/drm/i915/soc/intel_dram.h
··· 35 35 bool has_16gb_dimms; 36 36 }; 37 37 38 - void intel_dram_edram_detect(struct drm_i915_private *i915); 39 38 int intel_dram_detect(struct drm_i915_private *i915); 40 39 unsigned int intel_fsb_freq(struct drm_i915_private *i915); 41 40 unsigned int intel_mem_freq(struct drm_i915_private *i915);
-6
drivers/gpu/drm/xe/xe_device_types.h
··· 639 639 */ 640 640 const struct dram_info *dram_info; 641 641 642 - /* 643 - * edram size in MB. 644 - * Cannot be determined by PCIID. You must always read a register. 645 - */ 646 - u32 edram_size_mb; 647 - 648 642 struct intel_uncore { 649 643 spinlock_t lock; 650 644 } uncore;