Merge tag 'dmaengine-fix-5.9-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

+3 -1

drivers/dma/acpi-dma.c

··· 135 135 if (ret < 0) { 136 136 dev_warn(&adev->dev, 137 137 "error in parsing resource group\n"); 138 - return; 138 + break; 139 139 } 140 140 141 141 grp = (struct acpi_csrt_group *)((void *)grp + grp->length); 142 142 } 143 + 144 + acpi_put_table((struct acpi_table_header *)csrt); 143 145 } 144 146 145 147 /**

+9 -2

drivers/dma/at_hdmac.c

··· 1650 1650 return NULL; 1651 1651 1652 1652 dmac_pdev = of_find_device_by_node(dma_spec->np); 1653 + if (!dmac_pdev) 1654 + return NULL; 1653 1655 1654 1656 dma_cap_zero(mask); 1655 1657 dma_cap_set(DMA_SLAVE, mask); 1656 1658 1657 1659 atslave = kmalloc(sizeof(*atslave), GFP_KERNEL); 1658 - if (!atslave) 1660 + if (!atslave) { 1661 + put_device(&dmac_pdev->dev); 1659 1662 return NULL; 1663 + } 1660 1664 1661 1665 atslave->cfg = ATC_DST_H2SEL_HW | ATC_SRC_H2SEL_HW; 1662 1666 /* ··· 1689 1685 atslave->dma_dev = &dmac_pdev->dev; 1690 1686 1691 1687 chan = dma_request_channel(mask, at_dma_filter, atslave); 1692 - if (!chan) 1688 + if (!chan) { 1689 + put_device(&dmac_pdev->dev); 1690 + kfree(atslave); 1693 1691 return NULL; 1692 + } 1694 1693 1695 1694 atchan = to_at_dma_chan(chan); 1696 1695 atchan->per_if = dma_spec->args[0] & 0xff;

+19 -19

drivers/dma/dma-jz4780.c

··· 879 879 return -EINVAL; 880 880 } 881 881 882 - ret = platform_get_irq(pdev, 0); 883 - if (ret < 0) 884 - return ret; 885 - 886 - jzdma->irq = ret; 887 - 888 - ret = request_irq(jzdma->irq, jz4780_dma_irq_handler, 0, dev_name(dev), 889 - jzdma); 890 - if (ret) { 891 - dev_err(dev, "failed to request IRQ %u!\n", jzdma->irq); 892 - return ret; 893 - } 894 - 895 882 jzdma->clk = devm_clk_get(dev, NULL); 896 883 if (IS_ERR(jzdma->clk)) { 897 884 dev_err(dev, "failed to get clock\n"); 898 885 ret = PTR_ERR(jzdma->clk); 899 - goto err_free_irq; 886 + return ret; 900 887 } 901 888 902 889 clk_prepare_enable(jzdma->clk); ··· 936 949 jzchan->vchan.desc_free = jz4780_dma_desc_free; 937 950 } 938 951 952 + ret = platform_get_irq(pdev, 0); 953 + if (ret < 0) 954 + goto err_disable_clk; 955 + 956 + jzdma->irq = ret; 957 + 958 + ret = request_irq(jzdma->irq, jz4780_dma_irq_handler, 0, dev_name(dev), 959 + jzdma); 960 + if (ret) { 961 + dev_err(dev, "failed to request IRQ %u!\n", jzdma->irq); 962 + goto err_disable_clk; 963 + } 964 + 939 965 ret = dmaenginem_async_device_register(dd); 940 966 if (ret) { 941 967 dev_err(dev, "failed to register device\n"); 942 - goto err_disable_clk; 968 + goto err_free_irq; 943 969 } 944 970 945 971 /* Register with OF DMA helpers. */ ··· 960 960 jzdma); 961 961 if (ret) { 962 962 dev_err(dev, "failed to register OF DMA controller\n"); 963 - goto err_disable_clk; 963 + goto err_free_irq; 964 964 } 965 965 966 966 dev_info(dev, "JZ4780 DMA controller initialised\n"); 967 967 return 0; 968 968 969 - err_disable_clk: 970 - clk_disable_unprepare(jzdma->clk); 971 - 972 969 err_free_irq: 973 970 free_irq(jzdma->irq, jzdma); 971 + 972 + err_disable_clk: 973 + clk_disable_unprepare(jzdma->clk); 974 974 return ret; 975 975 } 976 976

+6 -5

drivers/dma/dw-edma/dw-edma-core.c

··· 405 405 if (xfer->cyclic) { 406 406 burst->dar = xfer->xfer.cyclic.paddr; 407 407 } else { 408 - burst->dar = sg_dma_address(sg); 408 + burst->dar = dst_addr; 409 409 /* Unlike the typical assumption by other 410 410 * drivers/IPs the peripheral memory isn't 411 411 * a FIFO memory, in this case, it's a ··· 413 413 * and destination addresses are increased 414 414 * by the same portion (data length) 415 415 */ 416 - src_addr += sg_dma_len(sg); 417 416 } 418 417 } else { 419 418 burst->dar = dst_addr; 420 419 if (xfer->cyclic) { 421 420 burst->sar = xfer->xfer.cyclic.paddr; 422 421 } else { 423 - burst->sar = sg_dma_address(sg); 422 + burst->sar = src_addr; 424 423 /* Unlike the typical assumption by other 425 424 * drivers/IPs the peripheral memory isn't 426 425 * a FIFO memory, in this case, it's a ··· 427 428 * and destination addresses are increased 428 429 * by the same portion (data length) 429 430 */ 430 - dst_addr += sg_dma_len(sg); 431 431 } 432 432 } 433 433 434 - if (!xfer->cyclic) 434 + if (!xfer->cyclic) { 435 + src_addr += sg_dma_len(sg); 436 + dst_addr += sg_dma_len(sg); 435 437 sg = sg_next(sg); 438 + } 436 439 } 437 440 438 441 return vchan_tx_prep(&chan->vc, &desc->vd, xfer->flags);

+26

drivers/dma/idxd/device.c

··· 410 410 return 0; 411 411 } 412 412 413 + void idxd_device_wqs_clear_state(struct idxd_device *idxd) 414 + { 415 + int i; 416 + 417 + lockdep_assert_held(&idxd->dev_lock); 418 + 419 + for (i = 0; i < idxd->max_wqs; i++) { 420 + struct idxd_wq *wq = &idxd->wqs[i]; 421 + 422 + if (wq->state == IDXD_WQ_ENABLED) { 423 + idxd_wq_disable_cleanup(wq); 424 + wq->state = IDXD_WQ_DISABLED; 425 + } 426 + } 427 + } 428 + 413 429 int idxd_device_disable(struct idxd_device *idxd) 414 430 { 415 431 struct device *dev = &idxd->pdev->dev; 416 432 u32 status; 433 + unsigned long flags; 417 434 418 435 if (!idxd_is_enabled(idxd)) { 419 436 dev_dbg(dev, "Device is not enabled\n"); ··· 446 429 return -ENXIO; 447 430 } 448 431 432 + spin_lock_irqsave(&idxd->dev_lock, flags); 433 + idxd_device_wqs_clear_state(idxd); 449 434 idxd->state = IDXD_DEV_CONF_READY; 435 + spin_unlock_irqrestore(&idxd->dev_lock, flags); 450 436 return 0; 451 437 } 452 438 453 439 void idxd_device_reset(struct idxd_device *idxd) 454 440 { 441 + unsigned long flags; 442 + 455 443 idxd_cmd_exec(idxd, IDXD_CMD_RESET_DEVICE, 0, NULL); 444 + spin_lock_irqsave(&idxd->dev_lock, flags); 445 + idxd_device_wqs_clear_state(idxd); 446 + idxd->state = IDXD_DEV_CONF_READY; 447 + spin_unlock_irqrestore(&idxd->dev_lock, flags); 456 448 } 457 449 458 450 /* Device configuration bits */

-12

drivers/dma/idxd/irq.c

··· 11 11 #include "idxd.h" 12 12 #include "registers.h" 13 13 14 - void idxd_device_wqs_clear_state(struct idxd_device *idxd) 15 - { 16 - int i; 17 - 18 - lockdep_assert_held(&idxd->dev_lock); 19 - for (i = 0; i < idxd->max_wqs; i++) { 20 - struct idxd_wq *wq = &idxd->wqs[i]; 21 - 22 - wq->state = IDXD_WQ_DISABLED; 23 - } 24 - } 25 - 26 14 static void idxd_device_reinit(struct work_struct *work) 27 15 { 28 16 struct idxd_device *idxd = container_of(work, struct idxd_device, work);

+4 -4

drivers/dma/of-dma.c

··· 71 71 return NULL; 72 72 73 73 chan = ofdma_target->of_dma_xlate(&dma_spec_target, ofdma_target); 74 - if (chan) { 75 - chan->router = ofdma->dma_router; 76 - chan->route_data = route_data; 77 - } else { 74 + if (IS_ERR_OR_NULL(chan)) { 78 75 ofdma->dma_router->route_free(ofdma->dma_router->dev, 79 76 route_data); 77 + } else { 78 + chan->router = ofdma->dma_router; 79 + chan->route_data = route_data; 80 80 } 81 81 82 82 /*

+1 -1

drivers/dma/pl330.c

··· 2797 2797 while (burst != (1 << desc->rqcfg.brst_size)) 2798 2798 desc->rqcfg.brst_size++; 2799 2799 2800 + desc->rqcfg.brst_len = get_burst_len(desc, len); 2800 2801 /* 2801 2802 * If burst size is smaller than bus width then make sure we only 2802 2803 * transfer one at a time to avoid a burst stradling an MFIFO entry. ··· 2805 2804 if (desc->rqcfg.brst_size * 8 < pl330->pcfg.data_bus_width) 2806 2805 desc->rqcfg.brst_len = 1; 2807 2806 2808 - desc->rqcfg.brst_len = get_burst_len(desc, len); 2809 2807 desc->bytes_requested = len; 2810 2808 2811 2809 desc->txd.flags = flags;

+5 -5

drivers/dma/ti/k3-udma.c

··· 2059 2059 return NULL; 2060 2060 } 2061 2061 2062 - cppi5_tr_init(&tr_req[i].flags, CPPI5_TR_TYPE1, false, false, 2063 - CPPI5_TR_EVENT_SIZE_COMPLETION, 0); 2064 - cppi5_tr_csf_set(&tr_req[i].flags, CPPI5_TR_CSF_SUPR_EVT); 2062 + cppi5_tr_init(&tr_req[tr_idx].flags, CPPI5_TR_TYPE1, false, 2063 + false, CPPI5_TR_EVENT_SIZE_COMPLETION, 0); 2064 + cppi5_tr_csf_set(&tr_req[tr_idx].flags, CPPI5_TR_CSF_SUPR_EVT); 2065 2065 2066 2066 tr_req[tr_idx].addr = sg_addr; 2067 2067 tr_req[tr_idx].icnt0 = tr0_cnt0; ··· 3101 3101 .psil_base = 0x1000, 3102 3102 .enable_memcpy_support = true, 3103 3103 .statictr_z_mask = GENMASK(11, 0), 3104 - .rchan_oes_offset = 0x2000, 3104 + .rchan_oes_offset = 0x200, 3105 3105 }; 3106 3106 3107 3107 static struct udma_match_data am654_mcu_data = { 3108 3108 .psil_base = 0x6000, 3109 3109 .enable_memcpy_support = false, 3110 3110 .statictr_z_mask = GENMASK(11, 0), 3111 - .rchan_oes_offset = 0x2000, 3111 + .rchan_oes_offset = 0x200, 3112 3112 }; 3113 3113 3114 3114 static struct udma_match_data j721e_main_data = {

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