Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'char-misc-5.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver fixes from Greg KH:
"Here are a small number of char/misc/other driver fixes for 5.18-rc5
Nothing major in here, this is mostly IIO driver fixes along with some
other small things:
- at25 driver fix for systems without a dma-able stack
- phy driver fixes for reported issues
- binder driver fixes for reported issues
All of these have been in linux-next without any reported problems"
* tag 'char-misc-5.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (31 commits)
eeprom: at25: Use DMA safe buffers
binder: Gracefully handle BINDER_TYPE_FDA objects with num_fds=0
binder: Address corner cases in deferred copy and fixup
phy: amlogic: fix error path in phy_g12a_usb3_pcie_probe()
iio: imu: inv_icm42600: Fix I2C init possible nack
iio: dac: ltc2688: fix voltage scale read
interconnect: qcom: sdx55: Drop IP0 interconnects
interconnect: qcom: sc7180: Drop IP0 interconnects
phy: ti: Add missing pm_runtime_disable() in serdes_am654_probe
phy: mapphone-mdm6600: Fix PM error handling in phy_mdm6600_probe
phy: ti: omap-usb2: Fix error handling in omap_usb2_enable_clocks
bus: mhi: host: pci_generic: Flush recovery worker during freeze
bus: mhi: host: pci_generic: Add missing poweroff() PM callback
phy: ti: tusb1210: Fix an error handling path in tusb1210_probe()
phy: samsung: exynos5250-sata: fix missing device put in probe error paths
phy: samsung: Fix missing of_node_put() in exynos_sata_phy_probe
phy: ti: Fix missing of_node_put in ti_pipe3_get_sysctrl()
phy: ti: tusb1210: Make tusb1210_chg_det_states static
iio:dac:ad3552r: Fix an IS_ERR() vs NULL check
iio: sx9324: Fix default precharge internal resistance register
...
+148
-113
+9
-1
drivers/android/binder.c
+9
-1
drivers/android/binder.c
···
2295
2295
{
2296
2296
int ret = 0;
2297
2297
struct binder_sg_copy *sgc, *tmpsgc;
2298
+
struct binder_ptr_fixup *tmppf;
2298
2299
struct binder_ptr_fixup *pf =
2299
2300
list_first_entry_or_null(pf_head, struct binder_ptr_fixup,
2300
2301
node);
···
2350
2349
list_del(&sgc->node);
2351
2350
kfree(sgc);
2352
2351
}
2353
-
BUG_ON(!list_empty(pf_head));
2352
+
list_for_each_entry_safe(pf, tmppf, pf_head, node) {
2353
+
BUG_ON(pf->skip_size == 0);
2354
+
list_del(&pf->node);
2355
+
kfree(pf);
2356
+
}
2354
2357
BUG_ON(!list_empty(sgc_head));
2355
2358
2356
2359
return ret > 0 ? -EINVAL : ret;
···
2490
2485
const void __user *sender_ufda_base;
2491
2486
struct binder_proc *proc = thread->proc;
2492
2487
int ret;
2488
+
2489
+
if (fda->num_fds == 0)
2490
+
return 0;
2493
2491
2494
2492
fd_buf_size = sizeof(u32) * fda->num_fds;
2495
2493
if (fda->num_fds >= SIZE_MAX / sizeof(u32)) {
+2
drivers/bus/mhi/host/pci_generic.c
+2
drivers/bus/mhi/host/pci_generic.c
···
1060
1060
* the intermediate restore kernel reinitializes MHI device with new
1061
1061
* context.
1062
1062
*/
1063
+
flush_work(&mhi_pdev->recovery_work);
1063
1064
if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) {
1064
1065
mhi_power_down(mhi_cntrl, true);
1065
1066
mhi_unprepare_after_power_down(mhi_cntrl);
···
1086
1085
.resume = mhi_pci_resume,
1087
1086
.freeze = mhi_pci_freeze,
1088
1087
.thaw = mhi_pci_restore,
1088
+
.poweroff = mhi_pci_freeze,
1089
1089
.restore = mhi_pci_restore,
1090
1090
#endif
1091
1091
};
+6
-6
drivers/iio/adc/ad7280a.c
+6
-6
drivers/iio/adc/ad7280a.c
···
745
745
case IIO_EV_DIR_RISING:
746
746
addr = AD7280A_CELL_OVERVOLTAGE_REG;
747
747
ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
748
-
1, val);
748
+
1, value);
749
749
if (ret)
750
750
break;
751
751
st->cell_threshhigh = value;
···
753
753
case IIO_EV_DIR_FALLING:
754
754
addr = AD7280A_CELL_UNDERVOLTAGE_REG;
755
755
ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
756
-
1, val);
756
+
1, value);
757
757
if (ret)
758
758
break;
759
759
st->cell_threshlow = value;
···
770
770
case IIO_EV_DIR_RISING:
771
771
addr = AD7280A_AUX_ADC_OVERVOLTAGE_REG;
772
772
ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
773
-
1, val);
773
+
1, value);
774
774
if (ret)
775
775
break;
776
-
st->aux_threshhigh = val;
776
+
st->aux_threshhigh = value;
777
777
break;
778
778
case IIO_EV_DIR_FALLING:
779
779
addr = AD7280A_AUX_ADC_UNDERVOLTAGE_REG;
780
780
ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
781
-
1, val);
781
+
1, value);
782
782
if (ret)
783
783
break;
784
-
st->aux_threshlow = val;
784
+
st->aux_threshlow = value;
785
785
break;
786
786
default:
787
787
ret = -EINVAL;
+4
-1
drivers/iio/chemical/scd4x.c
+4
-1
drivers/iio/chemical/scd4x.c
···
471
471
ret = scd4x_write_and_fetch(state, CMD_FRC, arg, &val, sizeof(val));
472
472
mutex_unlock(&state->lock);
473
473
474
+
if (ret)
475
+
return ret;
476
+
474
477
if (val == 0xff) {
475
478
dev_err(dev, "forced calibration has failed");
476
479
return -EINVAL;
477
480
}
478
481
479
-
return ret ?: len;
482
+
return len;
480
483
}
481
484
482
485
static IIO_DEVICE_ATTR_RW(calibration_auto_enable, 0);
+3
-3
drivers/iio/dac/ad3552r.c
+3
-3
drivers/iio/dac/ad3552r.c
···
656
656
{
657
657
struct reg_addr_pool addr;
658
658
int ret;
659
-
u16 val;
659
+
int val;
660
660
661
661
dac->gpio_reset = devm_gpiod_get_optional(&dac->spi->dev, "reset",
662
662
GPIOD_OUT_LOW);
···
809
809
810
810
gain_child = fwnode_get_named_child_node(child,
811
811
"custom-output-range-config");
812
-
if (IS_ERR(gain_child)) {
812
+
if (!gain_child) {
813
813
dev_err(dev,
814
814
"mandatory custom-output-range-config property missing\n");
815
-
return PTR_ERR(gain_child);
815
+
return -EINVAL;
816
816
}
817
817
818
818
dac->ch_data[ch].range_override = 1;
+1
-1
drivers/iio/dac/ad5446.c
+1
-1
drivers/iio/dac/ad5446.c
+1
-1
drivers/iio/dac/ad5592r-base.c
+1
-1
drivers/iio/dac/ad5592r-base.c
+1
-1
drivers/iio/dac/ltc2688.c
+1
-1
drivers/iio/dac/ltc2688.c
+18
-10
drivers/iio/dac/ti-dac5571.c
+18
-10
drivers/iio/dac/ti-dac5571.c
···
19
19
#include <linux/i2c.h>
20
20
#include <linux/module.h>
21
21
#include <linux/mod_devicetable.h>
22
+
#include <linux/property.h>
22
23
#include <linux/regulator/consumer.h>
23
24
24
25
enum chip_id {
···
312
311
const struct dac5571_spec *spec;
313
312
struct dac5571_data *data;
314
313
struct iio_dev *indio_dev;
314
+
enum chip_id chip_id;
315
315
int ret, i;
316
316
317
317
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
···
328
326
indio_dev->modes = INDIO_DIRECT_MODE;
329
327
indio_dev->channels = dac5571_channels;
330
328
331
-
spec = &dac5571_spec[id->driver_data];
329
+
if (dev_fwnode(dev))
330
+
chip_id = (uintptr_t)device_get_match_data(dev);
331
+
else
332
+
chip_id = id->driver_data;
333
+
334
+
spec = &dac5571_spec[chip_id];
335
+
332
336
indio_dev->num_channels = spec->num_channels;
333
337
data->spec = spec;
334
338
···
393
385
}
394
386
395
387
static const struct of_device_id dac5571_of_id[] = {
396
-
{.compatible = "ti,dac5571"},
397
-
{.compatible = "ti,dac6571"},
398
-
{.compatible = "ti,dac7571"},
399
-
{.compatible = "ti,dac5574"},
400
-
{.compatible = "ti,dac6574"},
401
-
{.compatible = "ti,dac7574"},
402
-
{.compatible = "ti,dac5573"},
403
-
{.compatible = "ti,dac6573"},
404
-
{.compatible = "ti,dac7573"},
388
+
{.compatible = "ti,dac5571", .data = (void *)single_8bit},
389
+
{.compatible = "ti,dac6571", .data = (void *)single_10bit},
390
+
{.compatible = "ti,dac7571", .data = (void *)single_12bit},
391
+
{.compatible = "ti,dac5574", .data = (void *)quad_8bit},
392
+
{.compatible = "ti,dac6574", .data = (void *)quad_10bit},
393
+
{.compatible = "ti,dac7574", .data = (void *)quad_12bit},
394
+
{.compatible = "ti,dac5573", .data = (void *)quad_8bit},
395
+
{.compatible = "ti,dac6573", .data = (void *)quad_10bit},
396
+
{.compatible = "ti,dac7573", .data = (void *)quad_12bit},
405
397
{}
406
398
};
407
399
MODULE_DEVICE_TABLE(of, dac5571_of_id);
+1
drivers/iio/filter/Kconfig
+1
drivers/iio/filter/Kconfig
···
8
8
config ADMV8818
9
9
tristate "Analog Devices ADMV8818 High-Pass and Low-Pass Filter"
10
10
depends on SPI && COMMON_CLK && 64BIT
11
+
select REGMAP_SPI
11
12
help
12
13
Say yes here to build support for Analog Devices ADMV8818
13
14
2 GHz to 18 GHz, Digitally Tunable, High-Pass and Low-Pass Filter.
+14
-6
drivers/iio/imu/bmi160/bmi160_core.c
+14
-6
drivers/iio/imu/bmi160/bmi160_core.c
···
730
730
731
731
ret = regmap_write(data->regmap, BMI160_REG_CMD, BMI160_CMD_SOFTRESET);
732
732
if (ret)
733
-
return ret;
733
+
goto disable_regulator;
734
734
735
735
usleep_range(BMI160_SOFTRESET_USLEEP, BMI160_SOFTRESET_USLEEP + 1);
736
736
···
741
741
if (use_spi) {
742
742
ret = regmap_read(data->regmap, BMI160_REG_DUMMY, &val);
743
743
if (ret)
744
-
return ret;
744
+
goto disable_regulator;
745
745
}
746
746
747
747
ret = regmap_read(data->regmap, BMI160_REG_CHIP_ID, &val);
748
748
if (ret) {
749
749
dev_err(dev, "Error reading chip id\n");
750
-
return ret;
750
+
goto disable_regulator;
751
751
}
752
752
if (val != BMI160_CHIP_ID_VAL) {
753
753
dev_err(dev, "Wrong chip id, got %x expected %x\n",
754
754
val, BMI160_CHIP_ID_VAL);
755
-
return -ENODEV;
755
+
ret = -ENODEV;
756
+
goto disable_regulator;
756
757
}
757
758
758
759
ret = bmi160_set_mode(data, BMI160_ACCEL, true);
759
760
if (ret)
760
-
return ret;
761
+
goto disable_regulator;
761
762
762
763
ret = bmi160_set_mode(data, BMI160_GYRO, true);
763
764
if (ret)
764
-
return ret;
765
+
goto disable_accel;
765
766
766
767
return 0;
768
+
769
+
disable_accel:
770
+
bmi160_set_mode(data, BMI160_ACCEL, false);
771
+
772
+
disable_regulator:
773
+
regulator_bulk_disable(ARRAY_SIZE(data->supplies), data->supplies);
774
+
return ret;
767
775
}
768
776
769
777
static int bmi160_data_rdy_trigger_set_state(struct iio_trigger *trig,
+9
-6
drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c
+9
-6
drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c
···
18
18
unsigned int mask, val;
19
19
int ret;
20
20
21
-
/* setup interface registers */
22
-
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG6,
23
-
INV_ICM42600_INTF_CONFIG6_MASK,
24
-
INV_ICM42600_INTF_CONFIG6_I3C_EN);
25
-
if (ret)
26
-
return ret;
21
+
/*
22
+
* setup interface registers
23
+
* This register write to REG_INTF_CONFIG6 enables a spike filter that
24
+
* is impacting the line and can prevent the I2C ACK to be seen by the
25
+
* controller. So we don't test the return value.
26
+
*/
27
+
regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG6,
28
+
INV_ICM42600_INTF_CONFIG6_MASK,
29
+
INV_ICM42600_INTF_CONFIG6_I3C_EN);
27
30
28
31
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4,
29
32
INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY, 0);
+1
drivers/iio/magnetometer/ak8975.c
+1
drivers/iio/magnetometer/ak8975.c
+25
-7
drivers/iio/proximity/sx9324.c
+25
-7
drivers/iio/proximity/sx9324.c
···
70
70
#define SX9324_REG_AFE_PH2 0x2a
71
71
#define SX9324_REG_AFE_PH3 0x2b
72
72
#define SX9324_REG_AFE_CTRL8 0x2c
73
-
#define SX9324_REG_AFE_CTRL8_RESFILTN_4KOHM 0x02
73
+
#define SX9324_REG_AFE_CTRL8_RESERVED 0x10
74
+
#define SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM 0x02
74
75
#define SX9324_REG_AFE_CTRL9 0x2d
75
76
#define SX9324_REG_AFE_CTRL9_AGAIN_1 0x08
76
77
77
78
#define SX9324_REG_PROX_CTRL0 0x30
78
79
#define SX9324_REG_PROX_CTRL0_GAIN_MASK GENMASK(5, 3)
79
-
#define SX9324_REG_PROX_CTRL0_GAIN_1 0x80
80
+
#define SX9324_REG_PROX_CTRL0_GAIN_SHIFT 3
81
+
#define SX9324_REG_PROX_CTRL0_GAIN_RSVD 0x0
82
+
#define SX9324_REG_PROX_CTRL0_GAIN_1 0x1
83
+
#define SX9324_REG_PROX_CTRL0_GAIN_8 0x4
80
84
#define SX9324_REG_PROX_CTRL0_RAWFILT_MASK GENMASK(2, 0)
81
85
#define SX9324_REG_PROX_CTRL0_RAWFILT_1P50 0x01
82
86
#define SX9324_REG_PROX_CTRL1 0x31
···
383
379
if (ret)
384
380
return ret;
385
381
386
-
*val = 1 << FIELD_GET(SX9324_REG_PROX_CTRL0_GAIN_MASK, regval);
382
+
regval = FIELD_GET(SX9324_REG_PROX_CTRL0_GAIN_MASK, regval);
383
+
if (regval)
384
+
regval--;
385
+
else if (regval == SX9324_REG_PROX_CTRL0_GAIN_RSVD ||
386
+
regval > SX9324_REG_PROX_CTRL0_GAIN_8)
387
+
return -EINVAL;
388
+
389
+
*val = 1 << regval;
387
390
388
391
return IIO_VAL_INT;
389
392
}
···
736
725
unsigned int gain, reg;
737
726
int ret;
738
727
739
-
gain = ilog2(val);
740
728
reg = SX9324_REG_PROX_CTRL0 + chan->channel / 2;
729
+
730
+
gain = ilog2(val) + 1;
731
+
if (val <= 0 || gain > SX9324_REG_PROX_CTRL0_GAIN_8)
732
+
return -EINVAL;
733
+
741
734
gain = FIELD_PREP(SX9324_REG_PROX_CTRL0_GAIN_MASK, gain);
742
735
743
736
mutex_lock(&data->mutex);
···
796
781
{ SX9324_REG_AFE_PH2, 0x1a },
797
782
{ SX9324_REG_AFE_PH3, 0x16 },
798
783
799
-
{ SX9324_REG_AFE_CTRL8, SX9324_REG_AFE_CTRL8_RESFILTN_4KOHM },
784
+
{ SX9324_REG_AFE_CTRL8, SX9324_REG_AFE_CTRL8_RESERVED |
785
+
SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM },
800
786
{ SX9324_REG_AFE_CTRL9, SX9324_REG_AFE_CTRL9_AGAIN_1 },
801
787
802
-
{ SX9324_REG_PROX_CTRL0, SX9324_REG_PROX_CTRL0_GAIN_1 |
788
+
{ SX9324_REG_PROX_CTRL0,
789
+
SX9324_REG_PROX_CTRL0_GAIN_1 << SX9324_REG_PROX_CTRL0_GAIN_SHIFT |
803
790
SX9324_REG_PROX_CTRL0_RAWFILT_1P50 },
804
-
{ SX9324_REG_PROX_CTRL1, SX9324_REG_PROX_CTRL0_GAIN_1 |
791
+
{ SX9324_REG_PROX_CTRL1,
792
+
SX9324_REG_PROX_CTRL0_GAIN_1 << SX9324_REG_PROX_CTRL0_GAIN_SHIFT |
805
793
SX9324_REG_PROX_CTRL0_RAWFILT_1P50 },
806
794
{ SX9324_REG_PROX_CTRL2, SX9324_REG_PROX_CTRL2_AVGNEG_THRESH_16K },
807
795
{ SX9324_REG_PROX_CTRL3, SX9324_REG_PROX_CTRL3_AVGDEB_2SAMPLES |
+1
drivers/iio/proximity/sx_common.c
+1
drivers/iio/proximity/sx_common.c
···
521
521
return dev_err_probe(dev, ret, "error reading WHOAMI\n");
522
522
523
523
ACPI_COMPANION_SET(&indio_dev->dev, ACPI_COMPANION(dev));
524
+
indio_dev->dev.of_node = client->dev.of_node;
524
525
indio_dev->modes = INDIO_DIRECT_MODE;
525
526
526
527
indio_dev->channels = data->chip_info->iio_channels;
-21
drivers/interconnect/qcom/sc7180.c
-21
drivers/interconnect/qcom/sc7180.c
···
47
47
DEFINE_QNODE(qnm_snoc_gc, SC7180_MASTER_SNOC_GC_MEM_NOC, 1, 8, SC7180_SLAVE_LLCC);
48
48
DEFINE_QNODE(qnm_snoc_sf, SC7180_MASTER_SNOC_SF_MEM_NOC, 1, 16, SC7180_SLAVE_LLCC);
49
49
DEFINE_QNODE(qxm_gpu, SC7180_MASTER_GFX3D, 2, 32, SC7180_SLAVE_GEM_NOC_SNOC, SC7180_SLAVE_LLCC);
50
-
DEFINE_QNODE(ipa_core_master, SC7180_MASTER_IPA_CORE, 1, 8, SC7180_SLAVE_IPA_CORE);
51
50
DEFINE_QNODE(llcc_mc, SC7180_MASTER_LLCC, 2, 4, SC7180_SLAVE_EBI1);
52
51
DEFINE_QNODE(qhm_mnoc_cfg, SC7180_MASTER_CNOC_MNOC_CFG, 1, 4, SC7180_SLAVE_SERVICE_MNOC);
53
52
DEFINE_QNODE(qxm_camnoc_hf0, SC7180_MASTER_CAMNOC_HF0, 2, 32, SC7180_SLAVE_MNOC_HF_MEM_NOC);
···
128
129
DEFINE_QNODE(qns_gem_noc_snoc, SC7180_SLAVE_GEM_NOC_SNOC, 1, 8, SC7180_MASTER_GEM_NOC_SNOC);
129
130
DEFINE_QNODE(qns_llcc, SC7180_SLAVE_LLCC, 1, 16, SC7180_MASTER_LLCC);
130
131
DEFINE_QNODE(srvc_gemnoc, SC7180_SLAVE_SERVICE_GEM_NOC, 1, 4);
131
-
DEFINE_QNODE(ipa_core_slave, SC7180_SLAVE_IPA_CORE, 1, 8);
132
132
DEFINE_QNODE(ebi, SC7180_SLAVE_EBI1, 2, 4);
133
133
DEFINE_QNODE(qns_mem_noc_hf, SC7180_SLAVE_MNOC_HF_MEM_NOC, 1, 32, SC7180_MASTER_MNOC_HF_MEM_NOC);
134
134
DEFINE_QNODE(qns_mem_noc_sf, SC7180_SLAVE_MNOC_SF_MEM_NOC, 1, 32, SC7180_MASTER_MNOC_SF_MEM_NOC);
···
158
160
DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc);
159
161
DEFINE_QBCM(bcm_mm0, "MM0", false, &qns_mem_noc_hf);
160
162
DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto);
161
-
DEFINE_QBCM(bcm_ip0, "IP0", false, &ipa_core_slave);
162
163
DEFINE_QBCM(bcm_cn0, "CN0", true, &qnm_snoc, &xm_qdss_dap, &qhs_a1_noc_cfg, &qhs_a2_noc_cfg, &qhs_ahb2phy0, &qhs_aop, &qhs_aoss, &qhs_boot_rom, &qhs_camera_cfg, &qhs_camera_nrt_throttle_cfg, &qhs_camera_rt_throttle_cfg, &qhs_clk_ctl, &qhs_cpr_cx, &qhs_cpr_mx, &qhs_crypto0_cfg, &qhs_dcc_cfg, &qhs_ddrss_cfg, &qhs_display_cfg, &qhs_display_rt_throttle_cfg, &qhs_display_throttle_cfg, &qhs_glm, &qhs_gpuss_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_mnoc_cfg, &qhs_mss_cfg, &qhs_npu_cfg, &qhs_npu_dma_throttle_cfg, &qhs_npu_dsp_throttle_cfg, &qhs_pimem_cfg, &qhs_prng, &qhs_qdss_cfg, &qhs_qm_cfg, &qhs_qm_mpu_cfg, &qhs_qup0, &qhs_qup1, &qhs_security, &qhs_snoc_cfg, &qhs_tcsr, &qhs_tlmm_1, &qhs_tlmm_2, &qhs_tlmm_3, &qhs_ufs_mem_cfg, &qhs_usb3, &qhs_venus_cfg, &qhs_venus_throttle_cfg, &qhs_vsense_ctrl_cfg, &srvc_cnoc);
163
164
DEFINE_QBCM(bcm_mm1, "MM1", false, &qxm_camnoc_hf0_uncomp, &qxm_camnoc_hf1_uncomp, &qxm_camnoc_sf_uncomp, &qhm_mnoc_cfg, &qxm_mdp0, &qxm_rot, &qxm_venus0, &qxm_venus_arm9);
164
165
DEFINE_QBCM(bcm_sh2, "SH2", false, &acm_sys_tcu);
···
369
372
.num_bcms = ARRAY_SIZE(gem_noc_bcms),
370
373
};
371
374
372
-
static struct qcom_icc_bcm *ipa_virt_bcms[] = {
373
-
&bcm_ip0,
374
-
};
375
-
376
-
static struct qcom_icc_node *ipa_virt_nodes[] = {
377
-
[MASTER_IPA_CORE] = &ipa_core_master,
378
-
[SLAVE_IPA_CORE] = &ipa_core_slave,
379
-
};
380
-
381
-
static struct qcom_icc_desc sc7180_ipa_virt = {
382
-
.nodes = ipa_virt_nodes,
383
-
.num_nodes = ARRAY_SIZE(ipa_virt_nodes),
384
-
.bcms = ipa_virt_bcms,
385
-
.num_bcms = ARRAY_SIZE(ipa_virt_bcms),
386
-
};
387
-
388
375
static struct qcom_icc_bcm *mc_virt_bcms[] = {
389
376
&bcm_acv,
390
377
&bcm_mc0,
···
500
519
.data = &sc7180_dc_noc},
501
520
{ .compatible = "qcom,sc7180-gem-noc",
502
521
.data = &sc7180_gem_noc},
503
-
{ .compatible = "qcom,sc7180-ipa-virt",
504
-
.data = &sc7180_ipa_virt},
505
522
{ .compatible = "qcom,sc7180-mc-virt",
506
523
.data = &sc7180_mc_virt},
507
524
{ .compatible = "qcom,sc7180-mmss-noc",
-21
drivers/interconnect/qcom/sdx55.c
-21
drivers/interconnect/qcom/sdx55.c
···
18
18
#include "icc-rpmh.h"
19
19
#include "sdx55.h"
20
20
21
-
DEFINE_QNODE(ipa_core_master, SDX55_MASTER_IPA_CORE, 1, 8, SDX55_SLAVE_IPA_CORE);
22
21
DEFINE_QNODE(llcc_mc, SDX55_MASTER_LLCC, 4, 4, SDX55_SLAVE_EBI_CH0);
23
22
DEFINE_QNODE(acm_tcu, SDX55_MASTER_TCU_0, 1, 8, SDX55_SLAVE_LLCC, SDX55_SLAVE_MEM_NOC_SNOC, SDX55_SLAVE_MEM_NOC_PCIE_SNOC);
24
23
DEFINE_QNODE(qnm_snoc_gc, SDX55_MASTER_SNOC_GC_MEM_NOC, 1, 8, SDX55_SLAVE_LLCC);
···
39
40
DEFINE_QNODE(xm_qdss_etr, SDX55_MASTER_QDSS_ETR, 1, 8, SDX55_SLAVE_SNOC_CFG, SDX55_SLAVE_EMAC_CFG, SDX55_SLAVE_USB3, SDX55_SLAVE_AOSS, SDX55_SLAVE_SPMI_FETCHER, SDX55_SLAVE_QDSS_CFG, SDX55_SLAVE_PDM, SDX55_SLAVE_SNOC_MEM_NOC_GC, SDX55_SLAVE_TCSR, SDX55_SLAVE_CNOC_DDRSS, SDX55_SLAVE_SPMI_VGI_COEX, SDX55_SLAVE_QPIC, SDX55_SLAVE_OCIMEM, SDX55_SLAVE_IPA_CFG, SDX55_SLAVE_USB3_PHY_CFG, SDX55_SLAVE_AOP, SDX55_SLAVE_BLSP_1, SDX55_SLAVE_SDCC_1, SDX55_SLAVE_CNOC_MSS, SDX55_SLAVE_PCIE_PARF, SDX55_SLAVE_ECC_CFG, SDX55_SLAVE_AUDIO, SDX55_SLAVE_AOSS, SDX55_SLAVE_PRNG, SDX55_SLAVE_CRYPTO_0_CFG, SDX55_SLAVE_TCU, SDX55_SLAVE_CLK_CTL, SDX55_SLAVE_IMEM_CFG);
40
41
DEFINE_QNODE(xm_sdc1, SDX55_MASTER_SDCC_1, 1, 8, SDX55_SLAVE_AOSS, SDX55_SLAVE_IPA_CFG, SDX55_SLAVE_ANOC_SNOC, SDX55_SLAVE_AOP, SDX55_SLAVE_AUDIO);
41
42
DEFINE_QNODE(xm_usb3, SDX55_MASTER_USB3, 1, 8, SDX55_SLAVE_ANOC_SNOC);
42
-
DEFINE_QNODE(ipa_core_slave, SDX55_SLAVE_IPA_CORE, 1, 8);
43
43
DEFINE_QNODE(ebi, SDX55_SLAVE_EBI_CH0, 1, 4);
44
44
DEFINE_QNODE(qns_llcc, SDX55_SLAVE_LLCC, 1, 16, SDX55_SLAVE_EBI_CH0);
45
45
DEFINE_QNODE(qns_memnoc_snoc, SDX55_SLAVE_MEM_NOC_SNOC, 1, 8, SDX55_MASTER_MEM_NOC_SNOC);
···
80
82
DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
81
83
DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc);
82
84
DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto);
83
-
DEFINE_QBCM(bcm_ip0, "IP0", false, &ipa_core_slave);
84
85
DEFINE_QBCM(bcm_pn0, "PN0", false, &qhm_snoc_cfg);
85
86
DEFINE_QBCM(bcm_sh3, "SH3", false, &xm_apps_rdwr);
86
87
DEFINE_QBCM(bcm_sh4, "SH4", false, &qns_memnoc_snoc, &qns_sys_pcie);
···
216
219
.num_bcms = ARRAY_SIZE(system_noc_bcms),
217
220
};
218
221
219
-
static struct qcom_icc_bcm *ipa_virt_bcms[] = {
220
-
&bcm_ip0,
221
-
};
222
-
223
-
static struct qcom_icc_node *ipa_virt_nodes[] = {
224
-
[MASTER_IPA_CORE] = &ipa_core_master,
225
-
[SLAVE_IPA_CORE] = &ipa_core_slave,
226
-
};
227
-
228
-
static const struct qcom_icc_desc sdx55_ipa_virt = {
229
-
.nodes = ipa_virt_nodes,
230
-
.num_nodes = ARRAY_SIZE(ipa_virt_nodes),
231
-
.bcms = ipa_virt_bcms,
232
-
.num_bcms = ARRAY_SIZE(ipa_virt_bcms),
233
-
};
234
-
235
222
static const struct of_device_id qnoc_of_match[] = {
236
223
{ .compatible = "qcom,sdx55-mc-virt",
237
224
.data = &sdx55_mc_virt},
···
223
242
.data = &sdx55_mem_noc},
224
243
{ .compatible = "qcom,sdx55-system-noc",
225
244
.data = &sdx55_system_noc},
226
-
{ .compatible = "qcom,sdx55-ipa-virt",
227
-
.data = &sdx55_ipa_virt},
228
245
{ }
229
246
};
230
247
MODULE_DEVICE_TABLE(of, qnoc_of_match);
+11
-8
drivers/misc/eeprom/at25.c
+11
-8
drivers/misc/eeprom/at25.c
···
31
31
*/
32
32
33
33
#define FM25_SN_LEN 8 /* serial number length */
34
+
#define EE_MAXADDRLEN 3 /* 24 bit addresses, up to 2 MBytes */
35
+
34
36
struct at25_data {
35
37
struct spi_eeprom chip;
36
38
struct spi_device *spi;
···
41
39
struct nvmem_config nvmem_config;
42
40
struct nvmem_device *nvmem;
43
41
u8 sernum[FM25_SN_LEN];
42
+
u8 command[EE_MAXADDRLEN + 1];
44
43
};
45
44
46
45
#define AT25_WREN 0x06 /* latch the write enable */
···
64
61
65
62
#define FM25_ID_LEN 9 /* ID length */
66
63
67
-
#define EE_MAXADDRLEN 3 /* 24 bit addresses, up to 2 MBytes */
68
-
69
64
/*
70
65
* Specs often allow 5ms for a page write, sometimes 20ms;
71
66
* it's important to recover from write timeouts.
···
79
78
{
80
79
struct at25_data *at25 = priv;
81
80
char *buf = val;
82
-
u8 command[EE_MAXADDRLEN + 1];
83
81
u8 *cp;
84
82
ssize_t status;
85
83
struct spi_transfer t[2];
···
92
92
if (unlikely(!count))
93
93
return -EINVAL;
94
94
95
-
cp = command;
95
+
cp = at25->command;
96
96
97
97
instr = AT25_READ;
98
98
if (at25->chip.flags & EE_INSTR_BIT3_IS_ADDR)
99
99
if (offset >= BIT(at25->addrlen * 8))
100
100
instr |= AT25_INSTR_BIT3;
101
+
102
+
mutex_lock(&at25->lock);
103
+
101
104
*cp++ = instr;
102
105
103
106
/* 8/16/24-bit address is written MSB first */
···
119
116
spi_message_init(&m);
120
117
memset(t, 0, sizeof(t));
121
118
122
-
t[0].tx_buf = command;
119
+
t[0].tx_buf = at25->command;
123
120
t[0].len = at25->addrlen + 1;
124
121
spi_message_add_tail(&t[0], &m);
125
122
126
123
t[1].rx_buf = buf;
127
124
t[1].len = count;
128
125
spi_message_add_tail(&t[1], &m);
129
-
130
-
mutex_lock(&at25->lock);
131
126
132
127
/*
133
128
* Read it all at once.
···
153
152
spi_message_init(&m);
154
153
memset(t, 0, sizeof(t));
155
154
156
-
t[0].tx_buf = &command;
155
+
t[0].tx_buf = at25->command;
157
156
t[0].len = 1;
158
157
spi_message_add_tail(&t[0], &m);
159
158
···
162
161
spi_message_add_tail(&t[1], &m);
163
162
164
163
mutex_lock(&at25->lock);
164
+
165
+
at25->command[0] = command;
165
166
166
167
status = spi_sync(at25->spi, &m);
167
168
dev_dbg(&at25->spi->dev, "read %d aux bytes --> %d\n", len, status);
+12
-8
drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c
+12
-8
drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c
···
414
414
415
415
ret = clk_prepare_enable(priv->clk_ref);
416
416
if (ret)
417
-
goto err_disable_clk_ref;
417
+
return ret;
418
418
419
419
priv->reset = devm_reset_control_array_get_exclusive(dev);
420
-
if (IS_ERR(priv->reset))
421
-
return PTR_ERR(priv->reset);
420
+
if (IS_ERR(priv->reset)) {
421
+
ret = PTR_ERR(priv->reset);
422
+
goto err_disable_clk_ref;
423
+
}
422
424
423
425
priv->phy = devm_phy_create(dev, np, &phy_g12a_usb3_pcie_ops);
424
426
if (IS_ERR(priv->phy)) {
425
427
ret = PTR_ERR(priv->phy);
426
-
if (ret != -EPROBE_DEFER)
427
-
dev_err(dev, "failed to create PHY\n");
428
-
429
-
return ret;
428
+
dev_err_probe(dev, ret, "failed to create PHY\n");
429
+
goto err_disable_clk_ref;
430
430
}
431
431
432
432
phy_set_drvdata(priv->phy, priv);
···
434
434
435
435
phy_provider = devm_of_phy_provider_register(dev,
436
436
phy_g12a_usb3_pcie_xlate);
437
+
if (IS_ERR(phy_provider)) {
438
+
ret = PTR_ERR(phy_provider);
439
+
goto err_disable_clk_ref;
440
+
}
437
441
438
-
return PTR_ERR_OR_ZERO(phy_provider);
442
+
return 0;
439
443
440
444
err_disable_clk_ref:
441
445
clk_disable_unprepare(priv->clk_ref);
+2
-1
drivers/phy/motorola/phy-mapphone-mdm6600.c
+2
-1
drivers/phy/motorola/phy-mapphone-mdm6600.c
+15
-6
drivers/phy/samsung/phy-exynos5250-sata.c
+15
-6
drivers/phy/samsung/phy-exynos5250-sata.c
···
187
187
return -EINVAL;
188
188
189
189
sata_phy->client = of_find_i2c_device_by_node(node);
190
+
of_node_put(node);
190
191
if (!sata_phy->client)
191
192
return -EPROBE_DEFER;
192
193
···
196
195
sata_phy->phyclk = devm_clk_get(dev, "sata_phyctrl");
197
196
if (IS_ERR(sata_phy->phyclk)) {
198
197
dev_err(dev, "failed to get clk for PHY\n");
199
-
return PTR_ERR(sata_phy->phyclk);
198
+
ret = PTR_ERR(sata_phy->phyclk);
199
+
goto put_dev;
200
200
}
201
201
202
202
ret = clk_prepare_enable(sata_phy->phyclk);
203
203
if (ret < 0) {
204
204
dev_err(dev, "failed to enable source clk\n");
205
-
return ret;
205
+
goto put_dev;
206
206
}
207
207
208
208
sata_phy->phy = devm_phy_create(dev, NULL, &exynos_sata_phy_ops);
209
209
if (IS_ERR(sata_phy->phy)) {
210
-
clk_disable_unprepare(sata_phy->phyclk);
211
210
dev_err(dev, "failed to create PHY\n");
212
-
return PTR_ERR(sata_phy->phy);
211
+
ret = PTR_ERR(sata_phy->phy);
212
+
goto clk_disable;
213
213
}
214
214
215
215
phy_set_drvdata(sata_phy->phy, sata_phy);
···
218
216
phy_provider = devm_of_phy_provider_register(dev,
219
217
of_phy_simple_xlate);
220
218
if (IS_ERR(phy_provider)) {
221
-
clk_disable_unprepare(sata_phy->phyclk);
222
-
return PTR_ERR(phy_provider);
219
+
ret = PTR_ERR(phy_provider);
220
+
goto clk_disable;
223
221
}
224
222
225
223
return 0;
224
+
225
+
clk_disable:
226
+
clk_disable_unprepare(sata_phy->phyclk);
227
+
put_dev:
228
+
put_device(&sata_phy->client->dev);
229
+
230
+
return ret;
226
231
}
227
232
228
233
static const struct of_device_id exynos_sata_phy_of_match[] = {
+1
-1
drivers/phy/ti/phy-am654-serdes.c
+1
-1
drivers/phy/ti/phy-am654-serdes.c
+1
-1
drivers/phy/ti/phy-omap-usb2.c
+1
-1
drivers/phy/ti/phy-omap-usb2.c
+1
drivers/phy/ti/phy-ti-pipe3.c
+1
drivers/phy/ti/phy-ti-pipe3.c
+9
-3
drivers/phy/ti/phy-tusb1210.c
+9
-3
drivers/phy/ti/phy-tusb1210.c
···
155
155
}
156
156
157
157
#ifdef CONFIG_POWER_SUPPLY
158
-
const char * const tusb1210_chg_det_states[] = {
158
+
static const char * const tusb1210_chg_det_states[] = {
159
159
"CHG_DET_CONNECTING",
160
160
"CHG_DET_START_DET",
161
161
"CHG_DET_READ_DET",
···
537
537
tusb1210_probe_charger_detect(tusb);
538
538
539
539
tusb->phy = ulpi_phy_create(ulpi, &phy_ops);
540
-
if (IS_ERR(tusb->phy))
541
-
return PTR_ERR(tusb->phy);
540
+
if (IS_ERR(tusb->phy)) {
541
+
ret = PTR_ERR(tusb->phy);
542
+
goto err_remove_charger;
543
+
}
542
544
543
545
phy_set_drvdata(tusb->phy, tusb);
544
546
ulpi_set_drvdata(ulpi, tusb);
545
547
return 0;
548
+
549
+
err_remove_charger:
550
+
tusb1210_remove_charger_detect(tusb);
551
+
return ret;
546
552
}
547
553
548
554
static void tusb1210_remove(struct ulpi *ulpi)