Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
ASoC: amd: acp: Remove redundant acp_dev_data structure
Move acp_dev_data structure members to acp_chip_info structure
to avoid using common members in each structure and remove redundant
acp_dev_data structure.
Signed-off-by: Venkata Prasad Potturu <venkataprasad.potturu@amd.com>
Link: https://patch.msgid.link/20250310183201.11979-8-venkataprasad.potturu@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
authored by
Venkata Prasad Potturu
and committed by
Mark Brown
e3933683
aaf7a668
+274
-418
+87
-92
sound/soc/amd/acp/acp-i2s.c
+87
-92
sound/soc/amd/acp/acp-i2s.c
···
31
31
#define ACP63_LRCLK_DIV_FIELD GENMASK(12, 2)
32
32
#define ACP63_BCLK_DIV_FIELD GENMASK(23, 13)
33
33
34
-
static inline void acp_set_i2s_clk(struct acp_dev_data *adata, int dai_id)
34
+
static inline void acp_set_i2s_clk(struct acp_chip_info *chip, int dai_id)
35
35
{
36
36
u32 i2s_clk_reg, val;
37
-
struct acp_chip_info *chip;
38
-
struct device *dev;
39
37
40
-
dev = adata->dev;
41
-
chip = dev_get_platdata(dev);
42
38
switch (dai_id) {
43
39
case I2S_SP_INSTANCE:
44
40
i2s_clk_reg = ACP_I2STDM0_MSTRCLKGEN;
···
51
55
}
52
56
53
57
val = I2S_MASTER_MODE_ENABLE;
54
-
if (adata->tdm_mode)
58
+
if (chip->tdm_mode)
55
59
val |= BIT(1);
56
60
57
61
switch (chip->acp_rev) {
58
62
case ACP63_PCI_ID:
59
63
case ACP70_PCI_ID:
60
64
case ACP71_PCI_ID:
61
-
val |= FIELD_PREP(ACP63_LRCLK_DIV_FIELD, adata->lrclk_div);
62
-
val |= FIELD_PREP(ACP63_BCLK_DIV_FIELD, adata->bclk_div);
65
+
val |= FIELD_PREP(ACP63_LRCLK_DIV_FIELD, chip->lrclk_div);
66
+
val |= FIELD_PREP(ACP63_BCLK_DIV_FIELD, chip->bclk_div);
63
67
break;
64
68
default:
65
-
val |= FIELD_PREP(LRCLK_DIV_FIELD, adata->lrclk_div);
66
-
val |= FIELD_PREP(BCLK_DIV_FIELD, adata->bclk_div);
69
+
val |= FIELD_PREP(LRCLK_DIV_FIELD, chip->lrclk_div);
70
+
val |= FIELD_PREP(BCLK_DIV_FIELD, chip->bclk_div);
67
71
}
68
-
writel(val, adata->acp_base + i2s_clk_reg);
72
+
writel(val, chip->base + i2s_clk_reg);
69
73
}
70
74
71
75
static int acp_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
72
76
unsigned int fmt)
73
77
{
74
-
struct acp_dev_data *adata = snd_soc_dai_get_drvdata(cpu_dai);
78
+
struct device *dev = cpu_dai->component->dev;
79
+
struct acp_chip_info *chip = dev_get_platdata(dev);
75
80
int mode;
76
81
77
82
mode = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
78
83
switch (mode) {
79
84
case SND_SOC_DAIFMT_I2S:
80
-
adata->tdm_mode = TDM_DISABLE;
85
+
chip->tdm_mode = TDM_DISABLE;
81
86
break;
82
87
case SND_SOC_DAIFMT_DSP_A:
83
-
adata->tdm_mode = TDM_ENABLE;
88
+
chip->tdm_mode = TDM_ENABLE;
84
89
break;
85
90
default:
86
91
return -EINVAL;
···
93
96
int slots, int slot_width)
94
97
{
95
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struct device *dev = dai->component->dev;
96
-
struct acp_dev_data *adata = snd_soc_dai_get_drvdata(dai);
97
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struct acp_chip_info *chip;
98
100
struct acp_stream *stream;
99
101
int slot_len, no_of_slots;
···
153
157
154
158
slots = no_of_slots;
155
159
156
-
spin_lock_irq(&adata->acp_lock);
157
-
list_for_each_entry(stream, &adata->stream_list, list) {
160
+
spin_lock_irq(&chip->acp_lock);
161
+
list_for_each_entry(stream, &chip->stream_list, list) {
158
162
switch (chip->acp_rev) {
159
163
case ACP_RN_PCI_ID:
160
164
case ACP_RMB_PCI_ID:
161
165
if (tx_mask && stream->dir == SNDRV_PCM_STREAM_PLAYBACK)
162
-
adata->tdm_tx_fmt[stream->dai_id - 1] =
166
+
chip->tdm_tx_fmt[stream->dai_id - 1] =
163
167
FRM_LEN | (slots << 15) | (slot_len << 18);
164
168
else if (rx_mask && stream->dir == SNDRV_PCM_STREAM_CAPTURE)
165
-
adata->tdm_rx_fmt[stream->dai_id - 1] =
169
+
chip->tdm_rx_fmt[stream->dai_id - 1] =
166
170
FRM_LEN | (slots << 15) | (slot_len << 18);
167
171
break;
168
172
case ACP63_PCI_ID:
169
173
case ACP70_PCI_ID:
170
174
case ACP71_PCI_ID:
171
175
if (tx_mask && stream->dir == SNDRV_PCM_STREAM_PLAYBACK)
172
-
adata->tdm_tx_fmt[stream->dai_id - 1] =
176
+
chip->tdm_tx_fmt[stream->dai_id - 1] =
173
177
FRM_LEN | (slots << 13) | (slot_len << 18);
174
178
else if (rx_mask && stream->dir == SNDRV_PCM_STREAM_CAPTURE)
175
-
adata->tdm_rx_fmt[stream->dai_id - 1] =
179
+
chip->tdm_rx_fmt[stream->dai_id - 1] =
176
180
FRM_LEN | (slots << 13) | (slot_len << 18);
177
181
break;
178
182
default:
179
183
dev_err(dev, "Unknown chip revision %d\n", chip->acp_rev);
180
-
spin_unlock_irq(&adata->acp_lock);
184
+
spin_unlock_irq(&chip->acp_lock);
181
185
return -EINVAL;
182
186
}
183
187
}
184
-
spin_unlock_irq(&adata->acp_lock);
188
+
spin_unlock_irq(&chip->acp_lock);
185
189
return 0;
186
190
}
187
191
···
189
193
struct snd_soc_dai *dai)
190
194
{
191
195
struct device *dev = dai->component->dev;
192
-
struct acp_dev_data *adata;
196
+
struct acp_chip_info *chip;
193
197
struct acp_resource *rsrc;
194
198
u32 val;
195
199
u32 xfer_resolution;
196
200
u32 reg_val, fmt_reg, tdm_fmt;
197
201
u32 lrclk_div_val, bclk_div_val;
198
202
199
-
adata = snd_soc_dai_get_drvdata(dai);
200
-
rsrc = adata->rsrc;
203
+
chip = dev_get_platdata(dev);
204
+
rsrc = chip->rsrc;
201
205
202
206
/* These values are as per Hardware Spec */
203
207
switch (params_format(params)) {
···
236
240
dev_err(dev, "Invalid dai id %x\n", dai->driver->id);
237
241
return -EINVAL;
238
242
}
239
-
adata->xfer_tx_resolution[dai->driver->id - 1] = xfer_resolution;
243
+
chip->xfer_tx_resolution[dai->driver->id - 1] = xfer_resolution;
240
244
} else {
241
245
switch (dai->driver->id) {
242
246
case I2S_BT_INSTANCE:
···
255
259
dev_err(dev, "Invalid dai id %x\n", dai->driver->id);
256
260
return -EINVAL;
257
261
}
258
-
adata->xfer_rx_resolution[dai->driver->id - 1] = xfer_resolution;
262
+
chip->xfer_rx_resolution[dai->driver->id - 1] = xfer_resolution;
259
263
}
260
264
261
-
val = readl(adata->acp_base + reg_val);
265
+
val = readl(chip->base + reg_val);
262
266
val &= ~ACP3x_ITER_IRER_SAMP_LEN_MASK;
263
267
val = val | (xfer_resolution << 3);
264
-
writel(val, adata->acp_base + reg_val);
268
+
writel(val, chip->base + reg_val);
265
269
266
-
if (adata->tdm_mode) {
267
-
val = readl(adata->acp_base + reg_val);
268
-
writel(val | BIT(1), adata->acp_base + reg_val);
270
+
if (chip->tdm_mode) {
271
+
val = readl(chip->base + reg_val);
272
+
writel(val | BIT(1), chip->base + reg_val);
269
273
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
270
-
tdm_fmt = adata->tdm_tx_fmt[dai->driver->id - 1];
274
+
tdm_fmt = chip->tdm_tx_fmt[dai->driver->id - 1];
271
275
else
272
-
tdm_fmt = adata->tdm_rx_fmt[dai->driver->id - 1];
273
-
writel(tdm_fmt, adata->acp_base + fmt_reg);
276
+
tdm_fmt = chip->tdm_rx_fmt[dai->driver->id - 1];
277
+
writel(tdm_fmt, chip->base + fmt_reg);
274
278
}
275
279
276
280
if (rsrc->soc_mclk) {
···
373
377
default:
374
378
break;
375
379
}
376
-
adata->lrclk_div = lrclk_div_val;
377
-
adata->bclk_div = bclk_div_val;
380
+
chip->lrclk_div = lrclk_div_val;
381
+
chip->bclk_div = bclk_div_val;
378
382
}
379
383
return 0;
380
384
}
···
383
387
{
384
388
struct acp_stream *stream = substream->runtime->private_data;
385
389
struct device *dev = dai->component->dev;
386
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
387
-
struct acp_resource *rsrc = adata->rsrc;
390
+
struct acp_chip_info *chip = dev_get_platdata(dev);
391
+
struct acp_resource *rsrc = chip->rsrc;
388
392
u32 val, period_bytes, reg_val, ier_val, water_val, buf_size, buf_reg;
389
393
390
394
period_bytes = frames_to_bytes(substream->runtime, substream->runtime->period_size);
···
394
398
case SNDRV_PCM_TRIGGER_START:
395
399
case SNDRV_PCM_TRIGGER_RESUME:
396
400
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
397
-
stream->bytescount = acp_get_byte_count(adata, stream->dai_id, substream->stream);
401
+
stream->bytescount = acp_get_byte_count(chip, stream->dai_id, substream->stream);
398
402
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
399
403
switch (dai->driver->id) {
400
404
case I2S_BT_INSTANCE:
401
-
water_val = ACP_BT_TX_INTR_WATERMARK_SIZE(adata);
405
+
water_val = ACP_BT_TX_INTR_WATERMARK_SIZE(chip);
402
406
reg_val = ACP_BTTDM_ITER;
403
407
ier_val = ACP_BTTDM_IER;
404
-
buf_reg = ACP_BT_TX_RINGBUFSIZE(adata);
408
+
buf_reg = ACP_BT_TX_RINGBUFSIZE(chip);
405
409
break;
406
410
case I2S_SP_INSTANCE:
407
-
water_val = ACP_I2S_TX_INTR_WATERMARK_SIZE(adata);
411
+
water_val = ACP_I2S_TX_INTR_WATERMARK_SIZE(chip);
408
412
reg_val = ACP_I2STDM_ITER;
409
413
ier_val = ACP_I2STDM_IER;
410
-
buf_reg = ACP_I2S_TX_RINGBUFSIZE(adata);
414
+
buf_reg = ACP_I2S_TX_RINGBUFSIZE(chip);
411
415
break;
412
416
case I2S_HS_INSTANCE:
413
417
water_val = ACP_HS_TX_INTR_WATERMARK_SIZE;
···
422
426
} else {
423
427
switch (dai->driver->id) {
424
428
case I2S_BT_INSTANCE:
425
-
water_val = ACP_BT_RX_INTR_WATERMARK_SIZE(adata);
429
+
water_val = ACP_BT_RX_INTR_WATERMARK_SIZE(chip);
426
430
reg_val = ACP_BTTDM_IRER;
427
431
ier_val = ACP_BTTDM_IER;
428
-
buf_reg = ACP_BT_RX_RINGBUFSIZE(adata);
432
+
buf_reg = ACP_BT_RX_RINGBUFSIZE(chip);
429
433
break;
430
434
case I2S_SP_INSTANCE:
431
-
water_val = ACP_I2S_RX_INTR_WATERMARK_SIZE(adata);
435
+
water_val = ACP_I2S_RX_INTR_WATERMARK_SIZE(chip);
432
436
reg_val = ACP_I2STDM_IRER;
433
437
ier_val = ACP_I2STDM_IER;
434
-
buf_reg = ACP_I2S_RX_RINGBUFSIZE(adata);
438
+
buf_reg = ACP_I2S_RX_RINGBUFSIZE(chip);
435
439
break;
436
440
case I2S_HS_INSTANCE:
437
441
water_val = ACP_HS_RX_INTR_WATERMARK_SIZE;
···
445
449
}
446
450
}
447
451
448
-
writel(period_bytes, adata->acp_base + water_val);
449
-
writel(buf_size, adata->acp_base + buf_reg);
452
+
writel(period_bytes, chip->base + water_val);
453
+
writel(buf_size, chip->base + buf_reg);
450
454
if (rsrc->soc_mclk)
451
-
acp_set_i2s_clk(adata, dai->driver->id);
452
-
val = readl(adata->acp_base + reg_val);
455
+
acp_set_i2s_clk(chip, dai->driver->id);
456
+
val = readl(chip->base + reg_val);
453
457
val = val | BIT(0);
454
-
writel(val, adata->acp_base + reg_val);
455
-
writel(1, adata->acp_base + ier_val);
458
+
writel(val, chip->base + reg_val);
459
+
writel(1, chip->base + ier_val);
456
460
return 0;
457
461
case SNDRV_PCM_TRIGGER_STOP:
458
462
case SNDRV_PCM_TRIGGER_SUSPEND:
···
489
493
return -EINVAL;
490
494
}
491
495
}
492
-
val = readl(adata->acp_base + reg_val);
496
+
val = readl(chip->base + reg_val);
493
497
val = val & ~BIT(0);
494
-
writel(val, adata->acp_base + reg_val);
498
+
writel(val, chip->base + reg_val);
495
499
496
-
if (!(readl(adata->acp_base + ACP_BTTDM_ITER) & BIT(0)) &&
497
-
!(readl(adata->acp_base + ACP_BTTDM_IRER) & BIT(0)))
498
-
writel(0, adata->acp_base + ACP_BTTDM_IER);
499
-
if (!(readl(adata->acp_base + ACP_I2STDM_ITER) & BIT(0)) &&
500
-
!(readl(adata->acp_base + ACP_I2STDM_IRER) & BIT(0)))
501
-
writel(0, adata->acp_base + ACP_I2STDM_IER);
502
-
if (!(readl(adata->acp_base + ACP_HSTDM_ITER) & BIT(0)) &&
503
-
!(readl(adata->acp_base + ACP_HSTDM_IRER) & BIT(0)))
504
-
writel(0, adata->acp_base + ACP_HSTDM_IER);
500
+
if (!(readl(chip->base + ACP_BTTDM_ITER) & BIT(0)) &&
501
+
!(readl(chip->base + ACP_BTTDM_IRER) & BIT(0)))
502
+
writel(0, chip->base + ACP_BTTDM_IER);
503
+
if (!(readl(chip->base + ACP_I2STDM_ITER) & BIT(0)) &&
504
+
!(readl(chip->base + ACP_I2STDM_IRER) & BIT(0)))
505
+
writel(0, chip->base + ACP_I2STDM_IER);
506
+
if (!(readl(chip->base + ACP_HSTDM_ITER) & BIT(0)) &&
507
+
!(readl(chip->base + ACP_HSTDM_IRER) & BIT(0)))
508
+
writel(0, chip->base + ACP_HSTDM_IER);
505
509
return 0;
506
510
default:
507
511
return -EINVAL;
···
513
517
static int acp_i2s_prepare(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
514
518
{
515
519
struct device *dev = dai->component->dev;
516
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
517
-
struct acp_chip_info *chip;
518
-
struct acp_resource *rsrc = adata->rsrc;
520
+
struct acp_chip_info *chip = dev_get_platdata(dev);
521
+
struct acp_resource *rsrc = chip->rsrc;
519
522
struct acp_stream *stream = substream->runtime->private_data;
520
523
u32 reg_dma_size = 0, reg_fifo_size = 0, reg_fifo_addr = 0;
521
524
u32 phy_addr = 0, acp_fifo_addr = 0, ext_int_ctrl;
···
524
529
switch (dai->driver->id) {
525
530
case I2S_SP_INSTANCE:
526
531
if (dir == SNDRV_PCM_STREAM_PLAYBACK) {
527
-
reg_dma_size = ACP_I2S_TX_DMA_SIZE(adata);
532
+
reg_dma_size = ACP_I2S_TX_DMA_SIZE(chip);
528
533
acp_fifo_addr = rsrc->sram_pte_offset +
529
534
SP_PB_FIFO_ADDR_OFFSET;
530
-
reg_fifo_addr = ACP_I2S_TX_FIFOADDR(adata);
531
-
reg_fifo_size = ACP_I2S_TX_FIFOSIZE(adata);
535
+
reg_fifo_addr = ACP_I2S_TX_FIFOADDR(chip);
536
+
reg_fifo_size = ACP_I2S_TX_FIFOSIZE(chip);
532
537
533
538
if (chip->acp_rev >= ACP70_PCI_ID)
534
539
phy_addr = ACP7x_I2S_SP_TX_MEM_WINDOW_START;
535
540
else
536
541
phy_addr = I2S_SP_TX_MEM_WINDOW_START + stream->reg_offset;
537
-
writel(phy_addr, adata->acp_base + ACP_I2S_TX_RINGBUFADDR(adata));
542
+
writel(phy_addr, chip->base + ACP_I2S_TX_RINGBUFADDR(chip));
538
543
} else {
539
-
reg_dma_size = ACP_I2S_RX_DMA_SIZE(adata);
544
+
reg_dma_size = ACP_I2S_RX_DMA_SIZE(chip);
540
545
acp_fifo_addr = rsrc->sram_pte_offset +
541
546
SP_CAPT_FIFO_ADDR_OFFSET;
542
-
reg_fifo_addr = ACP_I2S_RX_FIFOADDR(adata);
543
-
reg_fifo_size = ACP_I2S_RX_FIFOSIZE(adata);
547
+
reg_fifo_addr = ACP_I2S_RX_FIFOADDR(chip);
548
+
reg_fifo_size = ACP_I2S_RX_FIFOSIZE(chip);
544
549
545
550
if (chip->acp_rev >= ACP70_PCI_ID)
546
551
phy_addr = ACP7x_I2S_SP_RX_MEM_WINDOW_START;
547
552
else
548
553
phy_addr = I2S_SP_RX_MEM_WINDOW_START + stream->reg_offset;
549
-
writel(phy_addr, adata->acp_base + ACP_I2S_RX_RINGBUFADDR(adata));
554
+
writel(phy_addr, chip->base + ACP_I2S_RX_RINGBUFADDR(chip));
550
555
}
551
556
break;
552
557
case I2S_BT_INSTANCE:
553
558
if (dir == SNDRV_PCM_STREAM_PLAYBACK) {
554
-
reg_dma_size = ACP_BT_TX_DMA_SIZE(adata);
559
+
reg_dma_size = ACP_BT_TX_DMA_SIZE(chip);
555
560
acp_fifo_addr = rsrc->sram_pte_offset +
556
561
BT_PB_FIFO_ADDR_OFFSET;
557
-
reg_fifo_addr = ACP_BT_TX_FIFOADDR(adata);
558
-
reg_fifo_size = ACP_BT_TX_FIFOSIZE(adata);
562
+
reg_fifo_addr = ACP_BT_TX_FIFOADDR(chip);
563
+
reg_fifo_size = ACP_BT_TX_FIFOSIZE(chip);
559
564
560
565
if (chip->acp_rev >= ACP70_PCI_ID)
561
566
phy_addr = ACP7x_I2S_BT_TX_MEM_WINDOW_START;
562
567
else
563
568
phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
564
-
writel(phy_addr, adata->acp_base + ACP_BT_TX_RINGBUFADDR(adata));
569
+
writel(phy_addr, chip->base + ACP_BT_TX_RINGBUFADDR(chip));
565
570
} else {
566
-
reg_dma_size = ACP_BT_RX_DMA_SIZE(adata);
571
+
reg_dma_size = ACP_BT_RX_DMA_SIZE(chip);
567
572
acp_fifo_addr = rsrc->sram_pte_offset +
568
573
BT_CAPT_FIFO_ADDR_OFFSET;
569
-
reg_fifo_addr = ACP_BT_RX_FIFOADDR(adata);
570
-
reg_fifo_size = ACP_BT_RX_FIFOSIZE(adata);
574
+
reg_fifo_addr = ACP_BT_RX_FIFOADDR(chip);
575
+
reg_fifo_size = ACP_BT_RX_FIFOSIZE(chip);
571
576
572
577
if (chip->acp_rev >= ACP70_PCI_ID)
573
578
phy_addr = ACP7x_I2S_BT_RX_MEM_WINDOW_START;
574
579
else
575
580
phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
576
-
writel(phy_addr, adata->acp_base + ACP_BT_RX_RINGBUFADDR(adata));
581
+
writel(phy_addr, chip->base + ACP_BT_RX_RINGBUFADDR(chip));
577
582
}
578
583
break;
579
584
case I2S_HS_INSTANCE:
···
588
593
phy_addr = ACP7x_I2S_HS_TX_MEM_WINDOW_START;
589
594
else
590
595
phy_addr = I2S_HS_TX_MEM_WINDOW_START + stream->reg_offset;
591
-
writel(phy_addr, adata->acp_base + ACP_HS_TX_RINGBUFADDR);
596
+
writel(phy_addr, chip->base + ACP_HS_TX_RINGBUFADDR);
592
597
} else {
593
598
reg_dma_size = ACP_HS_RX_DMA_SIZE;
594
599
acp_fifo_addr = rsrc->sram_pte_offset +
···
600
605
phy_addr = ACP7x_I2S_HS_RX_MEM_WINDOW_START;
601
606
else
602
607
phy_addr = I2S_HS_RX_MEM_WINDOW_START + stream->reg_offset;
603
-
writel(phy_addr, adata->acp_base + ACP_HS_RX_RINGBUFADDR);
608
+
writel(phy_addr, chip->base + ACP_HS_RX_RINGBUFADDR);
604
609
}
605
610
break;
606
611
default:
···
608
613
return -EINVAL;
609
614
}
610
615
611
-
writel(DMA_SIZE, adata->acp_base + reg_dma_size);
612
-
writel(acp_fifo_addr, adata->acp_base + reg_fifo_addr);
613
-
writel(FIFO_SIZE, adata->acp_base + reg_fifo_size);
616
+
writel(DMA_SIZE, chip->base + reg_dma_size);
617
+
writel(acp_fifo_addr, chip->base + reg_fifo_addr);
618
+
writel(FIFO_SIZE, chip->base + reg_fifo_size);
614
619
615
620
ext_int_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(chip, rsrc->irqp_used));
616
621
ext_int_ctrl |= BIT(I2S_RX_THRESHOLD(rsrc->offset)) |
···
629
634
{
630
635
struct acp_stream *stream = substream->runtime->private_data;
631
636
struct device *dev = dai->component->dev;
632
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
633
-
struct acp_resource *rsrc = adata->rsrc;
637
+
struct acp_chip_info *chip = dev_get_platdata(dev);
638
+
struct acp_resource *rsrc = chip->rsrc;
634
639
unsigned int dir = substream->stream;
635
640
unsigned int irq_bit = 0;
636
641
+51
-56
sound/soc/amd/acp/acp-legacy-common.c
+51
-56
sound/soc/amd/acp/acp-legacy-common.c
···
38
38
irqreturn_t acp_irq_handler(int irq, void *data)
39
39
{
40
40
struct acp_chip_info *chip = data;
41
-
struct acp_dev_data *adata = chip->adata;
42
-
struct acp_resource *rsrc = adata->rsrc;
41
+
struct acp_resource *rsrc = chip->rsrc;
43
42
struct acp_stream *stream;
44
43
u16 i2s_flag = 0;
45
44
u32 ext_intr_stat, ext_intr_stat1;
46
45
47
-
if (adata->rsrc->no_of_ctrls == 2)
46
+
if (rsrc->no_of_ctrls == 2)
48
47
ext_intr_stat1 = readl(ACP_EXTERNAL_INTR_STAT(chip, (rsrc->irqp_used - 1)));
49
48
50
49
ext_intr_stat = readl(ACP_EXTERNAL_INTR_STAT(chip, rsrc->irqp_used));
51
50
52
-
spin_lock(&adata->acp_lock);
53
-
list_for_each_entry(stream, &adata->stream_list, list) {
51
+
spin_lock(&chip->acp_lock);
52
+
list_for_each_entry(stream, &chip->stream_list, list) {
54
53
if (ext_intr_stat & stream->irq_bit) {
55
54
writel(stream->irq_bit,
56
55
ACP_EXTERNAL_INTR_STAT(chip, rsrc->irqp_used));
57
56
snd_pcm_period_elapsed(stream->substream);
58
57
i2s_flag = 1;
59
58
}
60
-
if (adata->rsrc->no_of_ctrls == 2) {
59
+
if (chip->rsrc->no_of_ctrls == 2) {
61
60
if (ext_intr_stat1 & stream->irq_bit) {
62
61
writel(stream->irq_bit, ACP_EXTERNAL_INTR_STAT(chip,
63
62
(rsrc->irqp_used - 1)));
···
65
66
}
66
67
}
67
68
}
68
-
spin_unlock(&adata->acp_lock);
69
+
spin_unlock(&chip->acp_lock);
69
70
if (i2s_flag)
70
71
return IRQ_HANDLED;
71
72
···
105
106
struct snd_pcm_runtime *runtime = substream->runtime;
106
107
struct acp_stream *stream = runtime->private_data;
107
108
struct device *dev = dai->component->dev;
108
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
109
+
struct acp_chip_info *chip = dev_get_platdata(dev);
109
110
110
111
u32 physical_addr, pdm_size, period_bytes;
111
112
···
114
115
physical_addr = stream->reg_offset + MEM_WINDOW_START;
115
116
116
117
/* Init ACP PDM Ring buffer */
117
-
writel(physical_addr, adata->acp_base + ACP_WOV_RX_RINGBUFADDR);
118
-
writel(pdm_size, adata->acp_base + ACP_WOV_RX_RINGBUFSIZE);
119
-
writel(period_bytes, adata->acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE);
120
-
writel(0x01, adata->acp_base + ACPAXI2AXI_ATU_CTRL);
118
+
writel(physical_addr, chip->base + ACP_WOV_RX_RINGBUFADDR);
119
+
writel(pdm_size, chip->base + ACP_WOV_RX_RINGBUFSIZE);
120
+
writel(period_bytes, chip->base + ACP_WOV_RX_INTR_WATERMARK_SIZE);
121
+
writel(0x01, chip->base + ACPAXI2AXI_ATU_CTRL);
121
122
}
122
123
123
124
static void set_acp_pdm_clk(struct snd_pcm_substream *substream,
124
125
struct snd_soc_dai *dai)
125
126
{
126
127
struct device *dev = dai->component->dev;
127
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
128
+
struct acp_chip_info *chip = dev_get_platdata(dev);
128
129
unsigned int pdm_ctrl;
129
130
130
131
/* Enable default ACP PDM clk */
131
-
writel(PDM_CLK_FREQ_MASK, adata->acp_base + ACP_WOV_CLK_CTRL);
132
-
pdm_ctrl = readl(adata->acp_base + ACP_WOV_MISC_CTRL);
132
+
writel(PDM_CLK_FREQ_MASK, chip->base + ACP_WOV_CLK_CTRL);
133
+
pdm_ctrl = readl(chip->base + ACP_WOV_MISC_CTRL);
133
134
pdm_ctrl |= PDM_MISC_CTRL_MASK;
134
-
writel(pdm_ctrl, adata->acp_base + ACP_WOV_MISC_CTRL);
135
+
writel(pdm_ctrl, chip->base + ACP_WOV_MISC_CTRL);
135
136
set_acp_pdm_ring_buffer(substream, dai);
136
137
}
137
138
138
139
void restore_acp_pdm_params(struct snd_pcm_substream *substream,
139
-
struct acp_dev_data *adata)
140
+
struct acp_chip_info *chip)
140
141
{
141
142
struct snd_soc_dai *dai;
142
-
struct device *dev;
143
-
struct acp_chip_info *chip;
144
143
struct snd_soc_pcm_runtime *soc_runtime;
145
144
u32 ext_int_ctrl;
146
145
147
146
soc_runtime = snd_soc_substream_to_rtd(substream);
148
147
dai = snd_soc_rtd_to_cpu(soc_runtime, 0);
149
-
dev = dai->component->dev;
150
-
chip = dev_get_platdata(dev);
148
+
151
149
/* Programming channel mask and sampling rate */
152
-
writel(adata->ch_mask, adata->acp_base + ACP_WOV_PDM_NO_OF_CHANNELS);
153
-
writel(PDM_DEC_64, adata->acp_base + ACP_WOV_PDM_DECIMATION_FACTOR);
150
+
writel(chip->ch_mask, chip->base + ACP_WOV_PDM_NO_OF_CHANNELS);
151
+
writel(PDM_DEC_64, chip->base + ACP_WOV_PDM_DECIMATION_FACTOR);
154
152
155
153
/* Enabling ACP Pdm interuppts */
156
154
ext_int_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(chip, 0));
···
161
165
struct snd_soc_dai *dai)
162
166
{
163
167
struct device *dev = dai->component->dev;
164
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
165
-
struct acp_resource *rsrc = adata->rsrc;
166
168
struct acp_chip_info *chip = dev_get_platdata(dev);
169
+
struct acp_resource *rsrc = chip->rsrc;
167
170
struct acp_stream *stream = substream->runtime->private_data;
168
171
u32 reg_dma_size, reg_fifo_size, reg_fifo_addr;
169
172
u32 phy_addr, acp_fifo_addr, ext_int_ctrl;
···
171
176
switch (dai->driver->id) {
172
177
case I2S_SP_INSTANCE:
173
178
if (dir == SNDRV_PCM_STREAM_PLAYBACK) {
174
-
reg_dma_size = ACP_I2S_TX_DMA_SIZE(adata);
179
+
reg_dma_size = ACP_I2S_TX_DMA_SIZE(chip);
175
180
acp_fifo_addr = rsrc->sram_pte_offset +
176
181
SP_PB_FIFO_ADDR_OFFSET;
177
-
reg_fifo_addr = ACP_I2S_TX_FIFOADDR(adata);
178
-
reg_fifo_size = ACP_I2S_TX_FIFOSIZE(adata);
182
+
reg_fifo_addr = ACP_I2S_TX_FIFOADDR(chip);
183
+
reg_fifo_size = ACP_I2S_TX_FIFOSIZE(chip);
179
184
phy_addr = I2S_SP_TX_MEM_WINDOW_START + stream->reg_offset;
180
-
writel(phy_addr, adata->acp_base + ACP_I2S_TX_RINGBUFADDR(adata));
185
+
writel(phy_addr, chip->base + ACP_I2S_TX_RINGBUFADDR(chip));
181
186
} else {
182
-
reg_dma_size = ACP_I2S_RX_DMA_SIZE(adata);
187
+
reg_dma_size = ACP_I2S_RX_DMA_SIZE(chip);
183
188
acp_fifo_addr = rsrc->sram_pte_offset +
184
189
SP_CAPT_FIFO_ADDR_OFFSET;
185
-
reg_fifo_addr = ACP_I2S_RX_FIFOADDR(adata);
186
-
reg_fifo_size = ACP_I2S_RX_FIFOSIZE(adata);
190
+
reg_fifo_addr = ACP_I2S_RX_FIFOADDR(chip);
191
+
reg_fifo_size = ACP_I2S_RX_FIFOSIZE(chip);
187
192
phy_addr = I2S_SP_RX_MEM_WINDOW_START + stream->reg_offset;
188
-
writel(phy_addr, adata->acp_base + ACP_I2S_RX_RINGBUFADDR(adata));
193
+
writel(phy_addr, chip->base + ACP_I2S_RX_RINGBUFADDR(chip));
189
194
}
190
195
break;
191
196
case I2S_BT_INSTANCE:
192
197
if (dir == SNDRV_PCM_STREAM_PLAYBACK) {
193
-
reg_dma_size = ACP_BT_TX_DMA_SIZE(adata);
198
+
reg_dma_size = ACP_BT_TX_DMA_SIZE(chip);
194
199
acp_fifo_addr = rsrc->sram_pte_offset +
195
200
BT_PB_FIFO_ADDR_OFFSET;
196
-
reg_fifo_addr = ACP_BT_TX_FIFOADDR(adata);
197
-
reg_fifo_size = ACP_BT_TX_FIFOSIZE(adata);
201
+
reg_fifo_addr = ACP_BT_TX_FIFOADDR(chip);
202
+
reg_fifo_size = ACP_BT_TX_FIFOSIZE(chip);
198
203
phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
199
-
writel(phy_addr, adata->acp_base + ACP_BT_TX_RINGBUFADDR(adata));
204
+
writel(phy_addr, chip->base + ACP_BT_TX_RINGBUFADDR(chip));
200
205
} else {
201
-
reg_dma_size = ACP_BT_RX_DMA_SIZE(adata);
206
+
reg_dma_size = ACP_BT_RX_DMA_SIZE(chip);
202
207
acp_fifo_addr = rsrc->sram_pte_offset +
203
208
BT_CAPT_FIFO_ADDR_OFFSET;
204
-
reg_fifo_addr = ACP_BT_RX_FIFOADDR(adata);
205
-
reg_fifo_size = ACP_BT_RX_FIFOSIZE(adata);
209
+
reg_fifo_addr = ACP_BT_RX_FIFOADDR(chip);
210
+
reg_fifo_size = ACP_BT_RX_FIFOSIZE(chip);
206
211
phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
207
-
writel(phy_addr, adata->acp_base + ACP_BT_RX_RINGBUFADDR(adata));
212
+
writel(phy_addr, chip->base + ACP_BT_RX_RINGBUFADDR(chip));
208
213
}
209
214
break;
210
215
case I2S_HS_INSTANCE:
···
215
220
reg_fifo_addr = ACP_HS_TX_FIFOADDR;
216
221
reg_fifo_size = ACP_HS_TX_FIFOSIZE;
217
222
phy_addr = I2S_HS_TX_MEM_WINDOW_START + stream->reg_offset;
218
-
writel(phy_addr, adata->acp_base + ACP_HS_TX_RINGBUFADDR);
223
+
writel(phy_addr, chip->base + ACP_HS_TX_RINGBUFADDR);
219
224
} else {
220
225
reg_dma_size = ACP_HS_RX_DMA_SIZE;
221
226
acp_fifo_addr = rsrc->sram_pte_offset +
···
223
228
reg_fifo_addr = ACP_HS_RX_FIFOADDR;
224
229
reg_fifo_size = ACP_HS_RX_FIFOSIZE;
225
230
phy_addr = I2S_HS_RX_MEM_WINDOW_START + stream->reg_offset;
226
-
writel(phy_addr, adata->acp_base + ACP_HS_RX_RINGBUFADDR);
231
+
writel(phy_addr, chip->base + ACP_HS_RX_RINGBUFADDR);
227
232
}
228
233
break;
229
234
default:
···
231
236
return -EINVAL;
232
237
}
233
238
234
-
writel(DMA_SIZE, adata->acp_base + reg_dma_size);
235
-
writel(acp_fifo_addr, adata->acp_base + reg_fifo_addr);
236
-
writel(FIFO_SIZE, adata->acp_base + reg_fifo_size);
239
+
writel(DMA_SIZE, chip->base + reg_dma_size);
240
+
writel(acp_fifo_addr, chip->base + reg_fifo_addr);
241
+
writel(FIFO_SIZE, chip->base + reg_fifo_size);
237
242
238
243
ext_int_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(chip, rsrc->irqp_used));
239
244
ext_int_ctrl |= BIT(I2S_RX_THRESHOLD(rsrc->offset)) |
···
248
253
}
249
254
250
255
int restore_acp_i2s_params(struct snd_pcm_substream *substream,
251
-
struct acp_dev_data *adata,
256
+
struct acp_chip_info *chip,
252
257
struct acp_stream *stream)
253
258
{
254
259
struct snd_soc_dai *dai;
···
258
263
soc_runtime = snd_soc_substream_to_rtd(substream);
259
264
dai = snd_soc_rtd_to_cpu(soc_runtime, 0);
260
265
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
261
-
tdm_fmt = adata->tdm_tx_fmt[stream->dai_id - 1];
266
+
tdm_fmt = chip->tdm_tx_fmt[stream->dai_id - 1];
262
267
switch (stream->dai_id) {
263
268
case I2S_BT_INSTANCE:
264
269
reg_val = ACP_BTTDM_ITER;
···
276
281
pr_err("Invalid dai id %x\n", stream->dai_id);
277
282
return -EINVAL;
278
283
}
279
-
val = adata->xfer_tx_resolution[stream->dai_id - 1] << 3;
284
+
val = chip->xfer_tx_resolution[stream->dai_id - 1] << 3;
280
285
} else {
281
-
tdm_fmt = adata->tdm_rx_fmt[stream->dai_id - 1];
286
+
tdm_fmt = chip->tdm_rx_fmt[stream->dai_id - 1];
282
287
switch (stream->dai_id) {
283
288
case I2S_BT_INSTANCE:
284
289
reg_val = ACP_BTTDM_IRER;
···
296
301
pr_err("Invalid dai id %x\n", stream->dai_id);
297
302
return -EINVAL;
298
303
}
299
-
val = adata->xfer_rx_resolution[stream->dai_id - 1] << 3;
304
+
val = chip->xfer_rx_resolution[stream->dai_id - 1] << 3;
300
305
}
301
-
writel(val, adata->acp_base + reg_val);
302
-
if (adata->tdm_mode == TDM_ENABLE) {
303
-
writel(tdm_fmt, adata->acp_base + fmt_reg);
304
-
val = readl(adata->acp_base + reg_val);
305
-
writel(val | 0x2, adata->acp_base + reg_val);
306
+
writel(val, chip->base + reg_val);
307
+
if (chip->tdm_mode == TDM_ENABLE) {
308
+
writel(tdm_fmt, chip->base + fmt_reg);
309
+
val = readl(chip->base + reg_val);
310
+
writel(val | 0x2, chip->base + reg_val);
306
311
}
307
312
return set_acp_i2s_dma_fifo(substream, dai);
308
313
}
+20
-21
sound/soc/amd/acp/acp-pdm.c
+20
-21
sound/soc/amd/acp/acp-pdm.c
···
30
30
{
31
31
struct acp_stream *stream = substream->runtime->private_data;
32
32
struct device *dev = dai->component->dev;
33
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
34
33
struct acp_chip_info *chip;
35
34
u32 physical_addr, size_dmic, period_bytes;
36
35
unsigned int dmic_ctrl;
37
36
38
37
chip = dev_get_platdata(dev);
39
38
/* Enable default DMIC clk */
40
-
writel(PDM_CLK_FREQ_MASK, adata->acp_base + ACP_WOV_CLK_CTRL);
41
-
dmic_ctrl = readl(adata->acp_base + ACP_WOV_MISC_CTRL);
39
+
writel(PDM_CLK_FREQ_MASK, chip->base + ACP_WOV_CLK_CTRL);
40
+
dmic_ctrl = readl(chip->base + ACP_WOV_MISC_CTRL);
42
41
dmic_ctrl |= PDM_MISC_CTRL_MASK;
43
-
writel(dmic_ctrl, adata->acp_base + ACP_WOV_MISC_CTRL);
42
+
writel(dmic_ctrl, chip->base + ACP_WOV_MISC_CTRL);
44
43
45
44
period_bytes = frames_to_bytes(substream->runtime,
46
45
substream->runtime->period_size);
···
52
53
physical_addr = stream->reg_offset + MEM_WINDOW_START;
53
54
54
55
/* Init DMIC Ring buffer */
55
-
writel(physical_addr, adata->acp_base + ACP_WOV_RX_RINGBUFADDR);
56
-
writel(size_dmic, adata->acp_base + ACP_WOV_RX_RINGBUFSIZE);
57
-
writel(period_bytes, adata->acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE);
58
-
writel(0x01, adata->acp_base + ACPAXI2AXI_ATU_CTRL);
56
+
writel(physical_addr, chip->base + ACP_WOV_RX_RINGBUFADDR);
57
+
writel(size_dmic, chip->base + ACP_WOV_RX_RINGBUFSIZE);
58
+
writel(period_bytes, chip->base + ACP_WOV_RX_INTR_WATERMARK_SIZE);
59
+
writel(0x01, chip->base + ACPAXI2AXI_ATU_CTRL);
59
60
60
61
return 0;
61
62
}
···
64
65
int cmd, struct snd_soc_dai *dai)
65
66
{
66
67
struct device *dev = dai->component->dev;
67
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
68
+
struct acp_chip_info *chip = dev_get_platdata(dev);
68
69
unsigned int dma_enable;
69
70
int ret = 0;
70
71
···
72
73
case SNDRV_PCM_TRIGGER_START:
73
74
case SNDRV_PCM_TRIGGER_RESUME:
74
75
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
75
-
dma_enable = readl(adata->acp_base + ACP_WOV_PDM_DMA_ENABLE);
76
+
dma_enable = readl(chip->base + ACP_WOV_PDM_DMA_ENABLE);
76
77
if (!(dma_enable & DMA_EN_MASK)) {
77
-
writel(PDM_ENABLE, adata->acp_base + ACP_WOV_PDM_ENABLE);
78
-
writel(PDM_ENABLE, adata->acp_base + ACP_WOV_PDM_DMA_ENABLE);
78
+
writel(PDM_ENABLE, chip->base + ACP_WOV_PDM_ENABLE);
79
+
writel(PDM_ENABLE, chip->base + ACP_WOV_PDM_DMA_ENABLE);
79
80
}
80
81
81
-
ret = readl_poll_timeout_atomic(adata->acp_base + ACP_WOV_PDM_DMA_ENABLE,
82
+
ret = readl_poll_timeout_atomic(chip->base + ACP_WOV_PDM_DMA_ENABLE,
82
83
dma_enable, (dma_enable & DMA_EN_MASK),
83
84
DELAY_US, PDM_TIMEOUT);
84
85
break;
85
86
case SNDRV_PCM_TRIGGER_STOP:
86
87
case SNDRV_PCM_TRIGGER_SUSPEND:
87
88
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
88
-
dma_enable = readl(adata->acp_base + ACP_WOV_PDM_DMA_ENABLE);
89
+
dma_enable = readl(chip->base + ACP_WOV_PDM_DMA_ENABLE);
89
90
if ((dma_enable & DMA_EN_MASK)) {
90
-
writel(PDM_DISABLE, adata->acp_base + ACP_WOV_PDM_ENABLE);
91
-
writel(PDM_DISABLE, adata->acp_base + ACP_WOV_PDM_DMA_ENABLE);
91
+
writel(PDM_DISABLE, chip->base + ACP_WOV_PDM_ENABLE);
92
+
writel(PDM_DISABLE, chip->base + ACP_WOV_PDM_DMA_ENABLE);
92
93
93
94
}
94
95
95
-
ret = readl_poll_timeout_atomic(adata->acp_base + ACP_WOV_PDM_DMA_ENABLE,
96
+
ret = readl_poll_timeout_atomic(chip->base + ACP_WOV_PDM_DMA_ENABLE,
96
97
dma_enable, !(dma_enable & DMA_EN_MASK),
97
98
DELAY_US, PDM_TIMEOUT);
98
99
break;
···
108
109
struct snd_pcm_hw_params *hwparams, struct snd_soc_dai *dai)
109
110
{
110
111
struct device *dev = dai->component->dev;
111
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
112
+
struct acp_chip_info *chip = dev_get_platdata(dev);
112
113
unsigned int channels, ch_mask;
113
114
114
115
channels = params_channels(hwparams);
···
127
128
return -EINVAL;
128
129
}
129
130
130
-
adata->ch_mask = ch_mask;
131
+
chip->ch_mask = ch_mask;
131
132
if (params_format(hwparams) != SNDRV_PCM_FORMAT_S32_LE) {
132
133
dev_err(dai->dev, "Invalid format:%d\n", params_format(hwparams));
133
134
return -EINVAL;
134
135
}
135
136
136
-
writel(ch_mask, adata->acp_base + ACP_WOV_PDM_NO_OF_CHANNELS);
137
-
writel(PDM_DEC_64, adata->acp_base + ACP_WOV_PDM_DECIMATION_FACTOR);
137
+
writel(ch_mask, chip->base + ACP_WOV_PDM_NO_OF_CHANNELS);
138
+
writel(PDM_DEC_64, chip->base + ACP_WOV_PDM_DECIMATION_FACTOR);
138
139
139
140
return 0;
140
141
}
+32
-38
sound/soc/amd/acp/acp-platform.c
+32
-38
sound/soc/amd/acp/acp-platform.c
···
107
107
.periods_max = CAPTURE_MAX_NUM_PERIODS,
108
108
};
109
109
110
-
void config_pte_for_stream(struct acp_dev_data *adata, struct acp_stream *stream)
110
+
void config_pte_for_stream(struct acp_chip_info *chip, struct acp_stream *stream)
111
111
{
112
-
struct acp_resource *rsrc = adata->rsrc;
112
+
struct acp_resource *rsrc = chip->rsrc;
113
113
u32 reg_val;
114
114
115
115
reg_val = rsrc->sram_pte_offset;
116
116
stream->reg_offset = 0x02000000;
117
117
118
-
writel((reg_val + GRP1_OFFSET) | BIT(31), adata->acp_base + ACPAXI2AXI_ATU_BASE_ADDR_GRP_1);
119
-
writel(PAGE_SIZE_4K_ENABLE, adata->acp_base + ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1);
118
+
writel((reg_val + GRP1_OFFSET) | BIT(31), chip->base + ACPAXI2AXI_ATU_BASE_ADDR_GRP_1);
119
+
writel(PAGE_SIZE_4K_ENABLE, chip->base + ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1);
120
120
121
-
writel((reg_val + GRP2_OFFSET) | BIT(31), adata->acp_base + ACPAXI2AXI_ATU_BASE_ADDR_GRP_2);
122
-
writel(PAGE_SIZE_4K_ENABLE, adata->acp_base + ACPAXI2AXI_ATU_PAGE_SIZE_GRP_2);
121
+
writel((reg_val + GRP2_OFFSET) | BIT(31), chip->base + ACPAXI2AXI_ATU_BASE_ADDR_GRP_2);
122
+
writel(PAGE_SIZE_4K_ENABLE, chip->base + ACPAXI2AXI_ATU_PAGE_SIZE_GRP_2);
123
123
124
-
writel(reg_val | BIT(31), adata->acp_base + ACPAXI2AXI_ATU_BASE_ADDR_GRP_5);
125
-
writel(PAGE_SIZE_4K_ENABLE, adata->acp_base + ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5);
124
+
writel(reg_val | BIT(31), chip->base + ACPAXI2AXI_ATU_BASE_ADDR_GRP_5);
125
+
writel(PAGE_SIZE_4K_ENABLE, chip->base + ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5);
126
126
127
-
writel(0x01, adata->acp_base + ACPAXI2AXI_ATU_CTRL);
127
+
writel(0x01, chip->base + ACPAXI2AXI_ATU_CTRL);
128
128
}
129
129
EXPORT_SYMBOL_NS_GPL(config_pte_for_stream, "SND_SOC_ACP_COMMON");
130
130
131
-
void config_acp_dma(struct acp_dev_data *adata, struct acp_stream *stream, int size)
131
+
void config_acp_dma(struct acp_chip_info *chip, struct acp_stream *stream, int size)
132
132
{
133
133
struct snd_pcm_substream *substream = stream->substream;
134
-
struct acp_resource *rsrc = adata->rsrc;
134
+
struct acp_resource *rsrc = chip->rsrc;
135
135
dma_addr_t addr = substream->dma_buffer.addr;
136
136
int num_pages = (PAGE_ALIGN(size) >> PAGE_SHIFT);
137
137
u32 low, high, val;
138
138
u16 page_idx;
139
139
140
-
switch (adata->acp_rev) {
140
+
switch (chip->acp_rev) {
141
141
case ACP70_PCI_ID:
142
142
case ACP71_PCI_ID:
143
143
switch (stream->dai_id) {
···
163
163
val = 0x6000;
164
164
break;
165
165
default:
166
-
dev_err(adata->dev, "Invalid dai id %x\n", stream->dai_id);
166
+
dev_err(chip->dev, "Invalid dai id %x\n", stream->dai_id);
167
167
return;
168
168
}
169
169
break;
···
176
176
/* Load the low address of page int ACP SRAM through SRBM */
177
177
low = lower_32_bits(addr);
178
178
high = upper_32_bits(addr);
179
-
writel(low, adata->acp_base + rsrc->scratch_reg_offset + val);
179
+
writel(low, chip->base + rsrc->scratch_reg_offset + val);
180
180
high |= BIT(31);
181
-
writel(high, adata->acp_base + rsrc->scratch_reg_offset + val + 4);
181
+
writel(high, chip->base + rsrc->scratch_reg_offset + val + 4);
182
182
183
183
/* Move to next physically contiguous page */
184
184
val += 8;
···
191
191
{
192
192
struct snd_pcm_runtime *runtime = substream->runtime;
193
193
struct device *dev = component->dev;
194
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
195
194
struct acp_chip_info *chip;
196
195
struct acp_stream *stream;
197
196
int ret;
···
200
201
return -ENOMEM;
201
202
202
203
stream->substream = substream;
203
-
chip = dev_get_platdata(dev);
204
+
chip = dev_get_drvdata(dev->parent);
204
205
switch (chip->acp_rev) {
205
206
case ACP63_PCI_ID:
206
207
case ACP70_PCI_ID:
···
242
243
243
244
writel(1, ACP_EXTERNAL_INTR_ENB(chip));
244
245
245
-
spin_lock_irq(&adata->acp_lock);
246
-
list_add_tail(&stream->list, &adata->stream_list);
247
-
spin_unlock_irq(&adata->acp_lock);
246
+
spin_lock_irq(&chip->acp_lock);
247
+
list_add_tail(&stream->list, &chip->stream_list);
248
+
spin_unlock_irq(&chip->acp_lock);
248
249
249
250
return ret;
250
251
}
···
253
254
struct snd_pcm_substream *substream,
254
255
struct snd_pcm_hw_params *params)
255
256
{
256
-
struct acp_dev_data *adata = snd_soc_component_get_drvdata(component);
257
+
struct device *dev = component->dev;
258
+
struct acp_chip_info *chip = dev_get_drvdata(dev->parent);
257
259
struct acp_stream *stream = substream->runtime->private_data;
258
260
u64 size = params_buffer_bytes(params);
259
261
260
262
/* Configure ACP DMA block with params */
261
-
config_pte_for_stream(adata, stream);
262
-
config_acp_dma(adata, stream, size);
263
+
config_pte_for_stream(chip, stream);
264
+
config_acp_dma(chip, stream, size);
263
265
264
266
return 0;
265
267
}
···
269
269
struct snd_pcm_substream *substream)
270
270
{
271
271
struct device *dev = component->dev;
272
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
272
+
struct acp_chip_info *chip = dev_get_drvdata(dev->parent);
273
273
struct acp_stream *stream = substream->runtime->private_data;
274
274
u32 pos, buffersize;
275
275
u64 bytescount;
···
277
277
buffersize = frames_to_bytes(substream->runtime,
278
278
substream->runtime->buffer_size);
279
279
280
-
bytescount = acp_get_byte_count(adata, stream->dai_id, substream->stream);
280
+
bytescount = acp_get_byte_count(chip, stream->dai_id, substream->stream);
281
281
282
282
if (bytescount > stream->bytescount)
283
283
bytescount -= stream->bytescount;
···
301
301
struct snd_pcm_substream *substream)
302
302
{
303
303
struct device *dev = component->dev;
304
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
304
+
struct acp_chip_info *chip = dev_get_drvdata(dev->parent);
305
305
struct acp_stream *stream = substream->runtime->private_data;
306
306
307
307
/* Remove entry from list */
308
-
spin_lock_irq(&adata->acp_lock);
308
+
spin_lock_irq(&chip->acp_lock);
309
309
list_del(&stream->list);
310
-
spin_unlock_irq(&adata->acp_lock);
310
+
spin_unlock_irq(&chip->acp_lock);
311
311
kfree(stream);
312
312
313
313
return 0;
···
325
325
326
326
int acp_platform_register(struct device *dev)
327
327
{
328
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
329
328
struct acp_chip_info *chip;
330
329
struct snd_soc_dai_driver;
331
330
unsigned int status;
···
335
336
return -ENODEV;
336
337
}
337
338
338
-
chip->adata = adata;
339
339
status = devm_snd_soc_register_component(dev, &acp_pcm_component,
340
-
adata->dai_driver,
341
-
adata->num_dai);
340
+
chip->dai_driver,
341
+
chip->num_dai);
342
342
if (status) {
343
343
dev_err(dev, "Fail to register acp i2s component\n");
344
344
return status;
345
345
}
346
346
347
-
INIT_LIST_HEAD(&adata->stream_list);
348
-
spin_lock_init(&adata->acp_lock);
347
+
INIT_LIST_HEAD(&chip->stream_list);
348
+
spin_lock_init(&chip->acp_lock);
349
349
350
350
return 0;
351
351
}
···
352
354
353
355
int acp_platform_unregister(struct device *dev)
354
356
{
355
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
356
-
357
-
if (adata->mach_dev)
358
-
platform_device_unregister(adata->mach_dev);
359
357
return 0;
360
358
}
361
359
EXPORT_SYMBOL_NS_GPL(acp_platform_unregister, "SND_SOC_ACP_COMMON");
+12
-41
sound/soc/amd/acp/acp-rembrandt.c
+12
-41
sound/soc/amd/acp/acp-rembrandt.c
···
157
157
{
158
158
struct device *dev = &pdev->dev;
159
159
struct acp_chip_info *chip;
160
-
struct acp_dev_data *adata;
161
-
struct resource *res;
162
160
u32 ret;
163
161
164
162
chip = dev_get_platdata(&pdev->dev);
···
170
172
return -ENODEV;
171
173
}
172
174
173
-
adata = devm_kzalloc(dev, sizeof(struct acp_dev_data), GFP_KERNEL);
174
-
if (!adata)
175
-
return -ENOMEM;
176
-
177
-
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "acp_mem");
178
-
if (!res) {
179
-
dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n");
180
-
return -ENODEV;
181
-
}
182
-
183
-
adata->acp_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
184
-
if (!adata->acp_base)
185
-
return -ENOMEM;
186
-
187
-
res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "acp_dai_irq");
188
-
if (!res) {
189
-
dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n");
190
-
return -ENODEV;
191
-
}
192
-
175
+
chip->dev = dev;
193
176
chip->rsrc = &rsrc;
194
-
adata->i2s_irq = res->start;
195
-
adata->dev = dev;
196
-
adata->dai_driver = acp_rmb_dai;
197
-
adata->num_dai = ARRAY_SIZE(acp_rmb_dai);
198
-
adata->rsrc = &rsrc;
199
-
adata->acp_rev = chip->acp_rev;
200
-
adata->flag = chip->flag;
201
-
adata->is_i2s_config = chip->is_i2s_config;
202
-
203
-
dev_set_drvdata(dev, adata);
177
+
chip->dai_driver = acp_rmb_dai;
178
+
chip->num_dai = ARRAY_SIZE(acp_rmb_dai);
204
179
205
180
if (chip->is_i2s_config && rsrc.soc_mclk) {
206
181
ret = acp6x_master_clock_generate(dev);
···
210
239
211
240
static int __maybe_unused rmb_pcm_resume(struct device *dev)
212
241
{
213
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
242
+
struct acp_chip_info *chip = dev_get_platdata(dev);
214
243
struct acp_stream *stream;
215
244
struct snd_pcm_substream *substream;
216
245
snd_pcm_uframes_t buf_in_frames;
217
246
u64 buf_size;
218
247
219
-
if (adata->is_i2s_config && adata->rsrc->soc_mclk)
248
+
if (chip->is_i2s_config && chip->rsrc->soc_mclk)
220
249
acp6x_master_clock_generate(dev);
221
250
222
-
spin_lock(&adata->acp_lock);
223
-
list_for_each_entry(stream, &adata->stream_list, list) {
251
+
spin_lock(&chip->acp_lock);
252
+
list_for_each_entry(stream, &chip->stream_list, list) {
224
253
substream = stream->substream;
225
254
if (substream && substream->runtime) {
226
255
buf_in_frames = (substream->runtime->buffer_size);
227
256
buf_size = frames_to_bytes(substream->runtime, buf_in_frames);
228
-
config_pte_for_stream(adata, stream);
229
-
config_acp_dma(adata, stream, buf_size);
257
+
config_pte_for_stream(chip, stream);
258
+
config_acp_dma(chip, stream, buf_size);
230
259
if (stream->dai_id)
231
-
restore_acp_i2s_params(substream, adata, stream);
260
+
restore_acp_i2s_params(substream, chip, stream);
232
261
else
233
-
restore_acp_pdm_params(substream, adata);
262
+
restore_acp_pdm_params(substream, chip);
234
263
}
235
264
}
236
-
spin_unlock(&adata->acp_lock);
265
+
spin_unlock(&chip->acp_lock);
237
266
return 0;
238
267
}
239
268
+12
-36
sound/soc/amd/acp/acp-renoir.c
+12
-36
sound/soc/amd/acp/acp-renoir.c
···
108
108
{
109
109
struct device *dev = &pdev->dev;
110
110
struct acp_chip_info *chip;
111
-
struct acp_dev_data *adata;
112
-
struct resource *res;
113
111
int ret;
114
112
115
113
chip = dev_get_platdata(&pdev->dev);
···
121
123
return -ENODEV;
122
124
}
123
125
124
-
adata = devm_kzalloc(dev, sizeof(struct acp_dev_data), GFP_KERNEL);
125
-
if (!adata)
126
-
return -ENOMEM;
127
-
128
-
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "acp_mem");
129
-
if (!res) {
130
-
dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n");
131
-
return -ENODEV;
132
-
}
133
-
134
-
adata->acp_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
135
-
if (!adata->acp_base)
136
-
return -ENOMEM;
137
-
138
-
ret = platform_get_irq_byname(pdev, "acp_dai_irq");
139
-
if (ret < 0)
140
-
return ret;
141
-
adata->i2s_irq = ret;
142
-
126
+
chip->dev = dev;
143
127
chip->rsrc = &rsrc;
144
-
adata->dev = dev;
145
-
adata->dai_driver = acp_renoir_dai;
146
-
adata->num_dai = ARRAY_SIZE(acp_renoir_dai);
147
-
adata->rsrc = &rsrc;
148
-
adata->acp_rev = chip->acp_rev;
149
-
adata->flag = chip->flag;
128
+
chip->dai_driver = acp_renoir_dai;
129
+
chip->num_dai = ARRAY_SIZE(acp_renoir_dai);
150
130
151
-
dev_set_drvdata(dev, adata);
152
131
ret = acp_hw_en_interrupts(chip);
153
132
if (ret) {
154
133
dev_err(dev, "ACP en-interrupts failed\n");
155
134
return ret;
156
135
}
136
+
157
137
acp_platform_register(dev);
158
138
159
139
pm_runtime_set_autosuspend_delay(&pdev->dev, ACP_SUSPEND_DELAY_MS);
···
157
181
158
182
static int __maybe_unused rn_pcm_resume(struct device *dev)
159
183
{
160
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
184
+
struct acp_chip_info *chip = dev_get_platdata(dev);
161
185
struct acp_stream *stream;
162
186
struct snd_pcm_substream *substream;
163
187
snd_pcm_uframes_t buf_in_frames;
164
188
u64 buf_size;
165
189
166
-
spin_lock(&adata->acp_lock);
167
-
list_for_each_entry(stream, &adata->stream_list, list) {
190
+
spin_lock(&chip->acp_lock);
191
+
list_for_each_entry(stream, &chip->stream_list, list) {
168
192
substream = stream->substream;
169
193
if (substream && substream->runtime) {
170
194
buf_in_frames = (substream->runtime->buffer_size);
171
195
buf_size = frames_to_bytes(substream->runtime, buf_in_frames);
172
-
config_pte_for_stream(adata, stream);
173
-
config_acp_dma(adata, stream, buf_size);
196
+
config_pte_for_stream(chip, stream);
197
+
config_acp_dma(chip, stream, buf_size);
174
198
if (stream->dai_id)
175
-
restore_acp_i2s_params(substream, adata, stream);
199
+
restore_acp_i2s_params(substream, chip, stream);
176
200
else
177
-
restore_acp_pdm_params(substream, adata);
201
+
restore_acp_pdm_params(substream, chip);
178
202
}
179
203
}
180
-
spin_unlock(&adata->acp_lock);
204
+
spin_unlock(&chip->acp_lock);
181
205
return 0;
182
206
}
183
207
+15
-43
sound/soc/amd/acp/acp63.c
+15
-43
sound/soc/amd/acp/acp63.c
···
153
153
},
154
154
};
155
155
156
-
static int acp63_i2s_master_clock_generate(struct acp_dev_data *adata)
156
+
static int acp63_i2s_master_clock_generate(struct acp_chip_info *chip)
157
157
{
158
158
int rc;
159
159
u32 data;
···
208
208
{
209
209
struct device *dev = &pdev->dev;
210
210
struct acp_chip_info *chip;
211
-
struct acp_dev_data *adata;
212
-
struct resource *res;
213
211
int ret;
214
212
215
213
chip = dev_get_platdata(&pdev->dev);
···
221
223
return -ENODEV;
222
224
}
223
225
224
-
adata = devm_kzalloc(dev, sizeof(struct acp_dev_data), GFP_KERNEL);
225
-
if (!adata)
226
-
return -ENOMEM;
227
-
228
-
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "acp_mem");
229
-
if (!res) {
230
-
dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n");
231
-
return -ENODEV;
232
-
}
233
-
234
-
adata->acp_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
235
-
if (!adata->acp_base)
236
-
return -ENOMEM;
237
-
238
-
res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "acp_dai_irq");
239
-
if (!res) {
240
-
dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n");
241
-
return -ENODEV;
242
-
}
243
-
226
+
chip->dev = dev;
244
227
chip->rsrc = &rsrc;
245
-
adata->i2s_irq = res->start;
246
-
adata->dev = dev;
247
-
adata->dai_driver = acp63_dai;
248
-
adata->num_dai = ARRAY_SIZE(acp63_dai);
249
-
adata->rsrc = &rsrc;
250
-
adata->acp_rev = chip->acp_rev;
251
-
adata->flag = chip->flag;
252
-
adata->is_i2s_config = chip->is_i2s_config;
253
-
dev_set_drvdata(dev, adata);
228
+
chip->dai_driver = acp63_dai;
229
+
chip->num_dai = ARRAY_SIZE(acp63_dai);
254
230
255
231
if (chip->is_i2s_config && rsrc.soc_mclk) {
256
-
ret = acp63_i2s_master_clock_generate(adata);
232
+
ret = acp63_i2s_master_clock_generate(chip);
257
233
if (ret)
258
234
return ret;
259
235
}
···
261
289
262
290
static int __maybe_unused acp63_pcm_resume(struct device *dev)
263
291
{
264
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
292
+
struct acp_chip_info *chip = dev_get_platdata(dev);
265
293
struct acp_stream *stream;
266
294
struct snd_pcm_substream *substream;
267
295
snd_pcm_uframes_t buf_in_frames;
268
296
u64 buf_size;
269
297
270
-
if (adata->is_i2s_config && adata->rsrc->soc_mclk)
271
-
acp63_i2s_master_clock_generate(adata);
298
+
if (chip->is_i2s_config && chip->rsrc->soc_mclk)
299
+
acp63_i2s_master_clock_generate(chip);
272
300
273
-
spin_lock(&adata->acp_lock);
274
-
list_for_each_entry(stream, &adata->stream_list, list) {
301
+
spin_lock(&chip->acp_lock);
302
+
list_for_each_entry(stream, &chip->stream_list, list) {
275
303
substream = stream->substream;
276
304
if (substream && substream->runtime) {
277
305
buf_in_frames = (substream->runtime->buffer_size);
278
306
buf_size = frames_to_bytes(substream->runtime, buf_in_frames);
279
-
config_pte_for_stream(adata, stream);
280
-
config_acp_dma(adata, stream, buf_size);
307
+
config_pte_for_stream(chip, stream);
308
+
config_acp_dma(chip, stream, buf_size);
281
309
if (stream->dai_id)
282
-
restore_acp_i2s_params(substream, adata, stream);
310
+
restore_acp_i2s_params(substream, chip, stream);
283
311
else
284
-
restore_acp_pdm_params(substream, adata);
312
+
restore_acp_pdm_params(substream, chip);
285
313
}
286
314
}
287
-
spin_unlock(&adata->acp_lock);
315
+
spin_unlock(&chip->acp_lock);
288
316
return 0;
289
317
}
290
318
+11
-39
sound/soc/amd/acp/acp70.c
+11
-39
sound/soc/amd/acp/acp70.c
···
135
135
{
136
136
struct device *dev = &pdev->dev;
137
137
struct acp_chip_info *chip;
138
-
struct acp_dev_data *adata;
139
-
struct resource *res;
140
138
int ret;
141
139
142
140
chip = dev_get_platdata(&pdev->dev);
···
152
154
return -ENODEV;
153
155
}
154
156
155
-
adata = devm_kzalloc(dev, sizeof(struct acp_dev_data), GFP_KERNEL);
156
-
if (!adata)
157
-
return -ENOMEM;
158
-
159
-
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "acp_mem");
160
-
if (!res) {
161
-
dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n");
162
-
return -ENODEV;
163
-
}
164
-
165
-
adata->acp_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
166
-
if (!adata->acp_base)
167
-
return -ENOMEM;
168
-
169
-
res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "acp_dai_irq");
170
-
if (!res) {
171
-
dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n");
172
-
return -ENODEV;
173
-
}
174
-
157
+
chip->dev = dev;
175
158
chip->rsrc = &rsrc;
176
-
adata->i2s_irq = res->start;
177
-
adata->dev = dev;
178
-
adata->dai_driver = acp70_dai;
179
-
adata->num_dai = ARRAY_SIZE(acp70_dai);
180
-
adata->rsrc = &rsrc;
181
-
adata->acp_rev = chip->acp_rev;
182
-
adata->flag = chip->flag;
183
-
184
-
dev_set_drvdata(dev, adata);
159
+
chip->dai_driver = acp70_dai;
160
+
chip->num_dai = ARRAY_SIZE(acp70_dai);
185
161
186
162
/* Set clk7 DFS clock divider register value to get mclk as 196.608MHz*/
187
163
ret = amd_smn_write(0, CLK7_CLK0_DFS_CNTL_N1, CLK0_DIVIDER);
···
193
221
194
222
static int __maybe_unused acp70_pcm_resume(struct device *dev)
195
223
{
196
-
struct acp_dev_data *adata = dev_get_drvdata(dev);
224
+
struct acp_chip_info *chip = dev_get_platdata(dev);
197
225
struct acp_stream *stream;
198
226
struct snd_pcm_substream *substream;
199
227
snd_pcm_uframes_t buf_in_frames;
200
228
u64 buf_size;
201
229
202
-
spin_lock(&adata->acp_lock);
203
-
list_for_each_entry(stream, &adata->stream_list, list) {
230
+
spin_lock(&chip->acp_lock);
231
+
list_for_each_entry(stream, &chip->stream_list, list) {
204
232
substream = stream->substream;
205
233
if (substream && substream->runtime) {
206
234
buf_in_frames = (substream->runtime->buffer_size);
207
235
buf_size = frames_to_bytes(substream->runtime, buf_in_frames);
208
-
config_pte_for_stream(adata, stream);
209
-
config_acp_dma(adata, stream, buf_size);
236
+
config_pte_for_stream(chip, stream);
237
+
config_acp_dma(chip, stream, buf_size);
210
238
if (stream->dai_id)
211
-
restore_acp_i2s_params(substream, adata, stream);
239
+
restore_acp_i2s_params(substream, chip, stream);
212
240
else
213
-
restore_acp_pdm_params(substream, adata);
241
+
restore_acp_pdm_params(substream, chip);
214
242
}
215
243
}
216
-
spin_unlock(&adata->acp_lock);
244
+
spin_unlock(&chip->acp_lock);
217
245
return 0;
218
246
}
219
247
+34
-52
sound/soc/amd/acp/amd.h
+34
-52
sound/soc/amd/acp/amd.h
···
142
142
char *name; /* Platform name */
143
143
struct resource *res;
144
144
struct device *dev;
145
+
struct snd_soc_dai_driver *dai_driver;
146
+
145
147
unsigned int acp_rev; /* ACP Revision id */
146
148
void __iomem *base; /* ACP memory PCI base */
147
149
struct snd_acp_hw_ops *acp_hw_ops;
148
150
int (*acp_hw_ops_init)(struct acp_chip_info *chip);
149
151
struct platform_device *chip_pdev;
150
152
struct acp_resource *rsrc; /* Platform specific resources*/
153
+
struct list_head stream_list;
154
+
spinlock_t acp_lock; /* Used to protect stream_list */
151
155
struct platform_device *dmic_codec_dev;
152
156
struct platform_device *acp_plat_dev;
153
157
struct platform_device *mach_dev;
154
158
struct snd_soc_acpi_mach *machines;
155
-
struct acp_dev_data *adata;
159
+
int num_dai;
156
160
u32 addr;
161
+
u32 bclk_div;
162
+
u32 lrclk_div;
163
+
u32 ch_mask;
164
+
u32 tdm_tx_fmt[3];
165
+
u32 tdm_rx_fmt[3];
166
+
u32 xfer_tx_resolution[3];
167
+
u32 xfer_rx_resolution[3];
157
168
unsigned int flag; /* Distinguish b/w Legacy or Only PDM */
158
169
bool is_pdm_dev; /* flag set to true when ACP PDM controller exists */
159
170
bool is_pdm_config; /* flag set to true when PDM configuration is selected from BIOS */
160
171
bool is_i2s_config; /* flag set to true when I2S configuration is selected from BIOS */
172
+
bool tdm_mode;
161
173
};
162
174
163
175
struct acp_stream {
···
193
181
u32 irq_reg_offset;
194
182
u64 scratch_reg_offset;
195
183
u64 sram_pte_offset;
196
-
};
197
-
198
-
struct acp_dev_data {
199
-
char *name;
200
-
struct device *dev;
201
-
void __iomem *acp_base;
202
-
unsigned int i2s_irq;
203
-
unsigned int acp_rev; /* ACP Revision id */
204
-
205
-
bool tdm_mode;
206
-
bool is_i2s_config;
207
-
/* SOC specific dais */
208
-
struct snd_soc_dai_driver *dai_driver;
209
-
int num_dai;
210
-
211
-
struct list_head stream_list;
212
-
spinlock_t acp_lock;
213
-
214
-
struct platform_device *mach_dev;
215
-
216
-
u32 bclk_div;
217
-
u32 lrclk_div;
218
-
219
-
struct acp_resource *rsrc;
220
-
u32 ch_mask;
221
-
u32 tdm_tx_fmt[3];
222
-
u32 tdm_rx_fmt[3];
223
-
u32 xfer_tx_resolution[3];
224
-
u32 xfer_rx_resolution[3];
225
-
unsigned int flag;
226
184
};
227
185
228
186
/**
···
339
357
/* Machine configuration */
340
358
int snd_amd_acp_find_config(struct pci_dev *pci);
341
359
342
-
void config_pte_for_stream(struct acp_dev_data *adata, struct acp_stream *stream);
343
-
void config_acp_dma(struct acp_dev_data *adata, struct acp_stream *stream, int size);
360
+
void config_pte_for_stream(struct acp_chip_info *chip, struct acp_stream *stream);
361
+
void config_acp_dma(struct acp_chip_info *chip, struct acp_stream *stream, int size);
344
362
void restore_acp_pdm_params(struct snd_pcm_substream *substream,
345
-
struct acp_dev_data *adata);
363
+
struct acp_chip_info *chip);
346
364
347
365
int restore_acp_i2s_params(struct snd_pcm_substream *substream,
348
-
struct acp_dev_data *adata, struct acp_stream *stream);
366
+
struct acp_chip_info *chip, struct acp_stream *stream);
349
367
350
368
void check_acp_config(struct pci_dev *pci, struct acp_chip_info *chip);
351
369
···
377
395
return -EOPNOTSUPP;
378
396
}
379
397
380
-
static inline u64 acp_get_byte_count(struct acp_dev_data *adata, int dai_id, int direction)
398
+
static inline u64 acp_get_byte_count(struct acp_chip_info *chip, int dai_id, int direction)
381
399
{
382
400
u64 byte_count = 0, low = 0, high = 0;
383
401
384
402
if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
385
403
switch (dai_id) {
386
404
case I2S_BT_INSTANCE:
387
-
high = readl(adata->acp_base + ACP_BT_TX_LINEARPOSITIONCNTR_HIGH(adata));
388
-
low = readl(adata->acp_base + ACP_BT_TX_LINEARPOSITIONCNTR_LOW(adata));
405
+
high = readl(chip->base + ACP_BT_TX_LINEARPOSITIONCNTR_HIGH(chip));
406
+
low = readl(chip->base + ACP_BT_TX_LINEARPOSITIONCNTR_LOW(chip));
389
407
break;
390
408
case I2S_SP_INSTANCE:
391
-
high = readl(adata->acp_base + ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH(adata));
392
-
low = readl(adata->acp_base + ACP_I2S_TX_LINEARPOSITIONCNTR_LOW(adata));
409
+
high = readl(chip->base + ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH(chip));
410
+
low = readl(chip->base + ACP_I2S_TX_LINEARPOSITIONCNTR_LOW(chip));
393
411
break;
394
412
case I2S_HS_INSTANCE:
395
-
high = readl(adata->acp_base + ACP_HS_TX_LINEARPOSITIONCNTR_HIGH);
396
-
low = readl(adata->acp_base + ACP_HS_TX_LINEARPOSITIONCNTR_LOW);
413
+
high = readl(chip->base + ACP_HS_TX_LINEARPOSITIONCNTR_HIGH);
414
+
low = readl(chip->base + ACP_HS_TX_LINEARPOSITIONCNTR_LOW);
397
415
break;
398
416
default:
399
-
dev_err(adata->dev, "Invalid dai id %x\n", dai_id);
417
+
dev_err(chip->dev, "Invalid dai id %x\n", dai_id);
400
418
goto POINTER_RETURN_BYTES;
401
419
}
402
420
} else {
403
421
switch (dai_id) {
404
422
case I2S_BT_INSTANCE:
405
-
high = readl(adata->acp_base + ACP_BT_RX_LINEARPOSITIONCNTR_HIGH(adata));
406
-
low = readl(adata->acp_base + ACP_BT_RX_LINEARPOSITIONCNTR_LOW(adata));
423
+
high = readl(chip->base + ACP_BT_RX_LINEARPOSITIONCNTR_HIGH(chip));
424
+
low = readl(chip->base + ACP_BT_RX_LINEARPOSITIONCNTR_LOW(chip));
407
425
break;
408
426
case I2S_SP_INSTANCE:
409
-
high = readl(adata->acp_base + ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH(adata));
410
-
low = readl(adata->acp_base + ACP_I2S_RX_LINEARPOSITIONCNTR_LOW(adata));
427
+
high = readl(chip->base + ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH(chip));
428
+
low = readl(chip->base + ACP_I2S_RX_LINEARPOSITIONCNTR_LOW(chip));
411
429
break;
412
430
case I2S_HS_INSTANCE:
413
-
high = readl(adata->acp_base + ACP_HS_RX_LINEARPOSITIONCNTR_HIGH);
414
-
low = readl(adata->acp_base + ACP_HS_RX_LINEARPOSITIONCNTR_LOW);
431
+
high = readl(chip->base + ACP_HS_RX_LINEARPOSITIONCNTR_HIGH);
432
+
low = readl(chip->base + ACP_HS_RX_LINEARPOSITIONCNTR_LOW);
415
433
break;
416
434
case DMIC_INSTANCE:
417
-
high = readl(adata->acp_base + ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH);
418
-
low = readl(adata->acp_base + ACP_WOV_RX_LINEARPOSITIONCNTR_LOW);
435
+
high = readl(chip->base + ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH);
436
+
low = readl(chip->base + ACP_WOV_RX_LINEARPOSITIONCNTR_LOW);
419
437
break;
420
438
default:
421
-
dev_err(adata->dev, "Invalid dai id %x\n", dai_id);
439
+
dev_err(chip->dev, "Invalid dai id %x\n", dai_id);
422
440
goto POINTER_RETURN_BYTES;
423
441
}
424
442
}