Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
Merge tag 'pci-v4.5-fixes-4' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI fixes from Bjorn Helgaas:
"Freescale Layerscape host bridge driver:
Fix MSG TLP drop setting (Minghuan Lian)
TI Keystone host bridge driver:
Fix MSI code that retrieves struct pcie_port pointer (Murali Karicheri)"
* tag 'pci-v4.5-fixes-4' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
PCI: layerscape: Fix MSG TLP drop setting
PCI: keystone: Fix MSI code that retrieves struct pcie_port pointer
+16
-16
+3
-8
drivers/pci/host/pci-keystone-dw.c
+3
-8
drivers/pci/host/pci-keystone-dw.c
···
58
58
59
59
#define to_keystone_pcie(x) container_of(x, struct keystone_pcie, pp)
60
60
61
-
static inline struct pcie_port *sys_to_pcie(struct pci_sys_data *sys)
62
-
{
63
-
return sys->private_data;
64
-
}
65
-
66
61
static inline void update_reg_offset_bit_pos(u32 offset, u32 *reg_offset,
67
62
u32 *bit_pos)
68
63
{
···
103
108
struct pcie_port *pp;
104
109
105
110
msi = irq_data_get_msi_desc(d);
106
-
pp = sys_to_pcie(msi_desc_to_pci_sysdata(msi));
111
+
pp = (struct pcie_port *) msi_desc_to_pci_sysdata(msi);
107
112
ks_pcie = to_keystone_pcie(pp);
108
113
offset = d->irq - irq_linear_revmap(pp->irq_domain, 0);
109
114
update_reg_offset_bit_pos(offset, ®_offset, &bit_pos);
···
141
146
u32 offset;
142
147
143
148
msi = irq_data_get_msi_desc(d);
144
-
pp = sys_to_pcie(msi_desc_to_pci_sysdata(msi));
149
+
pp = (struct pcie_port *) msi_desc_to_pci_sysdata(msi);
145
150
ks_pcie = to_keystone_pcie(pp);
146
151
offset = d->irq - irq_linear_revmap(pp->irq_domain, 0);
147
152
···
162
167
u32 offset;
163
168
164
169
msi = irq_data_get_msi_desc(d);
165
-
pp = sys_to_pcie(msi_desc_to_pci_sysdata(msi));
170
+
pp = (struct pcie_port *) msi_desc_to_pci_sysdata(msi);
166
171
ks_pcie = to_keystone_pcie(pp);
167
172
offset = d->irq - irq_linear_revmap(pp->irq_domain, 0);
168
173
+13
-8
drivers/pci/host/pci-layerscape.c
+13
-8
drivers/pci/host/pci-layerscape.c
···
77
77
iowrite16(PCI_CLASS_BRIDGE_PCI, pcie->dbi + PCI_CLASS_DEVICE);
78
78
}
79
79
80
+
/* Drop MSG TLP except for Vendor MSG */
81
+
static void ls_pcie_drop_msg_tlp(struct ls_pcie *pcie)
82
+
{
83
+
u32 val;
84
+
85
+
val = ioread32(pcie->dbi + PCIE_STRFMR1);
86
+
val &= 0xDFFFFFFF;
87
+
iowrite32(val, pcie->dbi + PCIE_STRFMR1);
88
+
}
89
+
80
90
static int ls1021_pcie_link_up(struct pcie_port *pp)
81
91
{
82
92
u32 state;
···
107
97
static void ls1021_pcie_host_init(struct pcie_port *pp)
108
98
{
109
99
struct ls_pcie *pcie = to_ls_pcie(pp);
110
-
u32 val, index[2];
100
+
u32 index[2];
111
101
112
102
pcie->scfg = syscon_regmap_lookup_by_phandle(pp->dev->of_node,
113
103
"fsl,pcie-scfg");
···
126
116
127
117
dw_pcie_setup_rc(pp);
128
118
129
-
/*
130
-
* LS1021A Workaround for internal TKT228622
131
-
* to fix the INTx hang issue
132
-
*/
133
-
val = ioread32(pcie->dbi + PCIE_STRFMR1);
134
-
val &= 0xffff;
135
-
iowrite32(val, pcie->dbi + PCIE_STRFMR1);
119
+
ls_pcie_drop_msg_tlp(pcie);
136
120
}
137
121
138
122
static int ls_pcie_link_up(struct pcie_port *pp)
···
151
147
iowrite32(1, pcie->dbi + PCIE_DBI_RO_WR_EN);
152
148
ls_pcie_fix_class(pcie);
153
149
ls_pcie_clear_multifunction(pcie);
150
+
ls_pcie_drop_msg_tlp(pcie);
154
151
iowrite32(0, pcie->dbi + PCIE_DBI_RO_WR_EN);
155
152
}
156
153